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| 1 | +/* Copyright (c) 2024 Matheus C. França */ |
| 2 | +/* SPDX-License-Identifier: Apache-2.0 */ |
| 3 | +/* */ |
| 4 | +/* SNES FastROM LoROM — single 32 KiB PRG bank ($80:8000–$80:FFFF). */ |
| 5 | +/* */ |
| 6 | +/* ROM is placed in bank $80 so instruction fetches run at */ |
| 7 | +/* 3.58 MHz (FastROM speed) after $420D is set to 1 in crt0. */ |
| 8 | +/* WRAM and I/O remain at the same addresses as LoROM. */ |
| 9 | +/* */ |
| 10 | +/* Memory map (bank $80): */ |
| 11 | +/* $0000–$00FF Direct page / ZP (WRAM mirror, first 256 B) */ |
| 12 | +/* $0100–$01FF Hardware stack (WRAM mirror) */ |
| 13 | +/* $0200–$1FFF WRAM (data / BSS / soft stack) */ |
| 14 | +/* $2000–$5FFF Hardware I/O registers (not addressable here) */ |
| 15 | +/* $8000–$FFFF ROM bank $80 (32 KiB) */ |
| 16 | + |
| 17 | +/* Imaginary (zero-page / direct-page) registers __rc0–__rc31. */ |
| 18 | +__rc0 = 0x0000; |
| 19 | +INCLUDE imag-regs.ld |
| 20 | +ASSERT(__rc31 == 0x001f, "Inconsistent zero page map.") |
| 21 | + |
| 22 | +/* ROM access speed for MEMSEL ($420D): 0=SlowROM, 1=FastROM. */ |
| 23 | +/* crt0.s reads this symbol as an immediate and writes $420D. */ |
| 24 | +__snes_memsel = 1; |
| 25 | + |
| 26 | +MEMORY { |
| 27 | + /* Direct page: bytes after imaginary regs, up to end of page */ |
| 28 | + zp (rw) : ORIGIN = __rc31 + 1, LENGTH = 0x100 - (__rc31 + 1) |
| 29 | + /* WRAM: $0200–$1FFF (stack page $0100–$01FF reserved for hardware stack) */ |
| 30 | + ram (rw) : ORIGIN = 0x0200, LENGTH = 0x1e00 |
| 31 | + /* ROM bank $80: FastROM window — same physical data as bank $00 mirror */ |
| 32 | + rom (rx) : ORIGIN = 0x808000, LENGTH = 0x8000 |
| 33 | +} |
| 34 | + |
| 35 | +REGION_ALIAS("c_readonly", rom) |
| 36 | +REGION_ALIAS("c_writeable", ram) |
| 37 | + |
| 38 | +/* Soft stack grows down from the top of WRAM. */ |
| 39 | +__stack = 0x2000; |
| 40 | + |
| 41 | +SECTIONS { |
| 42 | + INCLUDE c.ld |
| 43 | + |
| 44 | + /* SNES internal ROM header: 32 bytes at $80:FFC0–$80:FFDF. */ |
| 45 | + .snes_header 0x80ffc0 : { KEEP(*(.snes_header)) } >rom |
| 46 | + |
| 47 | + /* Interrupt vector table: 28 bytes at $80:FFE4–$80:FFFF. */ |
| 48 | + .vectors 0x80ffe4 : { KEEP(*(.vectors)) } >rom |
| 49 | +} |
| 50 | + |
| 51 | +OUTPUT_FORMAT { |
| 52 | + FULL(rom) |
| 53 | +} |
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