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bpi-r3: Enable the PCI clock in device tree
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board/aarch64/bananapi-bpi-r3/dts/mediatek/mt7986a-bananapi-bpi-r3.dtsi

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,18 @@ https://github.com/openwrt/openwrt/blob/main/target/linux/mediatek/patches-6.12/
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&secmon_reserved {
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reg = <0 0x43000000 0 0x40000>;
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};
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/*
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* The T-PHY's pcie-phy sub-node only claims clk40m ("ref") in the SoC
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* dtsi. CLK_TOP_PCIE_PHY_SEL ("da_ref") is left unclaimed, so the
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* kernel's clk_disable_unused late_initcall gates it — killing the
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* PCIe REFCLK output to the endpoint mid-probe. Wire it here so the
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* clock stays enabled while the PHY is active.
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*/
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&pcie_port {
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clocks = <&clk40m>, <&topckgen CLK_TOP_PCIE_PHY_SEL>;
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clock-names = "ref", "da_ref";
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};
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&cpu_thermal {
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/delete-node/ trips;
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/delete-node/ cooling-maps;

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