feat: improved timing checks

Author: Requiem

src/cli.cpp

@@ -150,7 +150,7 @@ struct SHA256 {
     u32 s[8] = {};     // from h0 to h7
 
     // Initialize state to SHA-256 IVs so that compiler doesn't complain
-    void init() {
+    SHA256() {
         len = 0;
         bits = 0;
         s[0] = 0x6a09e667;
@@ -291,10 +291,11 @@ static std::string exe_path() {
 std::string compute_self_sha256() {
     std::string path = exe_path();
     if (path.empty()) return {};
+
     std::ifstream ifs(path, std::ios::binary);
     if (!ifs) return {};
+
     SHA256 sha;
-    sha.init();
 
     std::vector<char> chunk(64 * 1024);
     while (ifs) {
@@ -307,9 +308,12 @@ std::string compute_self_sha256() {
 
     u8 digest[32];
     sha.final(digest);
-    static const char hex[] = "0123456789abcdef";
+
     std::string out;
     out.reserve(64);
+
+    static constexpr char hex[] = "0123456789abcdef";
+
     for (int i = 0; i < 32; ++i) {
         out.push_back(hex[(digest[i] >> 4) & 0xF]);
         out.push_back(hex[digest[i] & 0xF]);

src/vmaware.hpp

@@ -375,6 +375,7 @@
 #include <type_traits>
 #include <stdexcept>
 #include <numeric>
+#include <atomic>
 
 #if (WINDOWS)
     #include <windows.h>
@@ -4698,6 +4699,7 @@ struct VM {
         #if (MSVC)
             // make regs volatile so writes cannot be optimized out, if this isn't added and the code is compiled in release mode, cycles would be around 40 even under Hyper-V
             volatile int regs[4]{};
+
             // ensure the CPU pipeline is drained of previous loads before we start the clock
             _mm_lfence();
 
@@ -4988,8 +4990,10 @@ struct VM {
         // collect results
         const u64 a = t1_start.load(std::memory_order_acquire);
         const u64 b = t1_end.load(std::memory_order_acquire);
-        const u64 c = t2_start.load(std::memory_order_acquire);
-        const u64 d = t2_end.load(std::memory_order_acquire);
+        #ifdef __VMAWARE_DEBUG__
+            const u64 c = t2_start.load(std::memory_order_acquire);
+            const u64 d = t2_end.load(std::memory_order_acquire);
+        #endif
         const u64 acc = t2_accum.load(std::memory_order_acquire);
 
         const u64 t1_delta = (b > a) ? (b - a) : 0;