@@ -4612,9 +4612,9 @@ struct VM {
46124612 cpu::cpuid (regs, 0x80000001 );
46134613 const bool have_rdtscp = (regs[3 ] & (1u << 27 )) != 0 ;
46144614 if (!have_rdtscp) {
4615- debug (" TIMER: (1/7) RDTSCP instruction not supported" ); // __rdtscp should be supported nowadays
4615+ debug (" TIMER: RDTSCP instruction not supported" ); // __rdtscp should be supported nowadays
46164616 return true ;
4617- }
4617+ }
46184618
46194619 constexpr u64 ITER_XOR = 100000000ULL ;
46204620 constexpr size_t CPUID_ITER = 100 ; // per leaf
@@ -4627,7 +4627,7 @@ struct VM {
46274627 if (hw == 0 ) hw = 1 ;
46284628
46294629 std::atomic<int > ready_count (0 );
4630- std::atomic<int > state (0 );
4630+ std::atomic<int > state (0 );
46314631
46324632 std::atomic<u64 > t1_start (0 ), t1_end (0 );
46334633 std::atomic<u64 > t2_start (0 ), t2_end (0 );
@@ -4672,10 +4672,10 @@ struct VM {
46724672 cpu_set_t cp;
46734673 CPU_ZERO (&cp);
46744674 CPU_SET (core, &cp);
4675- (void )pthread_setaffinity_np (ph, sizeof (cp), &cp);
4675+ (void )pthread_setaffinity_np (ph, sizeof (cp), &cp);
46764676 cookie.valid = true ;
46774677 cookie.thread = ph;
4678- cookie.prev_mask = prev;
4678+ cookie.prev_mask = prev;
46794679 }
46804680 #else
46814681 (void )t; (void )core;
@@ -4928,7 +4928,7 @@ struct VM {
49284928 // Thread 2: rdtsc and cpuid spammer, forces hypervisor to downscale TSC if patch is present; if interception disabled, caught by cpuid latency
49294929 std::thread th2 ([&]() {
49304930 ready_count.fetch_add (1 , std::memory_order_acq_rel);
4931- while (ready_count.load (std::memory_order_acquire) < 2 )
4931+ while (ready_count.load (std::memory_order_acquire) < 2 )
49324932 _mm_pause ();
49334933
49344934 u64 last = rdtsc ();
@@ -4974,7 +4974,7 @@ struct VM {
49744974 // try to pin to different cores
49754975 affinity_cookie cookie1{};
49764976 affinity_cookie cookie2{};
4977- if (hw >= 2 ) {
4977+ if (hw >= 2 ) {
49784978 if (hw >= 2 ) {
49794979 cookie1 = set_affinity (th1, 0 );
49804980 cookie2 = set_affinity (th2, 1 );
@@ -4990,10 +4990,10 @@ struct VM {
49904990 // collect results
49914991 const u64 a = t1_start.load (std::memory_order_acquire);
49924992 const u64 b = t1_end.load (std::memory_order_acquire);
4993- #ifdef __VMAWARE_DEBUG__
4994- const u64 c = t2_start.load (std::memory_order_acquire);
4995- const u64 d = t2_end.load (std::memory_order_acquire);
4996- #endif
4993+ #ifdef __VMAWARE_DEBUG__
4994+ const u64 c = t2_start.load (std::memory_order_acquire);
4995+ const u64 d = t2_end.load (std::memory_order_acquire);
4996+ #endif
49974997 const u64 acc = t2_accum.load (std::memory_order_acquire);
49984998
49994999 const u64 t1_delta = (b > a) ? (b - a) : 0 ;
@@ -5011,18 +5011,15 @@ struct VM {
50115011 debug (" TIMER: vmexit latency: " , cpuid_latency);
50125012
50135013 if (cpuid_latency >= cycle_threshold) {
5014- debug (" TIMER: (2/7) CPUID latency is above cycle threshold" );
50155014 return true ;
50165015 }
50175016 else if (cpuid_latency <= 25 ) {
50185017 // cpuid is fully serializing, no CPU have this low average cycles in real-world scenarios
50195018 // however, in patches, zero or even negative deltas can be seen oftenly
5020- debug (" TIMER: (3/7) CPUID latency is far too low in practice" );
50215019 return true ;
50225020 }
50235021
50245022 if (t1_delta == 0 || calib_delta == 0 ) {
5025- debug (" TIMER: (4/7) calibration and thread deltas are both null" );
50265023 return true ;
50275024 }
50285025
@@ -5031,71 +5028,69 @@ struct VM {
50315028
50325029 // if thread 1 was faster than thread 2, hypervisor downscaled TSC per-vCPU in either cpuid or rdtsc
50335030 if (ratio < 0.95 || ratio > 1.05 ) {
5034- debug (" TIMER: (5/7) thread 1 was faster than thread 2, hypervisor is downscaling TSC" );
50355031 return true ;
50365032 }
50375033 // if calibration was much faster than thread 1, hypervisor downscaled TSC globally while thread 2 was spamming
50385034 if (calibration_ratio < 0.95 ) {
5039- debug (" TIMER: (6/7) hypervisor is globally downscaling TSC" );
50405035 return true ;
50415036 }
50425037
5043- #if (WINDOWS)
5044- typedef struct _PROCESSOR_POWER_INFORMATION {
5045- u32 Number;
5046- u32 MaxMhz;
5047- u32 CurrentMhz;
5048- u32 MhzLimit;
5049- u32 MaxIdleState;
5050- u32 CurrentIdleState;
5051- } PROCESSOR_POWER_INFORMATION, * PPROCESSOR_POWER_INFORMATION;
5052-
5053- enum POWER_INFORMATION_LEVEL_MIN {
5054- ProcessorInformation = 11
5055- };
5038+ #if (WINDOWS)
5039+ typedef struct _PROCESSOR_POWER_INFORMATION {
5040+ u32 Number;
5041+ u32 MaxMhz;
5042+ u32 CurrentMhz;
5043+ u32 MhzLimit;
5044+ u32 MaxIdleState;
5045+ u32 CurrentIdleState;
5046+ } PROCESSOR_POWER_INFORMATION, * PPROCESSOR_POWER_INFORMATION;
5047+
5048+ enum POWER_INFORMATION_LEVEL_MIN {
5049+ ProcessorInformation = 11
5050+ };
50565051
5057- const HMODULE hPowr = LoadLibraryA (" powrprof.dll" );
5058- if (!hPowr) return 0 ;
5052+ const HMODULE hPowr = LoadLibraryA (" powrprof.dll" );
5053+ if (!hPowr) return 0 ;
50595054
5060- const char * names[] = { " CallNtPowerInformation" };
5061- void * funcs[1 ] = { nullptr };
5062- util::get_function_address (hPowr, names, funcs, 1 );
5063- if (!funcs[0 ]) return 0 ;
5055+ const char * names[] = { " CallNtPowerInformation" };
5056+ void * funcs[1 ] = { nullptr };
5057+ util::get_function_address (hPowr, names, funcs, 1 );
5058+ if (!funcs[0 ]) return 0 ;
50645059
5065- using CallNtPowerInformation_t = NTSTATUS (__stdcall*)(int , PVOID, ULONG, PVOID, ULONG);
5066- CallNtPowerInformation_t CallNtPowerInformation =
5067- reinterpret_cast <CallNtPowerInformation_t>(funcs[0 ]);
5060+ using CallNtPowerInformation_t = NTSTATUS (__stdcall*)(int , PVOID, ULONG, PVOID, ULONG);
5061+ CallNtPowerInformation_t CallNtPowerInformation =
5062+ reinterpret_cast <CallNtPowerInformation_t>(funcs[0 ]);
50685063
5069- SYSTEM_INFO si;
5070- GetSystemInfo (&si);
5071- const DWORD procCount = si.dwNumberOfProcessors ;
5072- if (procCount == 0 ) return 0 ;
5064+ SYSTEM_INFO si;
5065+ GetSystemInfo (&si);
5066+ const DWORD procCount = si.dwNumberOfProcessors ;
5067+ if (procCount == 0 ) return 0 ;
50735068
5074- const SIZE_T bufSize = static_cast <SIZE_T>(procCount) * sizeof (PROCESSOR_POWER_INFORMATION);
5075- void * raw = _malloca (bufSize);
5076- if (!raw) return 0 ;
5077- memset (raw, 0 , bufSize);
5069+ const SIZE_T bufSize = static_cast <SIZE_T>(procCount) * sizeof (PROCESSOR_POWER_INFORMATION);
5070+ void * raw = _malloca (bufSize);
5071+ if (!raw) return 0 ;
5072+ memset (raw, 0 , bufSize);
50785073
5079- const NTSTATUS status = CallNtPowerInformation (
5080- ProcessorInformation,
5081- nullptr , 0 ,
5082- raw, static_cast <ULONG>(bufSize)
5083- );
5074+ const NTSTATUS status = CallNtPowerInformation (
5075+ ProcessorInformation,
5076+ nullptr , 0 ,
5077+ raw, static_cast <ULONG>(bufSize)
5078+ );
50845079
5085- unsigned speed = 0 ;
5086- if ((LONG)status >= 0 ) {
5087- PROCESSOR_POWER_INFORMATION* info = reinterpret_cast <PROCESSOR_POWER_INFORMATION*>(raw);
5088- speed = static_cast <unsigned >(info[0 ].CurrentMhz );
5089- }
5080+ unsigned speed = 0 ;
5081+ if ((LONG)status >= 0 ) {
5082+ PROCESSOR_POWER_INFORMATION* info = reinterpret_cast <PROCESSOR_POWER_INFORMATION*>(raw);
5083+ speed = static_cast <unsigned >(info[0 ].CurrentMhz );
5084+ }
50905085
5091- _freea (raw);
5086+ _freea (raw);
50925087
5093- if (speed < 800 ) {
5094- debug (" TIMER: (7/7) VMAware detected a hypervisor offsetting TSC: " , speed);
5095- return true ;
5096- }
5097- #endif
5088+ if (speed < 800 ) {
5089+ debug (" TIMER: VMAware detected an hypervisor offsetting TSC: " , speed);
5090+ return true ;
5091+ }
50985092 #endif
5093+ #endif
50995094 return false ;
51005095 }
51015096
0 commit comments