Skip to content

Commit 19d9320

Browse files
authored
Merge pull request #271 from krcb197/270-remove-old-checks-on-pre-python-39
Remove old jinja template logic checking for pre-3.8
2 parents 12ea6d8 + 63cbede commit 19d9320

2 files changed

Lines changed: 3 additions & 20 deletions

File tree

src/peakrdl_python/templates/addrmap_simulation_tb.py.jinja

Lines changed: 2 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,6 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
2727
{% if legacy_block_access %}from array import array as Array{% endif %}
2828
from typing import Union, cast
2929
{% if asyncoutput %}
30-
import sys
3130
import asyncio
3231
import unittest
3332
from unittest.mock import Mock
@@ -186,14 +185,9 @@ class {{fq_block_name}}_block_access({{top_node.inst_name}}_SimTestCase_BlockAcc
186185
{%- endif %}
187186

188187
if __name__ == '__main__':
189-
{% if asyncoutput %}
190-
if sys.version_info < (3, 8):
191-
asynctest.main()
192-
else:
193-
unittest.main()
194-
{% else %}
188+
195189
unittest.main()
196-
{% endif %}
190+
197191

198192

199193

src/peakrdl_python/templates/addrmap_tb.py.jinja

Lines changed: 1 addition & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,6 @@ along with this program. If not, see <https://www.gnu.org/licenses/>.
2626
from typing import Union,Iterable
2727
from array import array as Array
2828
{% if asyncoutput %}
29-
import sys
3029
import asyncio
3130
import unittest
3231
from unittest.mock import patch, call
@@ -720,15 +719,5 @@ class {{fq_block_name}}_alt_block_access({{top_node.inst_name}}_TestCase_AltBloc
720719

721720

722721
if __name__ == '__main__':
723-
{% if asyncoutput %}
724-
if sys.version_info < (3, 8):
725-
asynctest.main()
726-
else:
727-
unittest.main()
728-
{% else %}
729-
unittest.main()
730-
{% endif %}
731-
732-
733-
734722

723+
unittest.main()

0 commit comments

Comments
 (0)