Commit 8a4182c
* Add transient storage fields
* fix(verity): route transient mapping writes through tstore (#2021)
* mask transient address-field writes to match Yul (#1995)
* fix(2021): repair transient-storage proofs for task/1995
* fix(2021): repair transient-storage proofs for task/1995
* chore: auto-refresh derived artifacts
* fix(2021): complete transient-storage forward-port + registry/lint
Recover field-aware frame lemmas left unstaged in the prior merge commit:
- Frames.lean: writeUint/AddressFieldSlots_preserves_{storage,address,arrays,
calldata} + rewire execStmt_setStorage/setStorageAddr_execution_summary to
the field-aware (transient-capable) writers.
- DenoteAgreement.lean: writeAddressKeyedMapping2PackedWordFieldSlots_eq.
- ExpressionCompile.lean: use the outer resolved field binding for the
tload/sload selection (drop redundant re-match); adapt compileExpr_bridgedSource
closure proofs accordingly.
Regenerate PrintAxioms.lean (5316 thms, 0 sorry'd). Allowlist the long
add-wrapped multi-slot bridging closure compileMappingSlotWrite_multiSlot_nonzero_bridged
(twin of the already-allowlisted compileMappingSlotWrite_multiSlot_bridged).
make check: All checks passed.
---------
Co-authored-by: github-actions[bot] <github-actions[bot]@users.noreply.github.com>
1 parent 40443e7 commit 8a4182c
23 files changed
Lines changed: 3330 additions & 1580 deletions
File tree
- Compiler
- CompilationModel
- Proofs
- IRGeneration
- FunctionBody
- GenericInduction
- YulGeneration/Backends
- EvmYulLeanBodyClosure
- Contracts/Smoke
- Verity
- Core/Model
- Macro
- Translate
- artifacts/macro_property_tests
- scripts
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