2026-05-15 16:35:43

Author: mohanson

src/apu.rs

@@ -660,9 +660,9 @@ struct Ns {
 }
 
 impl Ns {
-    fn new(sr: u32) -> Self {
+    fn power_up() -> Self {
         Self {
-            buf: Blip::power_up(sr),
+            buf: Blip::power_up(SAMPLE_RATE),
             reg: Reg::power_up(),
             tmr: Tmr::power_up(8),
             lc: Lc::power_up(),
@@ -751,61 +751,53 @@ const RD: [u8; 0x30] = [
 
 pub struct Apu {
     glo: Rc<RefCell<Global>>,
-    pub buffer: Arc<Mutex<Vec<(f32, f32)>>>,
-    sr: u32,
 
-    // NR50/51/52
-    nr50: u8,
-    nr51: u8,
-    pwr: bool,
+    pub data: Arc<Mutex<Vec<(f32, f32)>>>,
+    pub sdiv: u16,
 
     ch1: Sq1,
     ch2: Sq2,
     ch3: Wv,
     ch4: Ns,
-
-    // Frame sequencer + 512 Hz divider.
+    fc: u32,
     fs: Fseq,
+    fs_skip: bool,
     ft: Tmr,
-    skip_fs: bool,
-
-    // sdiv at the moment of the current APU bus write; the MMU writes this
-    // before every `sb` so the NR52 power-on handler can phase-align FS.
-    pub sdiv_cache: u16,
-
-    // Monotonic frame counter (one per FS-divider fire); used together with
-    // `t_frame`/`t_apu_n` in CH3 to extrapolate live wave-RAM access.
-    fc: u32,
+    nr50: u8,
+    nr51: u8,
+    pwr: bool,
+    sr: u32,
 }
 
 impl Apu {
     pub fn power_up(glo: Rc<RefCell<Global>>, sr: u32) -> Self {
         Self {
             glo,
-            buffer: Arc::new(Mutex::new(Vec::new())),
-            sr,
-            nr50: 0,
-            nr51: 0,
-            pwr: false,
+            data: Arc::new(Mutex::new(Vec::new())),
+            sdiv: 0,
             ch1: Sq1::power_up(),
             ch2: Sq2::power_up(),
             ch3: Wv::power_up(),
-            ch4: Ns::new(sr),
+            ch4: Ns::power_up(),
+            fc: 0,
             fs: Fseq::power_up(),
+            fs_skip: false,
             ft: Tmr::power_up(CLOCK_FREQUENCY / 512),
-            skip_fs: false,
-            sdiv_cache: 0,
-            fc: 0,
+            nr50: 0,
+            nr51: 0,
+            pwr: false,
+            sr,
         }
     }
 
-    // ─── Mixer & output ────────────────────────────────────────────────────
-
-    fn vol_l(&self) -> f32 {
-        f32::from((self.nr50 >> 4) & 0x07) / 7.0 / 15.0 * 0.25
-    }
-    fn vol_r(&self) -> f32 {
-        f32::from(self.nr50 & 0x07) / 7.0 / 15.0 * 0.25
+    fn add(&self, l: &[f32], r: &[f32]) {
+        let mut b = self.data.lock().unwrap();
+        for (a, c) in l.iter().zip(r) {
+            if b.len() > self.sr as usize {
+                return;
+            }
+            b.push((*a, *c));
+        }
     }
 
     fn mix(&mut self) {
@@ -846,19 +838,17 @@ impl Apu {
             mix_into(&t[..c4], &mut l, &mut r, pan & 0x80 != 0, pan & 0x08 != 0);
 
             debug_assert!(c1 == c2 && c2 == c3 && c3 == c4);
-            self.push(&l[..c1], &r[..c1]);
+            self.add(&l[..c1], &r[..c1]);
             done += c1;
         }
     }
 
-    fn push(&self, l: &[f32], r: &[f32]) {
-        let mut b = self.buffer.lock().unwrap();
-        for (a, c) in l.iter().zip(r) {
-            if b.len() > self.sr as usize {
-                return;
-            }
-            b.push((*a, *c));
-        }
+    fn vol_l(&self) -> f32 {
+        f32::from((self.nr50 >> 4) & 0x07) / 7.0 / 15.0 * 0.25
+    }
+
+    fn vol_r(&self) -> f32 {
+        f32::from(self.nr50 & 0x07) / 7.0 / 15.0 * 0.25
     }
 
     // ─── Helpers ───────────────────────────────────────────────────────────
@@ -932,8 +922,8 @@ impl Apu {
         // the next falling edge of sdiv bit 12. If that bit is already high at
         // power-on, the very first FS event is skipped (hardware glitch).
         self.fs.s = 7;
-        self.ft.n = u32::from(self.sdiv_cache) % (CLOCK_FREQUENCY / 512);
-        self.skip_fs = self.sdiv_cache & 0x1000 != 0;
+        self.ft.n = u32::from(self.sdiv) % (CLOCK_FREQUENCY / 512);
+        self.fs_skip = self.sdiv & 0x1000 != 0;
     }
 
     fn status(&self) -> u8 {
@@ -1030,7 +1020,7 @@ impl Memory for Apu {
             0xff1d => {
                 // Record d1 (2-MHz cycles from first trigger to this NR33 write).
                 if self.glo.borrow().term == Term::DMG && self.ch3.on && self.ch3.reg.dac_wv() {
-                    let dt = self.sdiv_cache.wrapping_sub(self.ch3.t_s_div) as u32;
+                    let dt = self.sdiv.wrapping_sub(self.ch3.t_s_div) as u32;
                     self.ch3.d1 = dt / 2;
                 }
                 self.ch3.sb(a, v);
@@ -1059,7 +1049,7 @@ impl Memory for Apu {
 impl Apu {
     fn nr34sb(&mut self, v: u8, xtra: bool) {
         let was = self.ch3.on && self.ch3.reg.dac_wv();
-        let sdiv = self.sdiv_cache;
+        let sdiv = self.sdiv;
         let trig = v & 0x80 != 0;
 
         let dmg_off = if trig && was && self.glo.borrow().term == Term::DMG {
@@ -1113,8 +1103,8 @@ impl Ticker for Apu {
 
         if !self.pwr {
             for _ in 0..n {
-                if self.skip_fs {
-                    self.skip_fs = false;
+                if self.fs_skip {
+                    self.fs_skip = false;
                     continue;
                 }
                 self.fs.step();
@@ -1124,8 +1114,8 @@ impl Ticker for Apu {
         }
 
         for _ in 0..n {
-            if self.skip_fs {
-                self.skip_fs = false;
+            if self.fs_skip {
+                self.fs_skip = false;
                 self.fc = self.fc.wrapping_add(1);
                 continue;
             }

src/main.rs

@@ -140,7 +140,7 @@ fn mode_minifb(argu: &Argument) {
         rog::debugln!("Stream config: {:?}", config);
 
         let apu = Apu::power_up(mbrd.mmu.borrow().glo.clone(), config.sample_rate.0);
-        let apu_data = apu.buffer.clone();
+        let apu_data = apu.data.clone();
         mbrd.mmu.borrow_mut().apu = apu;
 
         stream = match sample_format {

src/mmu.rs

@@ -144,7 +144,7 @@ impl Memory for Mmu {
             0xff04..=0xff07 => self.ticker.sb(a, v),
             0xff0f => self.intr.sb(0xff0f, v),
             0xff10..=0xff3f => {
-                self.apu.sdiv_cache = self.glo.borrow().sdiv;
+                self.apu.sdiv = self.glo.borrow().sdiv;
                 self.apu.sb(a, v);
             }
             0xff40..=0xff45 => self.gpu.sb(a, v),