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| Our [working roadmap](https://docs.google.com/document/d/1ZquH-53j2OedTbgEKCJBKTh4WLE11UveM10mNdnVARY/edit?tab=t.0#heading=h.j3duh9pgdm94) outlines the planned timeline for work on the renderers into next year. | ||
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| An integration of Vello as the backend for Servo's canvas rendering has landed in [servo#36821][] (and also Vello CPU in [servo#38282][]). |
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cc @sagudev, if there's anything more you want to say here/want us to remove this/if there's a relevant screenshot
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Maybe it's also worth mentioning we have switched to kurbo::Bezpath for our path abstraction: servo/servo#37967 (this is for every backend).
As for vello backends, I would also mention that further progress and remaining problems can be tracked here: servo/servo#38345
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| <!-- TODO: Clean up this blurb --> | ||
| <!-- TODO: Do we need to say "experimental" for literally everything? --> | ||
| Fearless SIMD is our experimental SIMD infrastructure library, developed for Vello sparse strips. | ||
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| - [fearless_simd#24][], [fearless_simd#26][], [fearless_simd#27][]: Implement all WASM SIMD methods. | ||
| <!-- TODO: Any others which are relevant? --> |
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cc @ajakubowicz-canva if there's anything from this search which we should also include
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Fearless SIMD is in quite active development, so it's a little hard to point out individual PRs as features, because every PR is either:
- Adding new public API
- Implementing that public API on an architecture
- Robustness/testing/library maintenance
I think a summary of this month is something like:
Fearless SIMD continues to be developed in concert with the Vello sparse strips renderers – most notably `vello_cpu`. By developing Fearless SIMD with the Vello sparse strips renderers, we're ensuring that Fearless SIMD provides performance improvements that are quantifiable, and we're dog-fooding our own implementation during this period of rapid experimentation and development. To support the significant vello_cpu refactor using SIMD, this month saw the addition of more methods implemented in both Neon and WebAssembly. Thanks to new contributions from Ralith we've started on SSE 4.2 support for `x86` architectures.Maybe a terser variant could be:
Fearless SIMD continues to evolve alongside Vello's sparse strips renderers, particularly `vello_cpu`. This co-development ensures our SIMD abstractions deliver real, measurable performance gains while letting us dogfood our implementation during rapid iteration.
This month's highlights include expanded WebAssembly and Neon SIMD support to enable the significant `vello_cpu` SIMD refactor, with SSE 4.2 support starting thanks to contributions from Ralith and Laurenz.There was a problem hiding this comment.
Also can add:
- [fearless_simd#31][]: Introduce semantic conversion traits
to_int,to_float.
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| ### Fearless SIMD |
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Apart from the comment below, Fearless SIMD section LGTM :D Thank you so much!
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#linebender > This month in Linebender
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