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| 1 | +From a2180b33351e63187b6de834d3a3fd30ea8b500c Mon Sep 17 00:00:00 2001 |
| 2 | +From: Arthur Heymans <arthur@aheymans.xyz> |
| 3 | +Date: Thu, 25 Jan 2024 16:40:50 +0100 |
| 4 | +Subject: [PATCH] nb/intel/*: Match ACPI with resource allocation |
| 5 | + |
| 6 | +Currently resource allocation starts top down from the default value |
| 7 | +0xfe000000. This does not match what ACPI reports, so adapt |
| 8 | +CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT to reflect that. |
| 9 | + |
| 10 | +Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> |
| 11 | +Change-Id: I2ba0e96a7ab18d65b7fbbb38b1a979ea2ec6d1be |
| 12 | +Reviewed-on: https://review.coreboot.org/c/coreboot/+/80207 |
| 13 | +Tested-by: build bot (Jenkins) <no-reply@coreboot.org> |
| 14 | +Reviewed-by: Nico Huber <nico.h@gmx.de> |
| 15 | +--- |
| 16 | + src/northbridge/intel/gm45/Kconfig | 4 ++++ |
| 17 | + src/northbridge/intel/haswell/Kconfig | 4 ++++ |
| 18 | + src/northbridge/intel/i945/Kconfig | 4 ++++ |
| 19 | + src/northbridge/intel/ironlake/Kconfig | 4 ++++ |
| 20 | + src/northbridge/intel/pineview/Kconfig | 4 ++++ |
| 21 | + src/northbridge/intel/sandybridge/Kconfig | 4 ++++ |
| 22 | + src/northbridge/intel/x4x/Kconfig | 4 ++++ |
| 23 | + 7 files changed, 28 insertions(+) |
| 24 | + |
| 25 | +diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig |
| 26 | +index 8059e7ee80..fef0d735b3 100644 |
| 27 | +--- a/src/northbridge/intel/gm45/Kconfig |
| 28 | ++++ b/src/northbridge/intel/gm45/Kconfig |
| 29 | +@@ -31,6 +31,10 @@ config ECAM_MMCONF_BUS_NUMBER |
| 30 | + int |
| 31 | + default 64 |
| 32 | + |
| 33 | ++# This number must be equal or lower than what's reported in ACPI PCI _CRS |
| 34 | ++config DOMAIN_RESOURCE_32BIT_LIMIT |
| 35 | ++ default 0xfec00000 |
| 36 | ++ |
| 37 | + config SMM_RESERVED_SIZE |
| 38 | + hex |
| 39 | + default 0x100000 |
| 40 | +diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig |
| 41 | +index 4b83a25bc1..35403373e7 100644 |
| 42 | +--- a/src/northbridge/intel/haswell/Kconfig |
| 43 | ++++ b/src/northbridge/intel/haswell/Kconfig |
| 44 | +@@ -60,6 +60,10 @@ config ECAM_MMCONF_BUS_NUMBER |
| 45 | + int |
| 46 | + default 64 |
| 47 | + |
| 48 | ++# This number must be equal or lower than what's reported in ACPI PCI _CRS |
| 49 | ++config DOMAIN_RESOURCE_32BIT_LIMIT |
| 50 | ++ default ECAM_MMCONF_BASE_ADDRESS |
| 51 | ++ |
| 52 | + config DCACHE_RAM_BASE |
| 53 | + hex |
| 54 | + default 0xff7c0000 |
| 55 | +diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig |
| 56 | +index ef925e17e7..32eff1a611 100644 |
| 57 | +--- a/src/northbridge/intel/i945/Kconfig |
| 58 | ++++ b/src/northbridge/intel/i945/Kconfig |
| 59 | +@@ -41,6 +41,10 @@ config ECAM_MMCONF_BUS_NUMBER |
| 60 | + int |
| 61 | + default 64 |
| 62 | + |
| 63 | ++# This number must be equal or lower than what's reported in ACPI PCI _CRS |
| 64 | ++config DOMAIN_RESOURCE_32BIT_LIMIT |
| 65 | ++ default 0xfec00000 |
| 66 | ++ |
| 67 | + config OVERRIDE_CLOCK_DISABLE |
| 68 | + bool |
| 69 | + default n |
| 70 | +diff --git a/src/northbridge/intel/ironlake/Kconfig b/src/northbridge/intel/ironlake/Kconfig |
| 71 | +index ce705dcf53..2bafebf92e 100644 |
| 72 | +--- a/src/northbridge/intel/ironlake/Kconfig |
| 73 | ++++ b/src/northbridge/intel/ironlake/Kconfig |
| 74 | +@@ -47,6 +47,10 @@ config ECAM_MMCONF_BASE_ADDRESS |
| 75 | + config ECAM_MMCONF_BUS_NUMBER |
| 76 | + default 256 |
| 77 | + |
| 78 | ++# This number must be equal or lower than what's reported in ACPI PCI _CRS |
| 79 | ++config DOMAIN_RESOURCE_32BIT_LIMIT |
| 80 | ++ default 0xfec00000 |
| 81 | ++ |
| 82 | + config INTEL_GMA_BCLV_OFFSET |
| 83 | + default 0x48254 |
| 84 | + |
| 85 | +diff --git a/src/northbridge/intel/pineview/Kconfig b/src/northbridge/intel/pineview/Kconfig |
| 86 | +index 877812643a..59cfcd5e0a 100644 |
| 87 | +--- a/src/northbridge/intel/pineview/Kconfig |
| 88 | ++++ b/src/northbridge/intel/pineview/Kconfig |
| 89 | +@@ -38,4 +38,8 @@ config FIXED_DMIBAR_MMIO_BASE |
| 90 | + config FIXED_EPBAR_MMIO_BASE |
| 91 | + default 0xfed19000 |
| 92 | + |
| 93 | ++# This number must be equal or lower than what's reported in ACPI PCI _CRS |
| 94 | ++config DOMAIN_RESOURCE_32BIT_LIMIT |
| 95 | ++ default 0xfec00000 |
| 96 | ++ |
| 97 | + endif |
| 98 | +diff --git a/src/northbridge/intel/sandybridge/Kconfig b/src/northbridge/intel/sandybridge/Kconfig |
| 99 | +index f7d56c7503..fa40b0668d 100644 |
| 100 | +--- a/src/northbridge/intel/sandybridge/Kconfig |
| 101 | ++++ b/src/northbridge/intel/sandybridge/Kconfig |
| 102 | +@@ -104,6 +104,10 @@ config ECAM_MMCONF_BUS_NUMBER |
| 103 | + int |
| 104 | + default 64 |
| 105 | + |
| 106 | ++# This number must be equal or lower than what's reported in ACPI PCI _CRS |
| 107 | ++config DOMAIN_RESOURCE_32BIT_LIMIT |
| 108 | ++ default ECAM_MMCONF_BASE_ADDRESS |
| 109 | ++ |
| 110 | + config DCACHE_RAM_BASE |
| 111 | + hex |
| 112 | + default 0xfefe0000 |
| 113 | +diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig |
| 114 | +index 9af063819b..097e11126c 100644 |
| 115 | +--- a/src/northbridge/intel/x4x/Kconfig |
| 116 | ++++ b/src/northbridge/intel/x4x/Kconfig |
| 117 | +@@ -28,6 +28,10 @@ config ECAM_MMCONF_BUS_NUMBER |
| 118 | + int |
| 119 | + default 256 |
| 120 | + |
| 121 | ++# This number must be equal or lower than what's reported in ACPI PCI _CRS |
| 122 | ++config DOMAIN_RESOURCE_32BIT_LIMIT |
| 123 | ++ default 0xfec00000 |
| 124 | ++ |
| 125 | + config SMM_RESERVED_SIZE |
| 126 | + hex |
| 127 | + default 0x100000 |
| 128 | +-- |
| 129 | +2.39.2 |
| 130 | + |
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