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[Sim] Add cascade erase for print/proc.print format/get_file producer chains
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‎include/circt/Dialect/Sim/SimUtils.h‎

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//===- SimUtils.h - Sim utility entry points --------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This header file defines utility functions for the Sim dialect.
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//
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//===----------------------------------------------------------------------===//
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#ifndef CIRCT_DIALECT_SIM_SIMUTILS_H
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#define CIRCT_DIALECT_SIM_SIMUTILS_H
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#include "circt/Dialect/Sim/SimOps.h"
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namespace circt {
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namespace sim {
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/// Erase a print op and cascade-delete dead, side-effect-free producer ops in
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/// its reachable dependency graph.
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///
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/// Precondition: the reachable deletable producer graph is a DAG.
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/// In a DAG, this utility fully removes all deletable ops that become dead.
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///
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/// If the graph is not a DAG, the behavior is still defined: any strongly
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/// connected component in that graph cannot be fully cleaned up by this local
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/// dead-use criterion and may remain after erasing the root print.
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///
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/// Note: cyclic `sim.fmt.concat` dependencies are illegal IR by Sim dialect
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/// invariants; callers should run this helper on verifier-clean IR.
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void cascadeErasePrint(PrintFormattedOp op, mlir::RewriterBase &rewriter);
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void cascadeErasePrint(PrintFormattedProcOp op, mlir::RewriterBase &rewriter);
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/// TODO: Add explicit cycle detection helper if callers need local validation.
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} // namespace sim
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} // namespace circt
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#endif // CIRCT_DIALECT_SIM_SIMUTILS_H

‎lib/Dialect/Sim/CMakeLists.txt‎

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SimDialect.cpp
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SimOps.cpp
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SimTypes.cpp
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SimUtils.cpp
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ADDITIONAL_HEADER_DIRS
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${CIRCT_MAIN_INCLUDE_DIR}/circt/Dialect/Sim

‎lib/Dialect/Sim/SimUtils.cpp‎

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//===- SimUtils.cpp - Sim utility entry points ------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements utility functions for the Sim dialect.
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//
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//===----------------------------------------------------------------------===//
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#include "circt/Dialect/Sim/SimUtils.h"
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#include "circt/Dialect/Sim/SimOps.h"
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#include "llvm/ADT/DenseSet.h"
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#include "llvm/ADT/STLExtras.h"
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#include <queue>
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namespace circt {
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namespace sim {
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// Returns true for producer ops that are safe to remove during cascading erase:
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// they are side-effect-free formatting/file-handle construction nodes whose
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// only relevant liveness is whether their results are still used.
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static bool isDeleteCascadable(Operation *op) {
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return isa<FormatLiteralOp, FormatHexOp, FormatOctOp, FormatBinOp,
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FormatScientificOp, FormatFloatOp, FormatGeneralOp, FormatDecOp,
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FormatCharOp, FormatHierPathOp, FormatStringConcatOp, GetFileOp>(
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op);
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}
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template <typename PrintOpTy>
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static void cascadeErasePrintImpl(PrintOpTy op, mlir::RewriterBase &rewriter) {
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auto *root = op.getOperation();
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llvm::DenseSet<Operation *> scheduled;
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std::queue<Operation *> toErase;
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toErase.push(root);
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scheduled.insert(root);
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while (!toErase.empty()) {
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auto *currentOp = toErase.front();
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toErase.pop();
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llvm::DenseSet<Operation *> seenProducers;
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for (auto operand : currentOp->getOperands()) {
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if (auto *definingOp = operand.getDefiningOp();
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definingOp && isDeleteCascadable(definingOp) &&
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seenProducers.insert(definingOp).second) {
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bool allUsesFromCurrent = llvm::all_of(
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definingOp->getResults(), [&](Value result) {
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return llvm::all_of(result.getUsers(), [&](Operation *user) {
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return user == currentOp;
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});
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});
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if (allUsesFromCurrent && scheduled.insert(definingOp).second)
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toErase.push(definingOp);
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}
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}
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rewriter.eraseOp(currentOp);
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}
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}
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void cascadeErasePrint(PrintFormattedOp op, mlir::RewriterBase &rewriter) {
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cascadeErasePrintImpl(op, rewriter);
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}
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void cascadeErasePrint(PrintFormattedProcOp op, mlir::RewriterBase &rewriter) {
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cascadeErasePrintImpl(op, rewriter);
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}
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} // namespace sim
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} // namespace circt

‎unittests/Dialect/CMakeLists.txt‎

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add_subdirectory(OM)
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add_subdirectory(RTG)
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add_subdirectory(RTGTest)
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add_subdirectory(Sim)
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add_subdirectory(Synth)

‎unittests/Dialect/Sim/CMakeLists.txt‎

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add_circt_unittest(CIRCTSimTests
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CascadeDeleteTest.cpp
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)
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target_link_libraries(CIRCTSimTests
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PRIVATE
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CIRCTHW
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CIRCTSim
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MLIRIR
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MLIRParser
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)

‎unittests/Dialect/Sim/CascadeDeleteTest.cpp‎

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#include "circt/Dialect/HW/HWDialect.h"
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#include "circt/Dialect/HW/HWOps.h"
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#include "circt/Dialect/Seq/SeqDialect.h"
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#include "circt/Dialect/Sim/SimDialect.h"
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#include "circt/Dialect/Sim/SimOps.h"
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#include "circt/Dialect/Sim/SimUtils.h"
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#include "mlir/IR/BuiltinOps.h"
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#include "mlir/IR/MLIRContext.h"
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#include "mlir/IR/PatternMatch.h"
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#include "mlir/Parser/Parser.h"
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#include "gtest/gtest.h"
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using namespace mlir;
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using namespace circt;
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namespace {
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const char *irSimpleChain = R"MLIR(
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module {
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hw.module @test(in %clk : !seq.clock, in %cond : i1) {
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%lit = sim.fmt.literal "hello"
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%fmt = sim.fmt.concat (%lit)
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sim.print %fmt on %clk if %cond
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hw.output
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}
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}
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)MLIR";
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const char *irSharedInput = R"MLIR(
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module {
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hw.module @test(in %clk : !seq.clock, in %cond : i1) {
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%lit = sim.fmt.literal "shared"
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%fmt0 = sim.fmt.concat (%lit, %lit)
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%fmt1 = sim.fmt.concat (%lit)
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sim.print %fmt0 on %clk if %cond
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sim.print %fmt1 on %clk if %cond
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hw.output
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}
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}
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)MLIR";
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const char *irConditionFromConstant = R"MLIR(
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module {
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hw.module @test(in %clk : !seq.clock) {
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%cond = hw.constant true
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%lit = sim.fmt.literal "hello"
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%fmt = sim.fmt.concat (%lit)
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sim.print %fmt on %clk if %cond
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hw.output
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}
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}
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)MLIR";
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const char *irDuplicateProducerUse = R"MLIR(
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module {
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hw.module @test(in %clk : !seq.clock, in %cond : i1) {
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%lit = sim.fmt.literal "dup"
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%fmt = sim.fmt.concat (%lit, %lit)
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sim.print %fmt on %clk if %cond
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hw.output
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}
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}
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)MLIR";
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const char *irProcPrintGetFile = R"MLIR(
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module {
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hw.module @test(in %trigger : i1) {
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hw.triggered posedge %trigger {
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%msg = sim.fmt.literal "hello"
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%prefix = sim.fmt.literal "out_"
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%suffix = sim.fmt.literal ".log"
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%fname = sim.fmt.concat (%prefix, %suffix)
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%file = sim.get_file %fname
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sim.proc.print %msg to %file
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}
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hw.output
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}
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}
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)MLIR";
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class SimCascadeDeleteTest : public ::testing::Test {
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protected:
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MLIRContext context;
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void SetUp() override {
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context.loadDialect<hw::HWDialect>();
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context.loadDialect<seq::SeqDialect>();
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context.loadDialect<sim::SimDialect>();
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}
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OwningOpRef<ModuleOp> parseTestModule(const char *source) {
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auto module = parseSourceString<ModuleOp>(source, &context);
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EXPECT_TRUE(module);
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return module;
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}
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static SmallVector<sim::PrintFormattedOp> collectPrints(ModuleOp module) {
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SmallVector<sim::PrintFormattedOp> prints;
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module.walk([&](sim::PrintFormattedOp op) { prints.push_back(op); });
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return prints;
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}
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static sim::PrintFormattedOp findSinglePrint(ModuleOp module) {
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auto prints = collectPrints(module);
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EXPECT_EQ(prints.size(), 1u);
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return prints.front();
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}
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static sim::PrintFormattedProcOp findSingleProcPrint(ModuleOp module) {
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sim::PrintFormattedProcOp result;
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module.walk([&](sim::PrintFormattedProcOp op) {
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EXPECT_FALSE(result);
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result = op;
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});
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EXPECT_TRUE(result);
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return result;
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}
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template <typename OpTy>
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static unsigned countOps(Operation *root) {
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unsigned count = 0;
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root->walk([&](OpTy) { ++count; });
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return count;
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}
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void erasePrint(sim::PrintFormattedOp printOp) {
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IRRewriter rewriter(&context);
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sim::cascadeErasePrint(printOp, rewriter);
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}
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void erasePrint(sim::PrintFormattedProcOp printOp) {
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IRRewriter rewriter(&context);
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sim::cascadeErasePrint(printOp, rewriter);
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}
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};
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TEST_F(SimCascadeDeleteTest, SimpleChain) {
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auto module = parseTestModule(irSimpleChain);
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ASSERT_TRUE(module);
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auto printOp = findSinglePrint(module.get());
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ASSERT_TRUE(printOp);
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erasePrint(printOp);
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ASSERT_EQ(countOps<sim::PrintFormattedOp>(module.get()), 0);
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ASSERT_EQ(countOps<sim::FormatStringConcatOp>(module.get()), 0);
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ASSERT_EQ(countOps<sim::FormatLiteralOp>(module.get()), 0);
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}
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TEST_F(SimCascadeDeleteTest, SharedInputStaysAlive) {
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auto module = parseTestModule(irSharedInput);
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ASSERT_TRUE(module);
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auto prints = collectPrints(module.get());
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ASSERT_EQ(prints.size(), 2u);
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erasePrint(prints.front());
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ASSERT_EQ(countOps<sim::PrintFormattedOp>(module.get()), 1);
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ASSERT_EQ(countOps<sim::FormatStringConcatOp>(module.get()), 1);
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ASSERT_EQ(countOps<sim::FormatLiteralOp>(module.get()), 1);
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}
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TEST_F(SimCascadeDeleteTest, KeepsNonCascadableConditionProducer) {
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auto module = parseTestModule(irConditionFromConstant);
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ASSERT_TRUE(module);
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auto printOp = findSinglePrint(module.get());
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ASSERT_TRUE(printOp);
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erasePrint(printOp);
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ASSERT_EQ(countOps<sim::PrintFormattedOp>(module.get()), 0);
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ASSERT_EQ(countOps<sim::FormatStringConcatOp>(module.get()), 0);
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ASSERT_EQ(countOps<sim::FormatLiteralOp>(module.get()), 0);
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ASSERT_EQ(countOps<hw::ConstantOp>(module.get()), 1);
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}
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TEST_F(SimCascadeDeleteTest, DuplicateProducerUseBySingleConsumer) {
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auto module = parseTestModule(irDuplicateProducerUse);
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ASSERT_TRUE(module);
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auto printOp = findSinglePrint(module.get());
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ASSERT_TRUE(printOp);
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erasePrint(printOp);
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ASSERT_EQ(countOps<sim::PrintFormattedOp>(module.get()), 0);
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ASSERT_EQ(countOps<sim::FormatStringConcatOp>(module.get()), 0);
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ASSERT_EQ(countOps<sim::FormatLiteralOp>(module.get()), 0);
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}
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TEST_F(SimCascadeDeleteTest, ProcPrintAlsoCascadesGetFileChain) {
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auto module = parseTestModule(irProcPrintGetFile);
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ASSERT_TRUE(module);
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auto printOp = findSingleProcPrint(module.get());
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ASSERT_TRUE(printOp);
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erasePrint(printOp);
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ASSERT_EQ(countOps<sim::PrintFormattedProcOp>(module.get()), 0);
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ASSERT_EQ(countOps<sim::GetFileOp>(module.get()), 0);
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ASSERT_EQ(countOps<sim::FormatStringConcatOp>(module.get()), 0);
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ASSERT_EQ(countOps<sim::FormatLiteralOp>(module.get()), 0);
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}
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} // namespace

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