[ImportVerilog] Capture analysis should skip reprocessing identical module instances#10338
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…odule instances (llvm#10338) Currently capture analysis unconditionally descends into all module instance bodies. This forces slang to instantiate complete ASTs for all module instances, transitively. For large designs this does not scale. For example with one 7M LOC Verilog example, ImportVerilog consumes more than 200GB of memory before crashing with OOM. Slang lets clients avoid this problem via "canonical instance bodies" that express deduplication. Setting `VisitCanonical` to true in the `ASTVisitor` template causes the `InstanceBodySymbol` visit to use the deduplicated canonical instance body (when available). For this analysis we don't need to re-analyze duplicate instance so we can just keep track of which bodies we've visited and avoid descending into already-visited bodies.
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…odule instances (llvm#10338) Currently capture analysis unconditionally descends into all module instance bodies. This forces slang to instantiate complete ASTs for all module instances, transitively. For large designs this does not scale. For example with one 7M LOC Verilog example, ImportVerilog consumes more than 200GB of memory before crashing with OOM. Slang lets clients avoid this problem via "canonical instance bodies" that express deduplication. Setting `VisitCanonical` to true in the `ASTVisitor` template causes the `InstanceBodySymbol` visit to use the deduplicated canonical instance body (when available). For this analysis we don't need to re-analyze duplicate instance so we can just keep track of which bodies we've visited and avoid descending into already-visited bodies.
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Oh very nice! I think this can help me drop a lot of bookkeeping I added in another PR too. (seems I can't trigger circt-tests from https://github.com/circt/circt-tests/ which would rerun the larger verilog ones, I think that would help here)
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This is fantastic @rocallahan 🥳. I've been hoping to get rid of that ad-hoc deduplication in the importer at some point. Thanks for doing that! LGTM, modulo @jpienaar's comments.
slang already provides this for us. We should just use it. Also, by using slang's canonical module bodies, analysis passes that walk the slang AST can produce results that refer to specific slang AST objects in canonical module bodies, and we know those are the exact AST objects we're going to use to generate MLIR.
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…odule instances (llvm#10338) Currently capture analysis unconditionally descends into all module instance bodies. This forces slang to instantiate complete ASTs for all module instances, transitively. For large designs this does not scale. For example with one 7M LOC Verilog example, ImportVerilog consumes more than 200GB of memory before crashing with OOM. Slang lets clients avoid this problem via "canonical instance bodies" that express deduplication. Setting `VisitCanonical` to true in the `ASTVisitor` template causes the `InstanceBodySymbol` visit to use the deduplicated canonical instance body (when available). For this analysis we don't need to re-analyze duplicate instance so we can just keep track of which bodies we've visited and avoid descending into already-visited bodies.
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…odule instances (llvm#10338) Currently capture analysis unconditionally descends into all module instance bodies. This forces slang to instantiate complete ASTs for all module instances, transitively. For large designs this does not scale. For example with one 7M LOC Verilog example, ImportVerilog consumes more than 200GB of memory before crashing with OOM. Slang lets clients avoid this problem via "canonical instance bodies" that express deduplication. Setting `VisitCanonical` to true in the `ASTVisitor` template causes the `InstanceBodySymbol` visit to use the deduplicated canonical instance body (when available). For this analysis we don't need to re-analyze duplicate instances, so we can just keep track of which bodies we've visited and avoid descending into already-visited bodies.
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…l module instances Currently `HierarchicalNames` unconditionally descends into all module instance bodies. This forces slang to instantiate complete ASTs for all module instances, transitively. For large designs this does not scale. For example with one 7M LOC Verilog example, ImportVerilog consumes more than 200GB of memory before crashing with OOM. So, use slang's canonical module bodies to avoid re-traversing identical modules. With this fixed on top of PR llvm#10338, the aforementioned example is imported quite quickly, consuming no more than 30GB of memory.
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…l module instances Currently `HierarchicalNames` unconditionally descends into all module instance bodies. This forces slang to instantiate complete ASTs for all module instances, transitively. For large designs this does not scale. For example with one 7M LOC Verilog example, ImportVerilog consumes more than 200GB of memory before crashing with OOM. So, use slang's canonical module bodies to avoid re-traversing identical modules. With this fixed on top of PR llvm#10338, the aforementioned example is imported quite quickly, consuming no more than 30GB of memory.
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…l module instances Currently `HierarchicalNames` unconditionally descends into all module instance bodies. This forces slang to instantiate complete ASTs for all module instances, transitively. For large designs this does not scale. For example with one 7M LOC Verilog example, ImportVerilog consumes more than 200GB of memory before crashing with OOM. So, use slang's canonical module bodies to avoid re-traversing identical modules. With this fixed on top of PR llvm#10338, the aforementioned example is imported quite quickly, consuming no more than 30GB of memory.
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…l module instances Currently `HierarchicalNames` unconditionally descends into all module instance bodies. This forces slang to instantiate complete ASTs for all module instances, transitively. For large designs this does not scale. For example with one 7M LOC Verilog example, ImportVerilog consumes more than 200GB of memory before crashing with OOM. So, use slang's canonical module bodies to avoid re-traversing identical modules. With this fixed on top of PR llvm#10338, the aforementioned example is imported quite quickly, consuming no more than 30GB of memory.
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Currently capture analysis unconditionally descends into all module instance bodies. This forces slang to instantiate complete ASTs for all module instances, transitively. For large designs this does not scale. For example with one 7M LOC Verilog example, ImportVerilog consumes more than 200GB of memory before crashing with OOM.
Slang lets clients avoid this problem via "canonical instance bodies" that express deduplication. Setting
VisitCanonicalto true in theASTVisitortemplate causes theInstanceBodySymbolvisit to use the deduplicated canonical instance body (when available). For this analysis we don't need to re-analyze duplicate instance so we can just keep track of which bodies we've visited and avoid descending into already-visited bodies.To make this work correctly we have to also ensure that MLIR generation uses the same canonical module bodies, so e.g. the
SubroutineSymbols encountered during MLIR generation are the sameSubroutineSymbols thatCaptureAnalysisrecorded. Currently the importer does its own module deduplication which might choose different slang AST module bodies. So, replace the importer's deduplication with slang's canonical module bodies.