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1 | 1 | // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ |
2 | 2 | // RUN: dxil-pc-shadermodel6.3-compute %s -fnative-half-type -fnative-int16-type \ |
3 | 3 | // RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ |
4 | | -// RUN: --check-prefixes=CHECK,CHECK-DXIL,CHECK-NATIVE_HALF |
| 4 | +// RUN: --check-prefixes=CHECK,CHECK-NATIVE_HALF -DTARGET=dx -DCC="" |
5 | 5 | // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ |
6 | 6 | // RUN: dxil-pc-shadermodel6.3-compute %s -emit-llvm -disable-llvm-passes \ |
7 | | -// RUN: -o - | FileCheck %s --check-prefixes=CHECK,CHECK-DXIL,CHECK-NO_HALF |
| 7 | +// RUN: -o - | FileCheck %s --check-prefixes=CHECK,CHECK-NO_HALF -DTARGET=dx -DCC="" |
8 | 8 |
|
9 | 9 | // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ |
10 | 10 | // RUN: spirv-unknown-vulkan-compute %s -fnative-half-type -fnative-int16-type \ |
11 | 11 | // RUN: -emit-llvm -disable-llvm-passes -o - | FileCheck %s \ |
12 | | -// RUN: --check-prefixes=CHECK,CHECK-SPIRV,CHECK-NATIVE_HALF |
| 12 | +// RUN: --check-prefixes=CHECK,CHECK-NATIVE_HALF -DTARGET=spv -DCC="spir_func " |
13 | 13 | // RUN: %clang_cc1 -finclude-default-header -x hlsl -triple \ |
14 | 14 | // RUN: spirv-unknown-vulkan-compute %s -emit-llvm -disable-llvm-passes \ |
15 | | -// RUN: -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SPIRV,CHECK-NO_HALF |
| 15 | +// RUN: -o - | FileCheck %s --check-prefixes=CHECK,CHECK-NO_HALF -DTARGET=spv -DCC="spir_func " |
16 | 16 |
|
17 | | -// Capture the expected interchange format so not every check needs to be duplicated |
18 | | -// CHECK-DXIL: %[[RET:.*]] = call [[CC:]]i32 @llvm.[[ICF:dx]].quad.read.across.diagonal.i32(i32 %[[#]]) |
19 | | -// CHECK-SPIRV: %[[RET:.*]] = call [[CC:spir_func ]]i32 @llvm.[[ICF:spv]].quad.read.across.diagonal.i32(i32 %[[#]]) |
| 17 | +// CHECK: %[[RET:.*]] = call [[CC]]i32 @llvm.[[TARGET]].quad.read.across.diagonal.i32(i32 %[[#]]) |
20 | 18 | // CHECK: ret i32 %[[RET]] |
21 | 19 | int test_int(int expr) { return QuadReadAcrossDiagonal(expr); } |
22 | 20 |
|
23 | | -// CHECK: %[[RET:.*]] = call [[CC]]<2 x i32> @llvm.[[ICF]].quad.read.across.diagonal.v2i32(<2 x i32> %[[#]]) |
| 21 | +// CHECK: %[[RET:.*]] = call [[CC]]<2 x i32> @llvm.[[TARGET]].quad.read.across.diagonal.v2i32(<2 x i32> %[[#]]) |
24 | 22 | // CHECK: ret <2 x i32> %[[RET]] |
25 | 23 | int2 test_int2(int2 expr) { return QuadReadAcrossDiagonal(expr); } |
26 | 24 |
|
27 | | -// CHECK: %[[RET:.*]] = call [[CC]]<3 x i32> @llvm.[[ICF]].quad.read.across.diagonal.v3i32(<3 x i32> %[[#]]) |
| 25 | +// CHECK: %[[RET:.*]] = call [[CC]]<3 x i32> @llvm.[[TARGET]].quad.read.across.diagonal.v3i32(<3 x i32> %[[#]]) |
28 | 26 | // CHECK: ret <3 x i32> %[[RET]] |
29 | 27 | int3 test_int3(int3 expr) { return QuadReadAcrossDiagonal(expr); } |
30 | 28 |
|
31 | | -// CHECK: %[[RET:.*]] = call [[CC]]<4 x i32> @llvm.[[ICF]].quad.read.across.diagonal.v4i32(<4 x i32> %[[#]]) |
| 29 | +// CHECK: %[[RET:.*]] = call [[CC]]<4 x i32> @llvm.[[TARGET]].quad.read.across.diagonal.v4i32(<4 x i32> %[[#]]) |
32 | 30 | // CHECK: ret <4 x i32> %[[RET]] |
33 | 31 | int4 test_int4(int4 expr) { return QuadReadAcrossDiagonal(expr); } |
34 | 32 |
|
35 | | -// CHECK: %[[RET:.*]] = call [[CC]]i32 @llvm.[[ICF]].quad.read.across.diagonal.i32(i32 %[[#]]) |
| 33 | +// CHECK: %[[RET:.*]] = call [[CC]]i32 @llvm.[[TARGET]].quad.read.across.diagonal.i32(i32 %[[#]]) |
36 | 34 | // CHECK: ret i32 %[[RET]] |
37 | 35 | uint test_uint(uint expr) { return QuadReadAcrossDiagonal(expr); } |
38 | 36 |
|
39 | | -// CHECK: %[[RET:.*]] = call [[CC]]<2 x i32> @llvm.[[ICF]].quad.read.across.diagonal.v2i32(<2 x i32> %[[#]]) |
| 37 | +// CHECK: %[[RET:.*]] = call [[CC]]<2 x i32> @llvm.[[TARGET]].quad.read.across.diagonal.v2i32(<2 x i32> %[[#]]) |
40 | 38 | // CHECK: ret <2 x i32> %[[RET]] |
41 | 39 | uint2 test_uint2(uint2 expr) { return QuadReadAcrossDiagonal(expr); } |
42 | 40 |
|
43 | | -// CHECK: %[[RET:.*]] = call [[CC]]<3 x i32> @llvm.[[ICF]].quad.read.across.diagonal.v3i32(<3 x i32> %[[#]]) |
| 41 | +// CHECK: %[[RET:.*]] = call [[CC]]<3 x i32> @llvm.[[TARGET]].quad.read.across.diagonal.v3i32(<3 x i32> %[[#]]) |
44 | 42 | // CHECK: ret <3 x i32> %[[RET]] |
45 | 43 | uint3 test_uint3(uint3 expr) { return QuadReadAcrossDiagonal(expr); } |
46 | 44 |
|
47 | | -// CHECK: %[[RET:.*]] = call [[CC]]<4 x i32> @llvm.[[ICF]].quad.read.across.diagonal.v4i32(<4 x i32> %[[#]]) |
| 45 | +// CHECK: %[[RET:.*]] = call [[CC]]<4 x i32> @llvm.[[TARGET]].quad.read.across.diagonal.v4i32(<4 x i32> %[[#]]) |
48 | 46 | // CHECK: ret <4 x i32> %[[RET]] |
49 | 47 | uint4 test_uint4(uint4 expr) { return QuadReadAcrossDiagonal(expr); } |
50 | 48 |
|
51 | | -// CHECK: %[[RET:.*]] = call [[CC]]i64 @llvm.[[ICF]].quad.read.across.diagonal.i64(i64 %[[#]]) |
| 49 | +// CHECK: %[[RET:.*]] = call [[CC]]i64 @llvm.[[TARGET]].quad.read.across.diagonal.i64(i64 %[[#]]) |
52 | 50 | // CHECK: ret i64 %[[RET]] |
53 | 51 | int64_t test_int64_t(int64_t expr) { return QuadReadAcrossDiagonal(expr); } |
54 | 52 |
|
55 | | -// CHECK: %[[RET:.*]] = call [[CC]]<2 x i64> @llvm.[[ICF]].quad.read.across.diagonal.v2i64(<2 x i64> %[[#]]) |
| 53 | +// CHECK: %[[RET:.*]] = call [[CC]]<2 x i64> @llvm.[[TARGET]].quad.read.across.diagonal.v2i64(<2 x i64> %[[#]]) |
56 | 54 | // CHECK: ret <2 x i64> %[[RET]] |
57 | 55 | int64_t2 test_int64_t2(int64_t2 expr) { return QuadReadAcrossDiagonal(expr); } |
58 | 56 |
|
59 | | -// CHECK: %[[RET:.*]] = call [[CC]]<3 x i64> @llvm.[[ICF]].quad.read.across.diagonal.v3i64(<3 x i64> %[[#]]) |
| 57 | +// CHECK: %[[RET:.*]] = call [[CC]]<3 x i64> @llvm.[[TARGET]].quad.read.across.diagonal.v3i64(<3 x i64> %[[#]]) |
60 | 58 | // CHECK: ret <3 x i64> %[[RET]] |
61 | 59 | int64_t3 test_int64_t3(int64_t3 expr) { return QuadReadAcrossDiagonal(expr); } |
62 | 60 |
|
63 | | -// CHECK: %[[RET:.*]] = call [[CC]]<4 x i64> @llvm.[[ICF]].quad.read.across.diagonal.v4i64(<4 x i64> %[[#]]) |
| 61 | +// CHECK: %[[RET:.*]] = call [[CC]]<4 x i64> @llvm.[[TARGET]].quad.read.across.diagonal.v4i64(<4 x i64> %[[#]]) |
64 | 62 | // CHECK: ret <4 x i64> %[[RET]] |
65 | 63 | int64_t4 test_int64_t4(int64_t4 expr) { return QuadReadAcrossDiagonal(expr); } |
66 | 64 |
|
67 | | -// CHECK: %[[RET:.*]] = call [[CC]]i64 @llvm.[[ICF]].quad.read.across.diagonal.i64(i64 %[[#]]) |
| 65 | +// CHECK: %[[RET:.*]] = call [[CC]]i64 @llvm.[[TARGET]].quad.read.across.diagonal.i64(i64 %[[#]]) |
68 | 66 | // CHECK: ret i64 %[[RET]] |
69 | 67 | uint64_t test_uint64_t(uint64_t expr) { return QuadReadAcrossDiagonal(expr); } |
70 | 68 |
|
71 | | -// CHECK: %[[RET:.*]] = call [[CC]]<2 x i64> @llvm.[[ICF]].quad.read.across.diagonal.v2i64(<2 x i64> %[[#]]) |
| 69 | +// CHECK: %[[RET:.*]] = call [[CC]]<2 x i64> @llvm.[[TARGET]].quad.read.across.diagonal.v2i64(<2 x i64> %[[#]]) |
72 | 70 | // CHECK: ret <2 x i64> %[[RET]] |
73 | 71 | uint64_t2 test_uint64_t2(uint64_t2 expr) { return QuadReadAcrossDiagonal(expr); } |
74 | 72 |
|
75 | | -// CHECK: %[[RET:.*]] = call [[CC]]<3 x i64> @llvm.[[ICF]].quad.read.across.diagonal.v3i64(<3 x i64> %[[#]]) |
| 73 | +// CHECK: %[[RET:.*]] = call [[CC]]<3 x i64> @llvm.[[TARGET]].quad.read.across.diagonal.v3i64(<3 x i64> %[[#]]) |
76 | 74 | // CHECK: ret <3 x i64> %[[RET]] |
77 | 75 | uint64_t3 test_uint64_t3(uint64_t3 expr) { return QuadReadAcrossDiagonal(expr); } |
78 | 76 |
|
79 | | -// CHECK: %[[RET:.*]] = call [[CC]]<4 x i64> @llvm.[[ICF]].quad.read.across.diagonal.v4i64(<4 x i64> %[[#]]) |
| 77 | +// CHECK: %[[RET:.*]] = call [[CC]]<4 x i64> @llvm.[[TARGET]].quad.read.across.diagonal.v4i64(<4 x i64> %[[#]]) |
80 | 78 | // CHECK: ret <4 x i64> %[[RET]] |
81 | 79 | uint64_t4 test_uint64_t4(uint64_t4 expr) { return QuadReadAcrossDiagonal(expr); } |
82 | 80 |
|
83 | | -// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]float @llvm.[[ICF]].quad.read.across.diagonal.f32(float %[[#]]) |
| 81 | +// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]float @llvm.[[TARGET]].quad.read.across.diagonal.f32(float %[[#]]) |
84 | 82 | // CHECK: ret float %[[RET]] |
85 | 83 | float test_float(float expr) { return QuadReadAcrossDiagonal(expr); } |
86 | 84 |
|
87 | | -// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<2 x float> @llvm.[[ICF]].quad.read.across.diagonal.v2f32(<2 x float> %[[#]]) |
| 85 | +// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<2 x float> @llvm.[[TARGET]].quad.read.across.diagonal.v2f32(<2 x float> %[[#]]) |
88 | 86 | // CHECK: ret <2 x float> %[[RET]] |
89 | 87 | float2 test_float2(float2 expr) { return QuadReadAcrossDiagonal(expr); } |
90 | 88 |
|
91 | | -// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<3 x float> @llvm.[[ICF]].quad.read.across.diagonal.v3f32(<3 x float> %[[#]]) |
| 89 | +// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<3 x float> @llvm.[[TARGET]].quad.read.across.diagonal.v3f32(<3 x float> %[[#]]) |
92 | 90 | // CHECK: ret <3 x float> %[[RET]] |
93 | 91 | float3 test_float3(float3 expr) { return QuadReadAcrossDiagonal(expr); } |
94 | 92 |
|
95 | | -// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<4 x float> @llvm.[[ICF]].quad.read.across.diagonal.v4f32(<4 x float> %[[#]]) |
| 93 | +// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<4 x float> @llvm.[[TARGET]].quad.read.across.diagonal.v4f32(<4 x float> %[[#]]) |
96 | 94 | // CHECK: ret <4 x float> %[[RET]] |
97 | 95 | float4 test_float4(float4 expr) { return QuadReadAcrossDiagonal(expr); } |
98 | 96 |
|
99 | | -// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]double @llvm.[[ICF]].quad.read.across.diagonal.f64(double %[[#]]) |
| 97 | +// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]double @llvm.[[TARGET]].quad.read.across.diagonal.f64(double %[[#]]) |
100 | 98 | // CHECK: ret double %[[RET]] |
101 | 99 | double test_double(double expr) { return QuadReadAcrossDiagonal(expr); } |
102 | 100 |
|
103 | | -// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<2 x double> @llvm.[[ICF]].quad.read.across.diagonal.v2f64(<2 x double> %[[#]]) |
| 101 | +// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<2 x double> @llvm.[[TARGET]].quad.read.across.diagonal.v2f64(<2 x double> %[[#]]) |
104 | 102 | // CHECK: ret <2 x double> %[[RET]] |
105 | 103 | double2 test_double2(double2 expr) { return QuadReadAcrossDiagonal(expr); } |
106 | 104 |
|
107 | | -// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<3 x double> @llvm.[[ICF]].quad.read.across.diagonal.v3f64(<3 x double> %[[#]]) |
| 105 | +// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<3 x double> @llvm.[[TARGET]].quad.read.across.diagonal.v3f64(<3 x double> %[[#]]) |
108 | 106 | // CHECK: ret <3 x double> %[[RET]] |
109 | 107 | double3 test_double3(double3 expr) { return QuadReadAcrossDiagonal(expr); } |
110 | 108 |
|
111 | | -// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<4 x double> @llvm.[[ICF]].quad.read.across.diagonal.v4f64(<4 x double> %[[#]]) |
| 109 | +// CHECK: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<4 x double> @llvm.[[TARGET]].quad.read.across.diagonal.v4f64(<4 x double> %[[#]]) |
112 | 110 | // CHECK: ret <4 x double> %[[RET]] |
113 | 111 | double4 test_double4(double4 expr) { return QuadReadAcrossDiagonal(expr); } |
114 | 112 |
|
115 | | -// CHECK-NATIVE_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]half @llvm.[[ICF]].quad.read.across.diagonal.f16(half %[[#]]) |
| 113 | +// CHECK-NATIVE_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]half @llvm.[[TARGET]].quad.read.across.diagonal.f16(half %[[#]]) |
116 | 114 | // CHECK-NATIVE_HALF: ret half %[[RET]] |
117 | | -// CHECK-NO_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]float @llvm.[[ICF]].quad.read.across.diagonal.f32(float %[[#]]) |
| 115 | +// CHECK-NO_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]float @llvm.[[TARGET]].quad.read.across.diagonal.f32(float %[[#]]) |
118 | 116 | // CHECK-NO_HALF: ret float %[[RET]] |
119 | 117 | half test_half(half expr) { return QuadReadAcrossDiagonal(expr); } |
120 | 118 |
|
121 | | -// CHECK-NATIVE_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<2 x half> @llvm.[[ICF]].quad.read.across.diagonal.v2f16(<2 x half> %[[#]]) |
| 119 | +// CHECK-NATIVE_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<2 x half> @llvm.[[TARGET]].quad.read.across.diagonal.v2f16(<2 x half> %[[#]]) |
122 | 120 | // CHECK-NATIVE_HALF: ret <2 x half> %[[RET]] |
123 | | -// CHECK-NO_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<2 x float> @llvm.[[ICF]].quad.read.across.diagonal.v2f32(<2 x float> %[[#]]) |
| 121 | +// CHECK-NO_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<2 x float> @llvm.[[TARGET]].quad.read.across.diagonal.v2f32(<2 x float> %[[#]]) |
124 | 122 | // CHECK-NO_HALF: ret <2 x float> %[[RET]] |
125 | 123 | half2 test_half2(half2 expr) { return QuadReadAcrossDiagonal(expr); } |
126 | 124 |
|
127 | | -// CHECK-NATIVE_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<3 x half> @llvm.[[ICF]].quad.read.across.diagonal.v3f16(<3 x half> %[[#]]) |
| 125 | +// CHECK-NATIVE_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<3 x half> @llvm.[[TARGET]].quad.read.across.diagonal.v3f16(<3 x half> %[[#]]) |
128 | 126 | // CHECK-NATIVE_HALF: ret <3 x half> %[[RET]] |
129 | | -// CHECK-NO_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<3 x float> @llvm.[[ICF]].quad.read.across.diagonal.v3f32(<3 x float> %[[#]]) |
| 127 | +// CHECK-NO_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<3 x float> @llvm.[[TARGET]].quad.read.across.diagonal.v3f32(<3 x float> %[[#]]) |
130 | 128 | // CHECK-NO_HALF: ret <3 x float> %[[RET]] |
131 | 129 | half3 test_half3(half3 expr) { return QuadReadAcrossDiagonal(expr); } |
132 | 130 |
|
133 | | -// CHECK-NATIVE_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<4 x half> @llvm.[[ICF]].quad.read.across.diagonal.v4f16(<4 x half> %[[#]]) |
| 131 | +// CHECK-NATIVE_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<4 x half> @llvm.[[TARGET]].quad.read.across.diagonal.v4f16(<4 x half> %[[#]]) |
134 | 132 | // CHECK-NATIVE_HALF: ret <4 x half> %[[RET]] |
135 | | -// CHECK-NO_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<4 x float> @llvm.[[ICF]].quad.read.across.diagonal.v4f32(<4 x float> %[[#]]) |
| 133 | +// CHECK-NO_HALF: %[[RET:.*]] = call reassoc nnan ninf nsz arcp afn [[CC]]<4 x float> @llvm.[[TARGET]].quad.read.across.diagonal.v4f32(<4 x float> %[[#]]) |
136 | 134 | // CHECK-NO_HALF: ret <4 x float> %[[RET]] |
137 | 135 | half4 test_half4(half4 expr) { return QuadReadAcrossDiagonal(expr); } |
138 | 136 |
|
139 | 137 | #ifdef __HLSL_ENABLE_16_BIT |
140 | | -// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]i16 @llvm.[[ICF]].quad.read.across.diagonal.i16(i16 %[[#]]) |
| 138 | +// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]i16 @llvm.[[TARGET]].quad.read.across.diagonal.i16(i16 %[[#]]) |
141 | 139 | // CHECK-NATIVE_HALF: ret i16 %[[RET]] |
142 | 140 | int16_t test_int16_t(int16_t expr) { return QuadReadAcrossDiagonal(expr); } |
143 | 141 |
|
144 | | -// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]<2 x i16> @llvm.[[ICF]].quad.read.across.diagonal.v2i16(<2 x i16> %[[#]]) |
| 142 | +// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]<2 x i16> @llvm.[[TARGET]].quad.read.across.diagonal.v2i16(<2 x i16> %[[#]]) |
145 | 143 | // CHECK-NATIVE_HALF: ret <2 x i16> %[[RET]] |
146 | 144 | int16_t2 test_int16_t2(int16_t2 expr) { return QuadReadAcrossDiagonal(expr); } |
147 | 145 |
|
148 | | -// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]<3 x i16> @llvm.[[ICF]].quad.read.across.diagonal.v3i16(<3 x i16> %[[#]]) |
| 146 | +// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]<3 x i16> @llvm.[[TARGET]].quad.read.across.diagonal.v3i16(<3 x i16> %[[#]]) |
149 | 147 | // CHECK-NATIVE_HALF: ret <3 x i16> %[[RET]] |
150 | 148 | int16_t3 test_int16_t3(int16_t3 expr) { return QuadReadAcrossDiagonal(expr); } |
151 | 149 |
|
152 | | -// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]<4 x i16> @llvm.[[ICF]].quad.read.across.diagonal.v4i16(<4 x i16> %[[#]]) |
| 150 | +// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]<4 x i16> @llvm.[[TARGET]].quad.read.across.diagonal.v4i16(<4 x i16> %[[#]]) |
153 | 151 | // CHECK-NATIVE_HALF: ret <4 x i16> %[[RET]] |
154 | 152 | int16_t4 test_int16_t4(int16_t4 expr) { return QuadReadAcrossDiagonal(expr); } |
155 | 153 |
|
156 | | -// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]i16 @llvm.[[ICF]].quad.read.across.diagonal.i16(i16 %[[#]]) |
| 154 | +// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]i16 @llvm.[[TARGET]].quad.read.across.diagonal.i16(i16 %[[#]]) |
157 | 155 | // CHECK-NATIVE_HALF: ret i16 %[[RET]] |
158 | 156 | uint16_t test_uint16_t(uint16_t expr) { return QuadReadAcrossDiagonal(expr); } |
159 | 157 |
|
160 | | -// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]<2 x i16> @llvm.[[ICF]].quad.read.across.diagonal.v2i16(<2 x i16> %[[#]]) |
| 158 | +// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]<2 x i16> @llvm.[[TARGET]].quad.read.across.diagonal.v2i16(<2 x i16> %[[#]]) |
161 | 159 | // CHECK-NATIVE_HALF: ret <2 x i16> %[[RET]] |
162 | 160 | uint16_t2 test_uint16_t2(uint16_t2 expr) { return QuadReadAcrossDiagonal(expr); } |
163 | 161 |
|
164 | | -// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]<3 x i16> @llvm.[[ICF]].quad.read.across.diagonal.v3i16(<3 x i16> %[[#]]) |
| 162 | +// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]<3 x i16> @llvm.[[TARGET]].quad.read.across.diagonal.v3i16(<3 x i16> %[[#]]) |
165 | 163 | // CHECK-NATIVE_HALF: ret <3 x i16> %[[RET]] |
166 | 164 | uint16_t3 test_uint16_t3(uint16_t3 expr) { return QuadReadAcrossDiagonal(expr); } |
167 | 165 |
|
168 | | -// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]<4 x i16> @llvm.[[ICF]].quad.read.across.diagonal.v4i16(<4 x i16> %[[#]]) |
| 166 | +// CHECK-NATIVE_HALF: %[[RET:.*]] = call [[CC]]<4 x i16> @llvm.[[TARGET]].quad.read.across.diagonal.v4i16(<4 x i16> %[[#]]) |
169 | 167 | // CHECK-NATIVE_HALF: ret <4 x i16> %[[RET]] |
170 | 168 | uint16_t4 test_uint16_t4(uint16_t4 expr) { return QuadReadAcrossDiagonal(expr); } |
171 | 169 | #endif |
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