[NewPM] Port AArch64RedundantCondBranch to the new pass manager (#190897)

Adds a newPM pass for AArch64RedundantCondBranch

- Refactors base logic into an Impl class
- Renames old pass with the "Legacy" suffix
- Adds the new pass manager pass using refactored logic
- Updated existing .mir tests to also test with the New Pass Manager.

Context and motivation in
https://llvm.org/docs/NewPassManager.html#status-of-the-new-and-legacy-pass-managers

Author: kevinwkt

llvm/lib/Target/AArch64/AArch64.h

@@ -162,7 +162,7 @@ void initializeAArch64PostLegalizerLoweringLegacyPass(PassRegistry &);
 void initializeAArch64PreLegalizerCombinerLegacyPass(PassRegistry &);
 void initializeAArch64PromoteConstantPass(PassRegistry&);
 void initializeAArch64RedundantCopyEliminationLegacyPass(PassRegistry &);
-void initializeAArch64RedundantCondBranchPass(PassRegistry &);
+void initializeAArch64RedundantCondBranchLegacyPass(PassRegistry &);
 void initializeAArch64SIMDInstrOptPass(PassRegistry &);
 void initializeAArch64SLSHardeningPass(PassRegistry &);
 void initializeAArch64SpeculationHardeningPass(PassRegistry &);
@@ -204,6 +204,13 @@ class AArch64BranchTargetsPass
                         MachineFunctionAnalysisManager &MFAM);
 };
 
+class AArch64RedundantCondBranchPass
+    : public PassInfoMixin<AArch64RedundantCondBranchPass> {
+public:
+  PreservedAnalyses run(MachineFunction &MF,
+                        MachineFunctionAnalysisManager &MFAM);
+};
+
 class AArch64AdvSIMDScalarPass
     : public PassInfoMixin<AArch64AdvSIMDScalarPass> {
 public:

llvm/lib/Target/AArch64/AArch64PassRegistry.def

@@ -45,6 +45,7 @@ MACHINE_FUNCTION_PASS("aarch64-postlegalizer-lowering",
 MACHINE_FUNCTION_PASS("aarch64-prelegalizer-combiner",
                       AArch64PreLegalizerCombinerPass())
 MACHINE_FUNCTION_PASS("aarch64-ptrauth", AArch64PointerAuthPass())
+MACHINE_FUNCTION_PASS("aarch64-redundantcondbranch", AArch64RedundantCondBranchPass())
 MACHINE_FUNCTION_PASS("aarch64-simd-scalar", AArch64AdvSIMDScalarPass())
 MACHINE_FUNCTION_PASS("aarch64-O0-prelegalizer-combiner",
                       AArch64O0PreLegalizerCombinerPass())

llvm/lib/Target/AArch64/AArch64RedundantCondBranchPass.cpp

@@ -16,40 +16,38 @@
 #include "AArch64.h"
 #include "AArch64InstrInfo.h"
 #include "llvm/CodeGen/MachineFunctionPass.h"
-#include "llvm/CodeGen/MachineInstrBuilder.h"
 #include "llvm/CodeGen/TargetInstrInfo.h"
-#include "llvm/Support/Debug.h"
 
 using namespace llvm;
 
 #define DEBUG_TYPE "aarch64-redundantcondbranch"
 
 namespace {
-class AArch64RedundantCondBranch : public MachineFunctionPass {
+
+class AArch64RedundantCondBranchLegacy : public MachineFunctionPass {
 public:
   static char ID;
-  AArch64RedundantCondBranch() : MachineFunctionPass(ID) {}
+  AArch64RedundantCondBranchLegacy() : MachineFunctionPass(ID) {}
+
+  StringRef getPassName() const override {
+    return "AArch64 Redundant Conditional Branch Elimination";
+  }
 
+protected:
   bool runOnMachineFunction(MachineFunction &MF) override;
 
   MachineFunctionProperties getRequiredProperties() const override {
     return MachineFunctionProperties().setNoVRegs();
   }
-  StringRef getPassName() const override {
-    return "AArch64 Redundant Conditional Branch Elimination";
-  }
 };
-char AArch64RedundantCondBranch::ID = 0;
+char AArch64RedundantCondBranchLegacy::ID = 0;
 } // namespace
 
-INITIALIZE_PASS(AArch64RedundantCondBranch, "aarch64-redundantcondbranch",
+INITIALIZE_PASS(AArch64RedundantCondBranchLegacy, "aarch64-redundantcondbranch",
                 "AArch64 Redundant Conditional Branch Elimination pass", false,
                 false)
 
-bool AArch64RedundantCondBranch::runOnMachineFunction(MachineFunction &MF) {
-  if (skipFunction(MF.getFunction()))
-    return false;
-
+static bool runAArch64RedundantCondBranch(MachineFunction &MF) {
   const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
 
   bool Changed = false;
@@ -58,6 +56,23 @@ bool AArch64RedundantCondBranch::runOnMachineFunction(MachineFunction &MF) {
   return Changed;
 }
 
+bool AArch64RedundantCondBranchLegacy::runOnMachineFunction(
+    MachineFunction &MF) {
+  if (skipFunction(MF.getFunction()))
+    return false;
+
+  return runAArch64RedundantCondBranch(MF);
+}
+
+PreservedAnalyses
+AArch64RedundantCondBranchPass::run(MachineFunction &MF,
+                                    MachineFunctionAnalysisManager &) {
+  if (runAArch64RedundantCondBranch(MF)) {
+    return getMachineFunctionPassPreservedAnalyses();
+  }
+  return PreservedAnalyses::all();
+}
+
 FunctionPass *llvm::createAArch64RedundantCondBranchPass() {
-  return new AArch64RedundantCondBranch();
+  return new AArch64RedundantCondBranchLegacy();
 }

llvm/lib/Target/AArch64/AArch64TargetMachine.cpp

@@ -261,7 +261,7 @@ LLVMInitializeAArch64Target() {
   initializeAArch64PostLegalizerLoweringLegacyPass(PR);
   initializeAArch64PromoteConstantPass(PR);
   initializeAArch64RedundantCopyEliminationLegacyPass(PR);
-  initializeAArch64RedundantCondBranchPass(PR);
+  initializeAArch64RedundantCondBranchLegacyPass(PR);
   initializeAArch64StorePairSuppressPass(PR);
   initializeFalkorHWPFFixPass(PR);
   initializeFalkorMarkStridedAccessesLegacyPass(PR);

llvm/test/CodeGen/AArch64/cbz_wzr.mir

@@ -1,5 +1,6 @@
 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 6
 # RUN: llc -o - %s -mtriple=aarch64-none-eabi -run-pass=machine-cp,aarch64-redundantcondbranch -mcp-use-is-copy-instr | FileCheck %s
+# RUN: llc -o - %s -mtriple=aarch64-none-eabi -passes=machine-cp,aarch64-redundantcondbranch -mcp-use-is-copy-instr | FileCheck %s
 
 ---
 name:            cbz_wzr