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Add RWByteAddressBuffer test to check for 16bit data clobbering (#1120)
The new test writes across all threads to a buffer, each to the next half of the word. While none of the writes overlap the 16bits, if implemented using a load/mask/store pattern the resulting writes can lead to race conditions between the threads and clobber data across the 32bit values underpinning the RWByteAddressBuffer. Importantly this test reveals a bug in the RWByteAddressBuffer implementation in DXC. I suspect the solution to this in Clang (and to some other related issues) is to implement the RWByteAddressBuffer as untyped pointers if possible. See microsoft/DirectXShaderCompiler#8172
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#--- source.hlsl
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// This test checks that we don't do any clobbering within a single word when
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// writing 16bit values to the same word from multiple threads.
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ByteAddressBuffer In : register(t0);
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RWByteAddressBuffer Out : register(u1);
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[numthreads(32,1,1)]
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void main(uint3 TID : SV_GroupThreadID) {
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int16_t InVal = In.Load<int16_t>(TID.x * 2);
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Out.Store<int16_t>(TID.x * 2, InVal);
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}
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//--- pipeline.yaml
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---
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Shaders:
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- Stage: Compute
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Entry: main
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DispatchParameters:
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DispatchGroupCount: [32, 1, 1]
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Buffers:
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- Name: In0
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Format: Int16
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Stride: 2
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Data: [ 1, 2, 3, 4, 5, 6, 7, 8,
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9, 10, 11, 12, 13, 14, 15, 16,
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17, 18, 19, 20, 21, 22, 23, 24,
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25, 26, 27, 28, 29, 30, 31, 32 ]
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- Name: Out
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Format: Int16
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Stride: 2
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FillSize: 64
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- Name: ExpectedOut
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Format: Int16
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Stride: 2
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Data: [ 1, 2, 3, 4, 5, 6, 7, 8,
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9, 10, 11, 12, 13, 14, 15, 16,
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17, 18, 19, 20, 21, 22, 23, 24,
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25, 26, 27, 28, 29, 30, 31, 32 ]
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Results:
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- Result: Test0
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Rule: BufferExact
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Actual: Out
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Expected: ExpectedOut
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DescriptorSets:
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- Resources:
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- Name: In0
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Kind: ByteAddressBuffer
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DirectXBinding:
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Register: 0
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Space: 0
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VulkanBinding:
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Binding: 0
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- Name: Out
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Kind: RWByteAddressBuffer
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DirectXBinding:
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Register: 1
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Space: 0
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VulkanBinding:
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Binding: 1
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...
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#--- end
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# Unimplemented https://github.com/llvm/llvm-project/issues/179560
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# XFAIL: Clang && Vulkan
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# Bug https://github.com/microsoft/DirectXShaderCompiler/issues/8172
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# UNSUPPORTED: DXC && Vulkan
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# REQUIRES: Int16
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# RUN: split-file %s %t
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# RUN: %dxc_target -enable-16bit-types -T cs_6_5 -Fo %t.o %t/source.hlsl
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# RUN: %offloader %t/pipeline.yaml %t.o

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