99#include "sw/device/lib/base/bitfield.h"
1010#include "sw/device/lib/base/hardened_memory.h"
1111#include "sw/device/lib/base/memory.h"
12- #include "sw/device/lib/crypto/drivers/entropy.h"
1312#include "sw/device/lib/crypto/impl/status.h"
1413
1514#include "hw/top/keymgr_dpe_regs.h"
@@ -74,7 +73,7 @@ static status_t keymgr_dpe_key_gen_start(
7473 abs_mmio_write32 (kBase + KEYMGR_DPE_START_REG_OFFSET ,
7574 1 << KEYMGR_DPE_START_EN_BIT );
7675
77- return OTCRYPTO_OK ;
76+ return LAUNDERED_OTCRYPTO_OK ;
7877}
7978
8079/**
@@ -107,7 +106,7 @@ static status_t keymgr_dpe_wait_until_done(void) {
107106 // be possible.
108107 // The `IDLE` status is left unhandled because the keymgr should never be
109108 // idle after an operation has been started by the caller.
110- switch (status ) {
109+ switch (launder32 ( status ) ) {
111110 case KEYMGR_DPE_OP_STATUS_STATUS_VALUE_DONE_SUCCESS :
112111 HARDENED_CHECK_EQ (launder32 (status ),
113112 KEYMGR_DPE_OP_STATUS_STATUS_VALUE_DONE_SUCCESS );
@@ -122,11 +121,11 @@ static status_t keymgr_dpe_wait_until_done(void) {
122121 KEYMGR_DPE_OP_STATUS_STATUS_VALUE_DONE_ERROR );
123122 return OTCRYPTO_RECOV_ERR ;
124123 }
124+ default :
125+ // Should be unreachable.
126+ HARDENED_TRAP ();
127+ return OTCRYPTO_FATAL_ERR ;
125128 }
126-
127- // Should be unreachable.
128- HARDENED_TRAP ();
129- return OTCRYPTO_FATAL_ERR ;
130129}
131130
132131/**
@@ -188,8 +187,7 @@ static status_t keymgr_dpe_wait_until_done(void) {
188187status_t keymgr_dpe_generate_key_sw (
189188 const keymgr_dpe_diversification_t diversification ,
190189 keymgr_dpe_output_t * key ) {
191- // Ensure that the entropy complex has been initialized and keymgr is idle.
192- HARDENED_TRY (entropy_complex_check ());
190+ // Ensure the keymgr dpe is idle
193191 HARDENED_TRY (keymgr_dpe_is_idle ());
194192
195193 // Set the control register to generate a software-visible key.
@@ -221,9 +219,7 @@ status_t keymgr_dpe_generate_key_sw(
221219
222220status_t keymgr_dpe_generate_key_aes (
223221 keymgr_dpe_diversification_t diversification ) {
224- // Ensure that the entropy complex has been initialized and keymgr dpe is
225- // idle.
226- HARDENED_TRY (entropy_complex_check ());
222+ // Ensure the keymgr dpe is idle
227223 HARDENED_TRY (keymgr_dpe_is_idle ());
228224
229225 // Set the control register to generate an AES key.
@@ -240,9 +236,7 @@ status_t keymgr_dpe_generate_key_aes(
240236
241237status_t keymgr_dpe_generate_key_kmac (
242238 keymgr_dpe_diversification_t diversification ) {
243- // Ensure that the entropy complex has been initialized and keymgr dpe is
244- // idle.
245- HARDENED_TRY (entropy_complex_check ());
239+ // Ensure the keymgr dpe is idle
246240 HARDENED_TRY (keymgr_dpe_is_idle ());
247241
248242 // Set the control register to generate a KMAC key.
@@ -258,9 +252,7 @@ status_t keymgr_dpe_generate_key_kmac(
258252
259253status_t keymgr_dpe_generate_key_otbn (
260254 keymgr_dpe_diversification_t diversification ) {
261- // Ensure that the entropy complex has been initialized and keymgr dpe is
262- // idle.
263- HARDENED_TRY (entropy_complex_check ());
255+ // Ensure the keymgr dpe is idle
264256 HARDENED_TRY (keymgr_dpe_is_idle ());
265257
266258 // Set the control register to generate an OTBN key.
@@ -285,9 +277,7 @@ status_t keymgr_dpe_generate_key_otbn(
285277 * @param slot Value to write to the SIDELOAD_CLEAR register.
286278 */
287279static status_t keymgr_dpe_sideload_clear (uint32_t slot ) {
288- // Ensure that the entropy complex has been initialized and keymgr dpe is
289- // idle.
290- HARDENED_TRY (entropy_complex_check ());
280+ // Ensure the keymgr dpe is idle
291281 HARDENED_TRY (keymgr_dpe_is_idle ());
292282
293283 // Set SIDELOAD_CLEAR to begin continuously clearing the requested slot.
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