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thommythomasothommythomaso
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[rv_core_ibex,rtl] Add and stub TRVK signals
Signed-off-by: Thomas Benz <tbenz@lowrisc.org>
1 parent c9d19ca commit 2977be8

4 files changed

Lines changed: 76 additions & 4 deletions

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‎hw/ip_templates/rv_core_ibex/rtl/rv_core_ibex.sv.tpl‎

Lines changed: 19 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@ module ${module_instance_name}
1414
import rv_core_ibex_pkg::*;
1515
import ${module_instance_name}_reg_pkg::*;
1616
#(
17+
parameter ibex_pkg::base_isa_e BaseIsa = ibex_pkg::BaseIsaRV32IorCHERIoT,
1718
parameter logic [NumAlerts-1:0] AlertAsyncOn = {NumAlerts{1'b1}},
1819
// Number of cycles a differential skew is tolerated on the alert and escalation signal
1920
parameter int unsigned AlertSkewCycles = 1,
@@ -64,7 +65,9 @@ module ${module_instance_name}
6465
% endif
6566
parameter logic [tlul_pkg::RsvdWidth-1:0] TlulHostUserRsvdBits = 0,
6667
parameter logic [31:0] CsrMvendorId = 32'b0,
67-
parameter logic [31:0] CsrMimpId = 32'b0
68+
parameter logic [31:0] CsrMimpId = 32'b0,
69+
parameter int unsigned CheriotRevBitmapAddrWidth = 32'd9,
70+
parameter int unsigned CheriotRevBitmapBaseAddr = 32'h0
6871
) (
6972
// Clock and Reset
7073
input logic clk_i,
@@ -444,6 +447,7 @@ module ${module_instance_name}
444447

445448
ibex_pkg::crash_dump_t crash_dump;
446449
ibex_top #(
450+
.BaseIsa ( BaseIsa ),
447451
.PMPEnable ( PMPEnable ),
448452
.PMPGranularity ( PMPGranularity ),
449453
.PMPNumRegions ( PMPNumRegions ),
@@ -452,6 +456,8 @@ module ${module_instance_name}
452456
.PMPRstCfg ( PMPRstCfg ),
453457
.PMPRstAddr ( PMPRstAddr ),
454458
.PMPRstMsecCfg ( PMPRstMsecCfg ),
459+
.CheriotRevBitmapAddrWidth ( CheriotRevBitmapAddrWidth),
460+
.CheriotRevBitmapBaseAddr ( CheriotRevBitmapBaseAddr ),
455461
.RV32E ( RV32E ),
456462
.RV32M ( RV32M ),
457463
.RV32B ( RV32B ),
@@ -506,6 +512,8 @@ module ${module_instance_name}
506512
.hart_id_i,
507513
.boot_addr_i,
508514

515+
.trvk_heap_base_addr_i('0), // SRAM base address
516+
509517
.instr_req_o (main_core_instr_req),
510518
.instr_gnt_i (main_core_instr_gnt_ibex),
511519
.instr_rvalid_i (main_core_instr_rvalid),
@@ -522,10 +530,20 @@ module ${module_instance_name}
522530
.data_addr_o (main_core_data_addr),
523531
.data_wdata_o (main_core_data_wdata),
524532
.data_wdata_intg_o (main_core_data_wdata_intg),
533+
.data_tag_o (),
525534
.data_rdata_i (main_core_data_rdata),
526535
.data_rdata_intg_i (main_core_data_rdata_intg),
536+
.data_tag_i ('0),
527537
.data_err_i (main_core_data_err),
528538

539+
.trvk_revbm_req_o (),
540+
.trvk_revbm_gnt_i ('0),
541+
.trvk_revbm_rvalid_i ('0),
542+
.trvk_revbm_addr_o (),
543+
.trvk_revbm_rdata_i ('0),
544+
.trvk_revbm_rdata_intg_i('0),
545+
.trvk_revbm_err_i ('0),
546+
529547
.irq_software_i ( irq_software ),
530548
.irq_timer_i ( irq_timer ),
531549
.irq_external_i ( irq_external ),

‎hw/top_darjeeling/ip_autogen/rv_core_ibex/rtl/rv_core_ibex.sv‎

Lines changed: 19 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@ module rv_core_ibex
1414
import rv_core_ibex_pkg::*;
1515
import rv_core_ibex_reg_pkg::*;
1616
#(
17+
parameter ibex_pkg::base_isa_e BaseIsa = ibex_pkg::BaseIsaRV32IorCHERIoT,
1718
parameter logic [NumAlerts-1:0] AlertAsyncOn = {NumAlerts{1'b1}},
1819
// Number of cycles a differential skew is tolerated on the alert and escalation signal
1920
parameter int unsigned AlertSkewCycles = 1,
@@ -57,7 +58,9 @@ module rv_core_ibex
5758
parameter int unsigned WidthPingCounter = 16,
5859
parameter logic [tlul_pkg::RsvdWidth-1:0] TlulHostUserRsvdBits = 0,
5960
parameter logic [31:0] CsrMvendorId = 32'b0,
60-
parameter logic [31:0] CsrMimpId = 32'b0
61+
parameter logic [31:0] CsrMimpId = 32'b0,
62+
parameter int unsigned CheriotRevBitmapAddrWidth = 32'd9,
63+
parameter int unsigned CheriotRevBitmapBaseAddr = 32'h0
6164
) (
6265
// Clock and Reset
6366
input logic clk_i,
@@ -431,6 +434,7 @@ module rv_core_ibex
431434

432435
ibex_pkg::crash_dump_t crash_dump;
433436
ibex_top #(
437+
.BaseIsa ( BaseIsa ),
434438
.PMPEnable ( PMPEnable ),
435439
.PMPGranularity ( PMPGranularity ),
436440
.PMPNumRegions ( PMPNumRegions ),
@@ -439,6 +443,8 @@ module rv_core_ibex
439443
.PMPRstCfg ( PMPRstCfg ),
440444
.PMPRstAddr ( PMPRstAddr ),
441445
.PMPRstMsecCfg ( PMPRstMsecCfg ),
446+
.CheriotRevBitmapAddrWidth ( CheriotRevBitmapAddrWidth),
447+
.CheriotRevBitmapBaseAddr ( CheriotRevBitmapBaseAddr ),
442448
.RV32E ( RV32E ),
443449
.RV32M ( RV32M ),
444450
.RV32B ( RV32B ),
@@ -493,6 +499,8 @@ module rv_core_ibex
493499
.hart_id_i,
494500
.boot_addr_i,
495501

502+
.trvk_heap_base_addr_i('0), // SRAM base address
503+
496504
.instr_req_o (main_core_instr_req),
497505
.instr_gnt_i (main_core_instr_gnt_ibex),
498506
.instr_rvalid_i (main_core_instr_rvalid),
@@ -509,10 +517,20 @@ module rv_core_ibex
509517
.data_addr_o (main_core_data_addr),
510518
.data_wdata_o (main_core_data_wdata),
511519
.data_wdata_intg_o (main_core_data_wdata_intg),
520+
.data_tag_o (),
512521
.data_rdata_i (main_core_data_rdata),
513522
.data_rdata_intg_i (main_core_data_rdata_intg),
523+
.data_tag_i ('0),
514524
.data_err_i (main_core_data_err),
515525

526+
.trvk_revbm_req_o (),
527+
.trvk_revbm_gnt_i ('0),
528+
.trvk_revbm_rvalid_i ('0),
529+
.trvk_revbm_addr_o (),
530+
.trvk_revbm_rdata_i ('0),
531+
.trvk_revbm_rdata_intg_i('0),
532+
.trvk_revbm_err_i ('0),
533+
516534
.irq_software_i ( irq_software ),
517535
.irq_timer_i ( irq_timer ),
518536
.irq_external_i ( irq_external ),

‎hw/top_earlgrey/ip_autogen/rv_core_ibex/rtl/rv_core_ibex.sv‎

Lines changed: 19 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@ module rv_core_ibex
1414
import rv_core_ibex_pkg::*;
1515
import rv_core_ibex_reg_pkg::*;
1616
#(
17+
parameter ibex_pkg::base_isa_e BaseIsa = ibex_pkg::BaseIsaRV32IorCHERIoT,
1718
parameter logic [NumAlerts-1:0] AlertAsyncOn = {NumAlerts{1'b1}},
1819
// Number of cycles a differential skew is tolerated on the alert and escalation signal
1920
parameter int unsigned AlertSkewCycles = 1,
@@ -57,7 +58,9 @@ module rv_core_ibex
5758
parameter int unsigned WidthPingCounter = 16,
5859
parameter logic [tlul_pkg::RsvdWidth-1:0] TlulHostUserRsvdBits = 0,
5960
parameter logic [31:0] CsrMvendorId = 32'b0,
60-
parameter logic [31:0] CsrMimpId = 32'b0
61+
parameter logic [31:0] CsrMimpId = 32'b0,
62+
parameter int unsigned CheriotRevBitmapAddrWidth = 32'd9,
63+
parameter int unsigned CheriotRevBitmapBaseAddr = 32'h0
6164
) (
6265
// Clock and Reset
6366
input logic clk_i,
@@ -431,6 +434,7 @@ module rv_core_ibex
431434

432435
ibex_pkg::crash_dump_t crash_dump;
433436
ibex_top #(
437+
.BaseIsa ( BaseIsa ),
434438
.PMPEnable ( PMPEnable ),
435439
.PMPGranularity ( PMPGranularity ),
436440
.PMPNumRegions ( PMPNumRegions ),
@@ -439,6 +443,8 @@ module rv_core_ibex
439443
.PMPRstCfg ( PMPRstCfg ),
440444
.PMPRstAddr ( PMPRstAddr ),
441445
.PMPRstMsecCfg ( PMPRstMsecCfg ),
446+
.CheriotRevBitmapAddrWidth ( CheriotRevBitmapAddrWidth),
447+
.CheriotRevBitmapBaseAddr ( CheriotRevBitmapBaseAddr ),
442448
.RV32E ( RV32E ),
443449
.RV32M ( RV32M ),
444450
.RV32B ( RV32B ),
@@ -493,6 +499,8 @@ module rv_core_ibex
493499
.hart_id_i,
494500
.boot_addr_i,
495501

502+
.trvk_heap_base_addr_i('0), // SRAM base address
503+
496504
.instr_req_o (main_core_instr_req),
497505
.instr_gnt_i (main_core_instr_gnt_ibex),
498506
.instr_rvalid_i (main_core_instr_rvalid),
@@ -509,10 +517,20 @@ module rv_core_ibex
509517
.data_addr_o (main_core_data_addr),
510518
.data_wdata_o (main_core_data_wdata),
511519
.data_wdata_intg_o (main_core_data_wdata_intg),
520+
.data_tag_o (),
512521
.data_rdata_i (main_core_data_rdata),
513522
.data_rdata_intg_i (main_core_data_rdata_intg),
523+
.data_tag_i ('0),
514524
.data_err_i (main_core_data_err),
515525

526+
.trvk_revbm_req_o (),
527+
.trvk_revbm_gnt_i ('0),
528+
.trvk_revbm_rvalid_i ('0),
529+
.trvk_revbm_addr_o (),
530+
.trvk_revbm_rdata_i ('0),
531+
.trvk_revbm_rdata_intg_i('0),
532+
.trvk_revbm_err_i ('0),
533+
516534
.irq_software_i ( irq_software ),
517535
.irq_timer_i ( irq_timer ),
518536
.irq_external_i ( irq_external ),

‎hw/top_englishbreakfast/ip_autogen/rv_core_ibex/rtl/rv_core_ibex.sv‎

Lines changed: 19 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@ module rv_core_ibex
1414
import rv_core_ibex_pkg::*;
1515
import rv_core_ibex_reg_pkg::*;
1616
#(
17+
parameter ibex_pkg::base_isa_e BaseIsa = ibex_pkg::BaseIsaRV32IorCHERIoT,
1718
parameter logic [NumAlerts-1:0] AlertAsyncOn = {NumAlerts{1'b1}},
1819
// Number of cycles a differential skew is tolerated on the alert and escalation signal
1920
parameter int unsigned AlertSkewCycles = 1,
@@ -57,7 +58,9 @@ module rv_core_ibex
5758
parameter int unsigned WidthPingCounter = 16,
5859
parameter logic [tlul_pkg::RsvdWidth-1:0] TlulHostUserRsvdBits = 0,
5960
parameter logic [31:0] CsrMvendorId = 32'b0,
60-
parameter logic [31:0] CsrMimpId = 32'b0
61+
parameter logic [31:0] CsrMimpId = 32'b0,
62+
parameter int unsigned CheriotRevBitmapAddrWidth = 32'd9,
63+
parameter int unsigned CheriotRevBitmapBaseAddr = 32'h0
6164
) (
6265
// Clock and Reset
6366
input logic clk_i,
@@ -431,6 +434,7 @@ module rv_core_ibex
431434

432435
ibex_pkg::crash_dump_t crash_dump;
433436
ibex_top #(
437+
.BaseIsa ( BaseIsa ),
434438
.PMPEnable ( PMPEnable ),
435439
.PMPGranularity ( PMPGranularity ),
436440
.PMPNumRegions ( PMPNumRegions ),
@@ -439,6 +443,8 @@ module rv_core_ibex
439443
.PMPRstCfg ( PMPRstCfg ),
440444
.PMPRstAddr ( PMPRstAddr ),
441445
.PMPRstMsecCfg ( PMPRstMsecCfg ),
446+
.CheriotRevBitmapAddrWidth ( CheriotRevBitmapAddrWidth),
447+
.CheriotRevBitmapBaseAddr ( CheriotRevBitmapBaseAddr ),
442448
.RV32E ( RV32E ),
443449
.RV32M ( RV32M ),
444450
.RV32B ( RV32B ),
@@ -493,6 +499,8 @@ module rv_core_ibex
493499
.hart_id_i,
494500
.boot_addr_i,
495501

502+
.trvk_heap_base_addr_i('0), // SRAM base address
503+
496504
.instr_req_o (main_core_instr_req),
497505
.instr_gnt_i (main_core_instr_gnt_ibex),
498506
.instr_rvalid_i (main_core_instr_rvalid),
@@ -509,10 +517,20 @@ module rv_core_ibex
509517
.data_addr_o (main_core_data_addr),
510518
.data_wdata_o (main_core_data_wdata),
511519
.data_wdata_intg_o (main_core_data_wdata_intg),
520+
.data_tag_o (),
512521
.data_rdata_i (main_core_data_rdata),
513522
.data_rdata_intg_i (main_core_data_rdata_intg),
523+
.data_tag_i ('0),
514524
.data_err_i (main_core_data_err),
515525

526+
.trvk_revbm_req_o (),
527+
.trvk_revbm_gnt_i ('0),
528+
.trvk_revbm_rvalid_i ('0),
529+
.trvk_revbm_addr_o (),
530+
.trvk_revbm_rdata_i ('0),
531+
.trvk_revbm_rdata_intg_i('0),
532+
.trvk_revbm_err_i ('0),
533+
516534
.irq_software_i ( irq_software ),
517535
.irq_timer_i ( irq_timer ),
518536
.irq_external_i ( irq_external ),

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