Skip to content

Commit 51eede8

Browse files
committed
[otbn,rtl] Add helper types to efficiently access integrity and data bits of GPRs/CSR/WDR/WSRs
This adds two signal types to easily access the integrity or data bits of the base registers and wide registers. The wide registers are constructed of 8 base registers (integrity is computed per 32 bits). The 3rd type allows an easy assignment of bits from URND to a WSR, especially useful for secure wipe assignments. Signed-off-by: Pascal Etterli <pascal.etterli@lowrisc.org>
1 parent 4ad932d commit 51eede8

2 files changed

Lines changed: 40 additions & 36 deletions

File tree

hw/ip/otbn/rtl/otbn_mai.sv

Lines changed: 20 additions & 36 deletions
Original file line numberDiff line numberDiff line change
@@ -82,15 +82,6 @@ module otbn_mai
8282
logic busy;
8383
} ispr_mai_status_t;
8484

85-
localparam int unsigned MaiEccWidth = BaseIntgWidth - 32'd32;
86-
87-
typedef struct packed {
88-
logic [MaiEccWidth-1:0] intg;
89-
logic [31:0] word;
90-
} otbn_base_intg_word_t;
91-
92-
typedef otbn_base_intg_word_t [BaseWordsPerWLEN-1:0] ispr_mai_t;
93-
9485
typedef struct packed {
9586
logic out_cnt;
9687
logic in_cnt;
@@ -117,13 +108,6 @@ module otbn_mai
117108

118109
typedef logic [MaiCntWidth-1:0] mai_cnt_t;
119110

120-
localparam int unsigned MaiIsprRndRsvdWidth = UrndLen - ExtWLEN;
121-
122-
typedef struct packed {
123-
logic [MaiIsprRndRsvdWidth-1:0] rsvd;
124-
logic [ExtWLEN-1:0] urnd;
125-
} mai_ispr_urnd_t;
126-
127111
typedef struct packed {
128112
logic [MaiCntWidth-1:0] cnt;
129113
logic [31:0] mask_1;
@@ -137,27 +121,27 @@ module otbn_mai
137121
/////////////
138122

139123
// PRNG input
140-
mai_ispr_urnd_t mai_ispr_urnd;
141-
mai_ma_urnd_t mai_ma_urnd;
142-
logic unused_urnd;
124+
otbn_ispr_urnd_t mai_ispr_urnd;
125+
mai_ma_urnd_t mai_ma_urnd;
126+
logic unused_urnd;
143127

144128
// Error signals
145129
mai_reg_intg_violation_err_t mai_reg_intg_violation_err;
146130
logic mai_reg_intg_violation_err_masked;
147131
mai_state_err_t mai_state_err;
148132

149133
// Masking accelerator signals
150-
logic ma_in_valid_q;
151-
logic ma_in_ready;
152-
logic ma_in_consume;
153-
logic ma_out_ready;
154-
logic ma_busy_q;
155-
logic [31:0] ma_in0[32'd2];
156-
logic [31:0] ma_in1[32'd2];
157-
logic [31:0] ma_remask_rand[32'd2];
158-
logic [31:0] ma_result[32'd2];
159-
ispr_mai_t ma_mod;
160-
logic [31:0] ma_mod_lsw;
134+
logic ma_in_valid_q;
135+
logic ma_in_ready;
136+
logic ma_in_consume;
137+
logic ma_out_ready;
138+
logic ma_busy_q;
139+
logic [31:0] ma_in0[32'd2];
140+
logic [31:0] ma_in1[32'd2];
141+
logic [31:0] ma_remask_rand[32'd2];
142+
logic [31:0] ma_result[32'd2];
143+
otbn_wide_intg_word_t ma_mod;
144+
logic [31:0] ma_mod_lsw;
161145

162146
// Counter load values
163147
mai_cnt_t cnt_load_val;
@@ -199,12 +183,12 @@ module otbn_mai
199183
ispr_mai_sw_err_t ispr_mai_sw_err;
200184

201185
// WSRs
202-
ispr_mai_t ispr_mai_in0_s0_d, ispr_mai_in0_s0_q;
203-
ispr_mai_t ispr_mai_in0_s1_d, ispr_mai_in0_s1_q;
204-
ispr_mai_t ispr_mai_in1_s0_d, ispr_mai_in1_s0_q;
205-
ispr_mai_t ispr_mai_in1_s1_d, ispr_mai_in1_s1_q;
206-
ispr_mai_t ispr_mai_res_s0_d, ispr_mai_res_s0_q;
207-
ispr_mai_t ispr_mai_res_s1_d, ispr_mai_res_s1_q;
186+
otbn_wide_intg_word_t ispr_mai_in0_s0_d, ispr_mai_in0_s0_q;
187+
otbn_wide_intg_word_t ispr_mai_in0_s1_d, ispr_mai_in0_s1_q;
188+
otbn_wide_intg_word_t ispr_mai_in1_s0_d, ispr_mai_in1_s0_q;
189+
otbn_wide_intg_word_t ispr_mai_in1_s1_d, ispr_mai_in1_s1_q;
190+
otbn_wide_intg_word_t ispr_mai_res_s0_d, ispr_mai_res_s0_q;
191+
otbn_wide_intg_word_t ispr_mai_res_s1_d, ispr_mai_res_s1_q;
208192

209193

210194
////////////

hw/ip/otbn/rtl/otbn_pkg.sv

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,9 @@ package otbn_pkg;
2424
// Width of base (32b) data path with added integrity bits
2525
parameter int BaseIntgWidth = 39;
2626

27+
// Width of the base (32b) integrity part.
28+
parameter int BaseEccWidth = BaseIntgWidth - 32;
29+
2730
// Number of 32-bit words per WLEN / HWLEN / QWLEN
2831
parameter int BaseWordsPerWLEN = WLEN / 32;
2932
parameter int BaseWordsPerHWLEN = HWLEN / 32;
@@ -74,6 +77,23 @@ package otbn_pkg;
7477
// Number of vector chunk processing elements
7578
parameter int NVecProc = VLEN / VChunkLEN;
7679

80+
// A type to split a base word into integrity and data bits.
81+
typedef struct packed {
82+
logic [BaseEccWidth-1:0] intg;
83+
logic [31:0] word;
84+
} otbn_base_intg_word_t;
85+
86+
// A wide register (WDR or WSR) split into base words with integrity and data each.
87+
typedef otbn_base_intg_word_t [BaseWordsPerWLEN-1:0] otbn_wide_intg_word_t;
88+
89+
// A type to select bits from URND to secure wipe a full WSR.
90+
localparam int unsigned IsprRndRsvdWidth = UrndLen - ExtWLEN;
91+
92+
typedef struct packed {
93+
logic [IsprRndRsvdWidth-1:0] rsvd;
94+
logic [ExtWLEN-1:0] urnd;
95+
} otbn_ispr_urnd_t;
96+
7797
// Toplevel constants ============================================================================
7898

7999
parameter int AlertFatal = 0;

0 commit comments

Comments
 (0)