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[earlgrey/otp] Increase CREATOR_SW_CFG_AST_CFG to 216 bytes
Signed-off-by: Florian Glaser <glaserf@lowrisc.org>
1 parent 72cca24 commit 53fb331

18 files changed

Lines changed: 2196 additions & 562 deletions

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‎hw/top_earlgrey/data/autogen/top_earlgrey.secrets.testing.gen.hjson‎

Lines changed: 72 additions & 92 deletions
Large diffs are not rendered by default.

‎hw/top_earlgrey/data/otp/otp_ctrl_mmap.hjson‎

Lines changed: 2 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -110,7 +110,7 @@
110110
items: [
111111
{
112112
name: "CREATOR_SW_CFG_AST_CFG",
113-
size: "156",
113+
size: "216",
114114
desc: '''
115115
AST configuration data. These values get blindly copied to
116116
the AST CSRs during ROM execution.
@@ -483,14 +483,6 @@
483483
SHA256 hash of the immutable ROM_EXT section.
484484
'''
485485
}
486-
{
487-
name: "CREATOR_SW_CFG_RESERVED",
488-
size: "32",
489-
desc: '''
490-
Unused bits in the CREATOR_SW_CFG OTP partition. These can
491-
be claimed by software as needed.
492-
'''
493-
}
494486
],
495487
desc: '''Software configuration partition.
496488
This is for device-specific calibration data, e.g, clock, LDO, RNG,
@@ -818,7 +810,7 @@
818810
}
819811
{
820812
name: "OWNER_SW_CFG_RESERVED",
821-
size: "128",
813+
size: "96",
822814
desc: '''
823815
Unused bits in the OWNER_SW_CFG OTP partition. These can be
824816
claimed by software as needed.

‎hw/top_earlgrey/ip/ast/data/ast.hjson‎

Lines changed: 211 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -579,6 +579,216 @@
579579
},
580580
],
581581
}, //----------------------------------------------------------------------
582+
{ name: "REGA38",
583+
desc: "AST 38 Register for OTP/ROM Write Testing",
584+
swaccess: "rw",
585+
hwaccess: "hro",
586+
tags: [ // don't write random data to any of the AST registers
587+
"excl:CsrAllTests:CsrExclWrite" ],
588+
fields: [
589+
{ bits: "31:0",
590+
name: "reg32",
591+
desc: "32-bit Register",
592+
resval: "0x26",
593+
},
594+
],
595+
}, //----------------------------------------------------------------------
596+
{ name: "REGA39",
597+
desc: "AST 39 Register for OTP/ROM Write Testing",
598+
swaccess: "rw",
599+
hwaccess: "hro",
600+
tags: [ // don't write random data to any of the AST registers
601+
"excl:CsrAllTests:CsrExclWrite" ],
602+
fields: [
603+
{ bits: "31:0",
604+
name: "reg32",
605+
desc: "32-bit Register",
606+
resval: "0x27",
607+
},
608+
],
609+
}, //----------------------------------------------------------------------
610+
{ name: "REGA40",
611+
desc: "AST 40 Register for OTP/ROM Write Testing",
612+
swaccess: "rw",
613+
hwaccess: "hro",
614+
tags: [ // don't write random data to any of the AST registers
615+
"excl:CsrAllTests:CsrExclWrite" ],
616+
fields: [
617+
{ bits: "31:0",
618+
name: "reg32",
619+
desc: "32-bit Register",
620+
resval: "0x28",
621+
},
622+
],
623+
}, //----------------------------------------------------------------------
624+
{ name: "REGA41",
625+
desc: "AST 41 Register for OTP/ROM Write Testing",
626+
swaccess: "rw",
627+
hwaccess: "hro",
628+
tags: [ // don't write random data to any of the AST registers
629+
"excl:CsrAllTests:CsrExclWrite" ],
630+
fields: [
631+
{ bits: "31:0",
632+
name: "reg32",
633+
desc: "32-bit Register",
634+
resval: "0x29",
635+
},
636+
],
637+
}, //----------------------------------------------------------------------
638+
{ name: "REGA42",
639+
desc: "AST 42 Register for OTP/ROM Write Testing",
640+
swaccess: "rw",
641+
hwaccess: "hro",
642+
tags: [ // don't write random data to any of the AST registers
643+
"excl:CsrAllTests:CsrExclWrite" ],
644+
fields: [
645+
{ bits: "31:0",
646+
name: "reg32",
647+
desc: "32-bit Register",
648+
resval: "0x2a",
649+
},
650+
],
651+
}, //----------------------------------------------------------------------
652+
{ name: "REGA43",
653+
desc: "AST 43 Register for OTP/ROM Write Testing",
654+
swaccess: "rw",
655+
hwaccess: "hro",
656+
tags: [ // don't write random data to any of the AST registers
657+
"excl:CsrAllTests:CsrExclWrite" ],
658+
fields: [
659+
{ bits: "31:0",
660+
name: "reg32",
661+
desc: "32-bit Register",
662+
resval: "0x2b",
663+
},
664+
],
665+
}, //----------------------------------------------------------------------
666+
{ name: "REGA44",
667+
desc: "AST 44 Register for OTP/ROM Write Testing",
668+
swaccess: "rw",
669+
hwaccess: "hro",
670+
tags: [ // don't write random data to any of the AST registers
671+
"excl:CsrAllTests:CsrExclWrite" ],
672+
fields: [
673+
{ bits: "31:0",
674+
name: "reg32",
675+
desc: "32-bit Register",
676+
resval: "0x2c",
677+
},
678+
],
679+
}, //----------------------------------------------------------------------
680+
{ name: "REGA45",
681+
desc: "AST 45 Register for OTP/ROM Write Testing",
682+
swaccess: "rw",
683+
hwaccess: "hro",
684+
tags: [ // don't write random data to any of the AST registers
685+
"excl:CsrAllTests:CsrExclWrite" ],
686+
fields: [
687+
{ bits: "31:0",
688+
name: "reg32",
689+
desc: "32-bit Register",
690+
resval: "0x2d",
691+
},
692+
],
693+
}, //----------------------------------------------------------------------
694+
{ name: "REGA46",
695+
desc: "AST 46 Register for OTP/ROM Write Testing",
696+
swaccess: "rw",
697+
hwaccess: "hro",
698+
tags: [ // don't write random data to any of the AST registers
699+
"excl:CsrAllTests:CsrExclWrite" ],
700+
fields: [
701+
{ bits: "31:0",
702+
name: "reg32",
703+
desc: "32-bit Register",
704+
resval: "0x2e",
705+
},
706+
],
707+
}, //----------------------------------------------------------------------
708+
{ name: "REGA47",
709+
desc: "AST 47 Register for OTP/ROM Write Testing",
710+
swaccess: "rw",
711+
hwaccess: "hro",
712+
tags: [ // don't write random data to any of the AST registers
713+
"excl:CsrAllTests:CsrExclWrite" ],
714+
fields: [
715+
{ bits: "31:0",
716+
name: "reg32",
717+
desc: "32-bit Register",
718+
resval: "0x2f",
719+
},
720+
],
721+
}, //----------------------------------------------------------------------
722+
{ name: "REGA48",
723+
desc: "AST 48 Register for OTP/ROM Write Testing",
724+
swaccess: "rw",
725+
hwaccess: "hro",
726+
tags: [ // don't write random data to any of the AST registers
727+
"excl:CsrAllTests:CsrExclWrite" ],
728+
fields: [
729+
{ bits: "31:0",
730+
name: "reg32",
731+
desc: "32-bit Register",
732+
resval: "0x30",
733+
},
734+
],
735+
}, //----------------------------------------------------------------------
736+
{ name: "REGA49",
737+
desc: "AST 49 Register for OTP/ROM Write Testing",
738+
swaccess: "rw",
739+
hwaccess: "hro",
740+
tags: [ // don't write random data to any of the AST registers
741+
"excl:CsrAllTests:CsrExclWrite" ],
742+
fields: [
743+
{ bits: "31:0",
744+
name: "reg32",
745+
desc: "32-bit Register",
746+
resval: "0x31",
747+
},
748+
],
749+
}, //----------------------------------------------------------------------
750+
{ name: "REGA50",
751+
desc: "AST 50 Register for OTP/ROM Write Testing",
752+
swaccess: "rw",
753+
hwaccess: "hro",
754+
tags: [ // don't write random data to any of the AST registers
755+
"excl:CsrAllTests:CsrExclWrite" ],
756+
fields: [
757+
{ bits: "31:0",
758+
name: "reg32",
759+
desc: "32-bit Register",
760+
resval: "0x32",
761+
},
762+
],
763+
}, //----------------------------------------------------------------------
764+
{ name: "REGA51",
765+
desc: "AST 51 Register for OTP/ROM Write Testing",
766+
swaccess: "rw",
767+
hwaccess: "hro",
768+
tags: [ // don't write random data to any of the AST registers
769+
"excl:CsrAllTests:CsrExclWrite" ],
770+
fields: [
771+
{ bits: "31:0",
772+
name: "reg32",
773+
desc: "32-bit Register",
774+
resval: "0x33",
775+
},
776+
],
777+
}, //----------------------------------------------------------------------
778+
{ name: "REGA52",
779+
desc: "AST 52 Register for OTP/ROM Write Testing",
780+
swaccess: "rw",
781+
hwaccess: "hro",
782+
tags: [ // don't write random data to any of the AST registers
783+
"excl:CsrAllTests:CsrExclWrite" ],
784+
fields: [
785+
{ bits: "31:0",
786+
name: "reg32",
787+
desc: "32-bit Register",
788+
resval: "0x34",
789+
},
790+
],
791+
}, //----------------------------------------------------------------------
582792
{ name: "REGAL",
583793
desc: "AST Last Register for OTP/ROM Write Testing",
584794
swaccess: "wo",
@@ -591,7 +801,7 @@
591801
{ bits: "31:0",
592802
name: "reg32",
593803
desc: "32-bit Register",
594-
resval: "0x26",
804+
resval: "0x35",
595805
},
596806
],
597807
}, //----------------------------------------------------------------------

‎hw/top_earlgrey/ip/ast/rtl/ast.sv‎

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1052,6 +1052,21 @@ assign unused_sigs = ^{ clk_ast_usb_i,
10521052
reg2hw.rega35,
10531053
reg2hw.rega36,
10541054
reg2hw.rega37,
1055+
reg2hw.rega38,
1056+
reg2hw.rega39,
1057+
reg2hw.rega40,
1058+
reg2hw.rega41,
1059+
reg2hw.rega42,
1060+
reg2hw.rega43,
1061+
reg2hw.rega44,
1062+
reg2hw.rega45,
1063+
reg2hw.rega46,
1064+
reg2hw.rega47,
1065+
reg2hw.rega48,
1066+
reg2hw.rega49,
1067+
reg2hw.rega50,
1068+
reg2hw.rega51,
1069+
reg2hw.rega52,
10551070
reg2hw.regb // [0:3]
10561071
};
10571072

‎hw/top_earlgrey/ip/ast/rtl/ast_pkg.sv‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@ parameter int unsigned Pad2AstInWidth = 8;
4949
// AstRegsNum is the number of AST registers programmed during initialization. It includes
5050
// the register that marks the finalization of init, which asserts the ast_init_done_o.
5151
// The offset of this register is represented with the AstLastRegOffset parameter.
52-
parameter int unsigned AstRegsNum = 39;
52+
parameter int unsigned AstRegsNum = 54;
5353
parameter int unsigned AstLastRegOffset = (AstRegsNum-1)*4;
5454

5555
// Memories Read-Write Margin Interface

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