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[rom_ctrl,rtl,dv] Adapt KMAC app interface to extended interface
This are the required changes to match the adapted KMAC app interface. Signed-off-by: Pascal Etterli <pascal.etterli@lowrisc.org>
1 parent 62857c8 commit c50ba45

6 files changed

Lines changed: 41 additions & 30 deletions

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hw/ip/rom_ctrl/dv/cov/rom_ctrl_cov_if.sv

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -31,15 +31,15 @@ interface rom_ctrl_cov_if (
3131
option.per_instance = 1;
3232

3333
// Cover some basic stalling behavior on the kmac ready input
34-
cp_kmac_ready: coverpoint kmac_data_i.ready iff (kmac_data_o.valid) {
34+
cp_kmac_ready: coverpoint kmac_data_i.req_ready iff (kmac_data_o.req_valid) {
3535
bins zero_delay_5 = (1'b1[*5]);
3636
bins stall_1 = (1'b1 => 1'b0 => 1'b1);
3737
bins stall_long = (1'b0[*5:10] => 1'b1);
3838
bins stall_repeat = (1'b0[*1:10] => 1'b1 => 1'b0[*1:10]);
3939
}
4040

41-
// Cover the different delays on the kmac done signal
42-
cp_kmac_done: coverpoint {kmac_data_i.done, exp_digest_de} {
41+
// Cover the different delays on the kmac response valid signal
42+
cp_kmac_digest_handshake: coverpoint {kmac_data_i.rsp_valid, exp_digest_de} {
4343
bins kmac_first = {2'b11}; // kmac responds while still reading digest
4444
bins rom_first = (2'b00 => 2'b10); // kmac responds after digest read
4545
bins same_cycle = (2'b01 => 2'b10); // kmac responds as digest read completes

hw/ip/rom_ctrl/dv/env/rom_ctrl_scoreboard.sv

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -147,7 +147,7 @@ task rom_ctrl_scoreboard::process_kmac_rsp_fifo();
147147
// it's a DV bug: we should already have failed when the KMAC request was sent a few cycles ago.
148148
`DV_CHECK_FATAL(!rom_check_complete, "Extra KMAC response seen.")
149149

150-
kmac_digest = kmac_rsp.rsp_digest_share0 ^ kmac_rsp.rsp_digest_share1;
150+
kmac_digest = kmac_rsp.digest_s0 ^ kmac_rsp.digest_s1;
151151
expected_digest = get_expected_digest();
152152
update_ral_digests(kmac_digest, expected_digest);
153153
digest_good = prim_mubi_pkg::mubi4_bool_to_mubi(

hw/ip/rom_ctrl/dv/env/seq_lib/rom_ctrl_kmac_err_chk_vseq.sv

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@ task rom_ctrl_kmac_err_chk_vseq::body();
2323
fork
2424
wait(cfg.under_reset);
2525
begin
26-
wait(cfg.m_kmac_agent_cfg.vif.mon_cb.rsp_done);
26+
wait(cfg.m_kmac_agent_cfg.vif.mon_cb.rsp_valid);
2727
wait_for_fatal_alert(.max_delay(4), .max_wait_cycle(7));
2828
`DV_CHECK_EQ(cfg.rom_ctrl_vif.pwrmgr_data.done, MuBi4False)
2929
end

hw/ip/rom_ctrl/dv/tb/rom_ctrl_if.sv

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -36,12 +36,12 @@ interface rom_ctrl_if ();
3636
release dut.u_mux.sel_bus_qq;
3737
endtask
3838

39-
// Override the kmac_data_i.done signal to be true for a cycle, returning on the next negedge.
40-
// (This will be one cycle if we start before the posedge)
39+
// Override the kmac_data_i.rsp_valid signal to be true for a cycle, returning on the next
40+
// negedge. This will be one cycle if we start before the posedge.
4141
task static force_kmac_data_done();
42-
force dut.kmac_data_i.done = 1;
42+
force dut.kmac_data_i.rsp_valid = 1;
4343
@(negedge dut.clk_i);
44-
release dut.kmac_data_i.done;
44+
release dut.kmac_data_i.rsp_valid;
4545
endtask
4646

4747
endinterface

hw/ip/rom_ctrl/dv/tb/tb.sv

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@ module tb;
2020
kmac_pkg::app_req_t kmac_data_out;
2121
rom_ctrl_pkg::pwrmgr_data_t pwrmgr_data;
2222
rom_ctrl_pkg::keymgr_data_t keymgr_data;
23-
logic kmac_done_occured;
23+
logic kmac_digest_handshake_occured;
2424

2525
// interfaces
2626
clk_rst_if clk_rst_if(.clk(clk), .rst_n(rst_n));
@@ -114,19 +114,22 @@ module tb;
114114
run_test();
115115
end
116116
// Only get one KMAC response
117-
`ASSERT(JustOneKmacResponse_A, kmac_data_in.done |=> always !kmac_data_in.done, clk, rst_n)
117+
`ASSERT(JustOneKmacResponse_A, kmac_data_in.rsp_valid |=> always !kmac_data_in.rsp_valid,
118+
clk, rst_n)
118119
// Once we signal done to pwrmgr, the done signal stays high and the good signal stays stable.
119120
`ASSERT(PwrmgrDoneOneWay_A, $rose(pwrmgr_data.done == prim_mubi_pkg::MuBi4True) |=>
120121
always $stable(pwrmgr_data), clk, rst_n)
121122
// Don't send any KMAC requests once we've had the response
122-
`ASSERT(KmacNotOutAfterIn_A, kmac_data_in.done |=> always !kmac_data_out.valid, clk, rst_n)
123+
`ASSERT(KmacNotOutAfterIn_A, kmac_data_in.rsp_valid |=> always !kmac_data_out.req_valid,
124+
clk, rst_n)
123125
always_comb begin
124-
if (!rst_n) kmac_done_occured = 0;
125-
else if (kmac_data_in.done) kmac_done_occured = 1;
126+
if (!rst_n) kmac_digest_handshake_occured = 0;
127+
else if (kmac_data_in.rsp_valid) kmac_digest_handshake_occured = 1;
126128
end
127129
// We see a response from KMAC before we assert that we're done to pwrmgr
128130
`ASSERT(KmacResponseBeforePwmgrDone_A,
129-
pwrmgr_data.done != prim_mubi_pkg::MuBi4False |-> kmac_done_occured, clk, rst_n)
131+
pwrmgr_data.done != prim_mubi_pkg::MuBi4False |-> kmac_digest_handshake_occured,
132+
clk, rst_n)
130133
`undef ROM_CTRL_MEM_HIER
131134

132135
endmodule

hw/ip/rom_ctrl/rtl/rom_ctrl.sv

Lines changed: 23 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -126,21 +126,24 @@ module rom_ctrl
126126
// set 4 or 5 byte enables (4 for 32bit, 5 for 39bit)!
127127
localparam int NumBytes = (DataWidth + 7) / 8;
128128

129+
// ROM ctrl operates on unshared data and and accepts digest responses immediately.
129130
// SEC_CM: MEM.DIGEST
130-
assign kmac_data_o = '{valid: kmac_rom_vld_outer,
131-
data: kmac_rom_data,
131+
assign kmac_data_o = '{req_valid: kmac_rom_vld_outer,
132+
data_s0: kmac_rom_data,
133+
data_s1: '0,
132134
strb: kmac_pkg::MsgStrbW'({NumBytes{1'b1}}),
133-
last: kmac_rom_last_outer};
135+
req_last: kmac_rom_last_outer,
136+
rsp_ready: 1'b1};
134137

135-
assign kmac_rom_rdy_outer = kmac_data_i.ready;
136-
assign kmac_done = kmac_data_i.done;
137-
assign kmac_digest = kmac_data_i.digest_share0[255:0] ^ kmac_data_i.digest_share1[255:0];
138+
assign kmac_rom_rdy_outer = kmac_data_i.req_ready;
139+
assign kmac_done = kmac_data_i.rsp_valid;
140+
assign kmac_digest = kmac_data_i.digest_s0[255:0] ^ kmac_data_i.digest_s1[255:0];
138141
assign kmac_err = kmac_data_i.error;
139142

140143
logic unused_kmac_digest;
141144
assign unused_kmac_digest = ^{
142-
kmac_data_i.digest_share0[kmac_pkg::AppDigestW-1:256],
143-
kmac_data_i.digest_share1[kmac_pkg::AppDigestW-1:256]
145+
kmac_data_i.digest_s0[kmac_pkg::AppDigestW-1:256],
146+
kmac_data_i.digest_s1[kmac_pkg::AppDigestW-1:256]
144147
};
145148

146149
end : gen_kmac_scramble_enabled
@@ -161,6 +164,10 @@ module rom_ctrl
161164

162165
end : gen_kmac_scramble_disabled
163166

167+
// A static KMAC interface has no finish response.
168+
logic unused_kmac_finish_rsp;
169+
assign unused_kmac_finish_rsp = kmac_data_i.rsp_finish;
170+
164171
// TL interface ==============================================================
165172
// This buffer ensures that when we calculate bus_rom_prince_index by snooping on
166173
// rom_tl_i, we get a value that's buffered from the thing that goes into both the ECC
@@ -556,17 +563,18 @@ module rom_ctrl
556563
`ASSERT_KNOWN_IF(KeymgrDataODataKnown_A, keymgr_data_o, keymgr_data_o.valid)
557564

558565
// The valid signal for kmac_data_o should always be known when out of reset. The rest of the
559-
// struct (data, strb and last) should be known whenever the valid signal is true.
560-
`ASSERT_KNOWN(KmacDataOValidKnown_A, kmac_data_o.valid)
561-
`ASSERT_KNOWN_IF(KmacDataODataKnown_A, kmac_data_o, kmac_data_o.valid)
566+
// struct (data, strb and req_last) should be known whenever the valid signal is true.
567+
`ASSERT_KNOWN(KmacDataOValidKnown_A, kmac_data_o.req_valid)
568+
`ASSERT_KNOWN_IF(KmacDataODataKnown_A, kmac_data_o, kmac_data_o.req_valid)
562569

563-
// Check that kmac_data_o.last is "telling the truth": kmac_data_o.valid should drop on the cycle
564-
// after the word that it decorates is transferred.
570+
// Check that kmac_data_o.req_last is "telling the truth": kmac_data_o.rsp_valid should drop on
571+
// the cycle after the word that it decorates is transferred.
565572
`ASSERT(KmacLastTrue_A,
566-
kmac_data_o.valid && kmac_data_i.ready && kmac_data_o.last |=> !kmac_data_o.valid)
573+
kmac_data_o.req_valid && kmac_data_i.req_ready && kmac_data_o.req_last
574+
|=> !kmac_data_o.req_valid)
567575

568576
// Check that pwrmgr_data_o.good is stable when kmac_data_o.valid is asserted
569-
`ASSERT(StabilityChkKmac_A, kmac_data_o.valid && $past(kmac_data_o.valid)
577+
`ASSERT(StabilityChkKmac_A, kmac_data_o.req_valid && $past(kmac_data_o.req_valid)
570578
|-> $stable(pwrmgr_data_o.good))
571579

572580
// Check that pwrmgr_data_o.good is stable when keymgr_data_o.valid is asserted

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