[rv_core_ibex] Add u-mode performance counters and mcounteren

[SamuelRiedel]

• Update Ibex to contain the u-mode performance counter aliases
• Ibex also implements the mcounteren CSR to control which u-mode counters are accessible
• The mcounteren CSR can be locked through an input signal to prevent modifying it even in m-mode
• Add a mcounteren_writable register in rv_core_ibex driving the above signal. This register is lockable with the mcounteren_writable_regwen register.

ToDo:

• Add sofware test to ensure the newly added registers are writable, lockable, and correctly lock the mcounteren register in Ibex
• Use consistent MuBi encoding between Ibex and OT.
• Update Ibex once Add mcounteren register ibex#2403 is merged

The test will run in the nightly CI. I activated it temporarily also in the PR's CI and the run can be found here.

[gautschimi]

Looks all good.

changes in this PR are approved. But the vendor-in commit needs to be updated once the ibex PR has been merged.

edit: commit messages could be a bit longer:)

edit: and the CI jobs need to be fixed

[rswarbrick]

Should the "Add missing rvfi ports" commit be squashed with the vendoring update? Otherwise, I think we have a (slightly) broken intermediate state of the repository?

[SamuelRiedel]

Should the "Add missing rvfi ports" commit be squashed with the vendoring update? Otherwise, I think we have a (slightly) broken intermediate state of the repository?

Yes good point. I will squash the two once we merge the Ibex PR and I vendor in Ibex from the main branch.

[SamuelRiedel]

I pulled in the Ibex changes from upstream, squashed the commits and extended the commit messages a bit. So this is ready to go from my side.

[marnovandermaas]

Just one minor improvement to the test but otherwise looks good to me.

[marnovandermaas]

CHANGE AUTHORIZED: hw/top_earlgrey/ip_autogen/rv_core_ibex/data/rv_core_ibex.hjson
CHANGE AUTHORIZED: hw/top_earlgrey/ip_autogen/rv_core_ibex/rtl/rv_core_ibex.sv
CHANGE AUTHORIZED: hw/top_earlgrey/ip_autogen/rv_core_ibex/rtl/rv_core_ibex_cfg_reg_top.sv
CHANGE AUTHORIZED: hw/top_earlgrey/ip_autogen/rv_core_ibex/rtl/rv_core_ibex_reg_pkg.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_core.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_cs_registers.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_id_stage.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_lockstep.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_pkg.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_top.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_top_tracing.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_tracer.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_wb_stage.sv

[andreaskurth]

LGTM with only two small suggestions. Thanks @SamuelRiedel!

[andreaskurth]

I think this isn't true because there's no bit permutation that maps one pair to the other, so it's a genuine re-encoding, not a rewiring. I don't think this is a problem and the implementation is correct, but suggest rephrasing the comment.

[SamuelRiedel]

It should map well by swapping the lower two bits; at least the True/False values match. Nevertheless, this might not hold true generally if the values change, nor is it particularly relevant, so I removed this line of the comment.

[andreaskurth]

As the C file #includes hw/top/rv_core_ibex_regs.h, I suggest you add //hw/top:rv_core_ibex_c_regs. The test seems to build, so this gets transitively pulled in already, but it's cleaner to have the depencency explicit.

[SamuelRiedel]

Right, I added this.

[andreaskurth]

CHANGE AUTHORIZED: hw/top_earlgrey/ip_autogen/rv_core_ibex/data/rv_core_ibex.hjson
CHANGE AUTHORIZED: hw/top_earlgrey/ip_autogen/rv_core_ibex/rtl/rv_core_ibex.sv
CHANGE AUTHORIZED: hw/top_earlgrey/ip_autogen/rv_core_ibex/rtl/rv_core_ibex_cfg_reg_top.sv
CHANGE AUTHORIZED: hw/top_earlgrey/ip_autogen/rv_core_ibex/rtl/rv_core_ibex_reg_pkg.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_core.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_cs_registers.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_id_stage.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_lockstep.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_pkg.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_top.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_top_tracing.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_tracer.sv
CHANGE AUTHORIZED: hw/vendor/lowrisc_ibex/rtl/ibex_wb_stage.sv

Agreed new feature for Ibex.

[nasahlpa]

As discussed offline, OK for me to have this as a single-bit value and not a mubi. To change the MCOUNTEREN value below, an attacker would need to fault it to be unlocked and also have SW access to write to it.

[nasahlpa]

Merging as the timeout in the CW340 ROM Tests is a known issue that is not related to this PR.