11target :
22 target_type : chip
33 fw_bin : " ../objs/sca_ujson_chip_signed.img"
4+ opentitantool : " ../objs/opentitantool"
45 target_clk_mult : 1
56 target_freq : 100000000
67 baudrate : 115200
7- output_len_bytes : 16
8- protocol : " ujson"
9- port : " /dev/ttyUSB1"
8+ # You can specify the port or leave it empty to find it automatically.
109 # Trigger source.
1110 # hw: Precise, hardware-generated trigger - FPGA only.
1211 # sw: Fully software-controlled trigger.
1312 trigger : " sw"
1413waverunner :
1514 waverunner_ip : 192.168.33.128
16- num_segments : 20
1715 # num_samples: 6000
1816 # offset_samples: 0
1917 # cycles will only be used if not given in samples
@@ -24,22 +22,22 @@ waverunner:
2422 channel : C1
2523 sparsing : 0
2624capture :
27- scope_select : waverunner
25+ # scope_select: husky, waverunner, none
26+ scope_select : none
2827 num_traces : 1000
29- show_plot : True
28+ num_segments : 20
29+ show_plot : False
3030 plot_traces : 100
31+ # trace_db: cw
3132 trace_db : ot_trace_library
3233 trace_threshold : 10000
33- # trace_db: cw
3434test :
35- which_test : aes_random_batch
35+ which_test : daisy_chain
36+ # which_test: single
37+ # which_test: daisy_chain
3638 # which_test: aes_random
3739 # which_test: aes_fvsr_key
38- # which_test: aes_fvsr_key_batch
3940 # which_test: aes_fvsr_data
40- # which_test: aes_fvsr_data_batch
41- key_len_bytes : 16
42- text_len_bytes : 16
4341 # These initial values are used only for random capture but not fixed-vs-random.
4442 key_fixed : [0x81, 0x1E, 0x37, 0x31, 0xB0, 0x12, 0x0A, 0x78, 0x42, 0x78, 0x1E, 0x22, 0xB2, 0x5C, 0xDD, 0xF9]
4543 text_fixed : [0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA]
@@ -49,11 +47,27 @@ test:
4947 # 32-bit seed for masking on device. To switch off the masking, use 0 as LFSR seed.
5048 # lfsr_seed: 0x00000000
5149 lfsr_seed : 0xdeadbeef
52- # When True, the instruction cache is enabled.
53- enable_icache : True
54- # When True, the dummy instructions are enabled.
55- enable_dummy_instr : False
56- # When True, enable the jittery clock.
57- enable_jittery_clock : False
58- # When True, enable the SRAM readback feature.
59- sram_readback_enable : False
50+ core_config : {
51+ " enable_icache " : True,
52+ " enable_dummy_instr " : True,
53+ " dummy_instr_count " : 3,
54+ " enable_jittery_clock " : True,
55+ " enable_sram_readback " : True,
56+ " enable_data_ind_timing " : True,
57+ }
58+ sensor_config : {
59+ " sensor_ctrl_enable " : True,
60+ " sensor_ctrl_en_fatal " : [
61+ False,
62+ False,
63+ False,
64+ False,
65+ False,
66+ False,
67+ False,
68+ False,
69+ False,
70+ False,
71+ False,
72+ ],
73+ }
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