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[fi] Command handlers for Ibex tests
This commit adds the command handlers and configs for the following Ibex FI penetration tests: - ibex.char.flash_read - ibex.char.flash_write - ibex.char.sram_read - ibex.char.sram_write - ibex.char.unconditional_branch - ibex.char.conditional_branch The device code is located in lowRISC/opentitan#22135 and the binary was compiled from lowRISC/opentitan@e5a0c2a using: ./bazelisk.sh build //sw/device/tests/crypto/cryptotest/firmware:firmware_fpga_cw310_test_rom Signed-off-by: Pascal Nasahl <nasahlpa@lowrisc.org>
1 parent 679d99f commit c4575d2

8 files changed

Lines changed: 290 additions & 2 deletions

‎fault_injection/configs/pen.global_fi.ibex.char.conditional_branch.cw310.yaml‎

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target:
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target_type: cw310
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fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
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force_program_bitstream: False
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fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
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output_len_bytes: 16
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target_clk_mult: 0.24
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target_freq: 24000000
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baudrate: 115200
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protocol: "ujson"
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port: "/dev/ttyACM4"
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fisetup:
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fi_gear: "husky"
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fi_type: "voltage_glitch"
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parameter_generation: "random"
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# Voltage glitch width in cycles.
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glitch_width_min: 5
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glitch_width_max: 150
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glitch_width_step: 3
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# Range for trigger delay in cycles.
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trigger_delay_min: 0
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trigger_delay_max: 500
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trigger_step: 10
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# Number of iterations for the parameter sweep.
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num_iterations: 100
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fiproject:
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# Project database type and memory threshold.
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project_db: "ot_fi_project"
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project_mem_threshold: 10000
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# Store FI plot.
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show_plot: True
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num_plots: 10
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plot_x_axis: "trigger_delay"
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plot_x_axis_legend: "[cycles]"
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plot_y_axis: "glitch_width"
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plot_y_axis_legend: "[cycles]"
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test:
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which_test: "ibex_char_conditional_branch"
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expected_result: '{"result1":10001,"result2":0,"err_status":0}'

‎fault_injection/configs/pen.global_fi.ibex.char.flash_read.cw310.yaml‎

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target:
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target_type: cw310
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fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
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force_program_bitstream: False
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fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
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output_len_bytes: 16
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target_clk_mult: 0.24
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target_freq: 24000000
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baudrate: 115200
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protocol: "ujson"
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port: "/dev/ttyACM4"
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fisetup:
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fi_gear: "husky"
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fi_type: "voltage_glitch"
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parameter_generation: "random"
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# Voltage glitch width in cycles.
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glitch_width_min: 5
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glitch_width_max: 150
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glitch_width_step: 3
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# Range for trigger delay in cycles.
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trigger_delay_min: 0
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trigger_delay_max: 500
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trigger_step: 10
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# Number of iterations for the parameter sweep.
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num_iterations: 100
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fiproject:
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# Project database type and memory threshold.
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project_db: "ot_fi_project"
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project_mem_threshold: 10000
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# Store FI plot.
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show_plot: True
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num_plots: 10
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plot_x_axis: "trigger_delay"
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plot_x_axis_legend: "[cycles]"
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plot_y_axis: "glitch_width"
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plot_y_axis_legend: "[cycles]"
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test:
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which_test: "ibex_char_flash_read"
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expected_result: '{"result":0,"err_status":0}'

‎fault_injection/configs/pen.global_fi.ibex.char.flash_write.cw310.yaml‎

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target:
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target_type: cw310
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fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
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force_program_bitstream: False
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fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
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output_len_bytes: 16
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target_clk_mult: 0.24
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target_freq: 24000000
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baudrate: 115200
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protocol: "ujson"
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port: "/dev/ttyACM4"
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fisetup:
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fi_gear: "husky"
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fi_type: "voltage_glitch"
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parameter_generation: "random"
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# Voltage glitch width in cycles.
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glitch_width_min: 5
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glitch_width_max: 150
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glitch_width_step: 3
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# Range for trigger delay in cycles.
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trigger_delay_min: 0
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trigger_delay_max: 500
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trigger_step: 10
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# Number of iterations for the parameter sweep.
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num_iterations: 100
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fiproject:
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# Project database type and memory threshold.
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project_db: "ot_fi_project"
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project_mem_threshold: 10000
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# Store FI plot.
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show_plot: True
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num_plots: 10
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plot_x_axis: "trigger_delay"
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plot_x_axis_legend: "[cycles]"
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plot_y_axis: "glitch_width"
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plot_y_axis_legend: "[cycles]"
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test:
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which_test: "ibex_char_flash_write"
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expected_result: '{"result":0,"err_status":0}'

‎fault_injection/configs/pen.global_fi.ibex.char.sram_read.cw310.yaml‎

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target:
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target_type: cw310
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fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
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force_program_bitstream: False
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fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
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output_len_bytes: 16
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target_clk_mult: 0.24
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target_freq: 24000000
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baudrate: 115200
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protocol: "ujson"
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port: "/dev/ttyACM4"
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fisetup:
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fi_gear: "husky"
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fi_type: "voltage_glitch"
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parameter_generation: "random"
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# Voltage glitch width in cycles.
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glitch_width_min: 5
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glitch_width_max: 150
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glitch_width_step: 3
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# Range for trigger delay in cycles.
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trigger_delay_min: 0
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trigger_delay_max: 500
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trigger_step: 10
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# Number of iterations for the parameter sweep.
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num_iterations: 100
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fiproject:
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# Project database type and memory threshold.
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project_db: "ot_fi_project"
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project_mem_threshold: 10000
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# Store FI plot.
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show_plot: True
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num_plots: 10
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plot_x_axis: "trigger_delay"
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plot_x_axis_legend: "[cycles]"
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plot_y_axis: "glitch_width"
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plot_y_axis_legend: "[cycles]"
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test:
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which_test: "ibex_char_sram_read"
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expected_result: '{"result":0,"err_status":0}'

‎fault_injection/configs/pen.global_fi.ibex.char.sram_write.cw310.yaml‎

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target:
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target_type: cw310
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fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
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force_program_bitstream: False
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fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
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output_len_bytes: 16
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target_clk_mult: 0.24
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target_freq: 24000000
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baudrate: 115200
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protocol: "ujson"
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port: "/dev/ttyACM4"
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fisetup:
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fi_gear: "husky"
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fi_type: "voltage_glitch"
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parameter_generation: "random"
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# Voltage glitch width in cycles.
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glitch_width_min: 5
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glitch_width_max: 150
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glitch_width_step: 3
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# Range for trigger delay in cycles.
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trigger_delay_min: 0
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trigger_delay_max: 500
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trigger_step: 10
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# Number of iterations for the parameter sweep.
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num_iterations: 100
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fiproject:
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# Project database type and memory threshold.
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project_db: "ot_fi_project"
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project_mem_threshold: 10000
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# Store FI plot.
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show_plot: True
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num_plots: 10
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plot_x_axis: "trigger_delay"
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plot_x_axis_legend: "[cycles]"
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plot_y_axis: "glitch_width"
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plot_y_axis_legend: "[cycles]"
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test:
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which_test: "ibex_char_sram_write"
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expected_result: '{"result":0,"err_status":0}'

‎fault_injection/configs/pen.global_fi.ibex.char.unconditional_branch.cw310.yaml‎

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target:
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target_type: cw310
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fpga_bitstream: "../objs/lowrisc_systems_chip_earlgrey_cw310_0.1.bit"
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force_program_bitstream: False
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fw_bin: "../objs/sca_ujson_fpga_cw310.bin"
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output_len_bytes: 16
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target_clk_mult: 0.24
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target_freq: 24000000
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baudrate: 115200
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protocol: "ujson"
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port: "/dev/ttyACM4"
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fisetup:
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fi_gear: "husky"
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fi_type: "voltage_glitch"
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parameter_generation: "random"
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# Voltage glitch width in cycles.
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glitch_width_min: 5
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glitch_width_max: 150
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glitch_width_step: 3
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# Range for trigger delay in cycles.
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trigger_delay_min: 0
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trigger_delay_max: 500
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trigger_step: 10
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# Number of iterations for the parameter sweep.
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num_iterations: 100
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fiproject:
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# Project database type and memory threshold.
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project_db: "ot_fi_project"
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project_mem_threshold: 10000
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# Store FI plot.
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show_plot: True
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num_plots: 10
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plot_x_axis: "trigger_delay"
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plot_x_axis_legend: "[cycles]"
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plot_y_axis: "glitch_width"
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plot_y_axis_legend: "[cycles]"
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test:
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which_test: "ibex_char_unconditional_branch"
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expected_result: '{"result":100,"err_status":0}'

‎objs/sca_ujson_fpga_cw310.bin‎

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version https://git-lfs.github.com/spec/v1
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oid sha256:0ad1df47ebaad117676b11d7b3937f5e3b6becf9c73914554badd4e32ba73052
3-
size 298684
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oid sha256:b79fa7125b748b00bc231ecb563e266edf4213eb27ef2318b35315d5c32169b1
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size 304188

‎target/communication/fi_ibex_commands.py‎

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@@ -54,6 +54,60 @@ def ibex_char_mem_op_loop(self) -> None:
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time.sleep(0.01)
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self.target.write(json.dumps("CharMemOpLoop").encode("ascii"))
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def ibex_char_flash_read(self) -> None:
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""" Starts the ibex.char.flash_read test.
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"""
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# IbexFi command.
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self._ujson_ibex_fi_cmd()
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# CharFlashRead command.
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time.sleep(0.01)
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self.target.write(json.dumps("CharFlashRead").encode("ascii"))
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def ibex_char_flash_write(self) -> None:
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""" Starts the ibex.char.flash_write test.
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"""
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# IbexFi command.
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self._ujson_ibex_fi_cmd()
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# CharFlashWrite command.
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time.sleep(0.01)
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self.target.write(json.dumps("CharFlashWrite").encode("ascii"))
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def ibex_char_sram_read(self) -> None:
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""" Starts the ibex.char.sram_read test.
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"""
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# IbexFi command.
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self._ujson_ibex_fi_cmd()
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# CharSramRead command.
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time.sleep(0.01)
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self.target.write(json.dumps("CharSramRead").encode("ascii"))
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def ibex_char_sram_write(self) -> None:
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""" Starts the ibex.char.sram_write test.
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"""
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# IbexFi command.
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self._ujson_ibex_fi_cmd()
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# CharSramWrite command.
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time.sleep(0.01)
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self.target.write(json.dumps("CharSramWrite").encode("ascii"))
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def ibex_char_unconditional_branch(self) -> None:
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""" Starts the ibex.char.unconditional_branch test.
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"""
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# IbexFi command.
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self._ujson_ibex_fi_cmd()
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# CharUncondBranch command.
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time.sleep(0.01)
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self.target.write(json.dumps("CharUncondBranch").encode("ascii"))
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def ibex_char_conditional_branch(self) -> None:
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""" Starts the ibex.char.conditional_branch test.
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"""
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# IbexFi command.
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self._ujson_ibex_fi_cmd()
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# CharCondBranch command.
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time.sleep(0.01)
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self.target.write(json.dumps("CharCondBranch").encode("ascii"))
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def init_trigger(self) -> None:
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""" Initialize the FI trigger on the chip.
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