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Streamline naming of jittery clock config
This commit renames jittery_clock_enable to enable_jittery_clock to streamline the naming with the other config parameters. Signed-off-by: Pascal Nasahl <nasahlpa@lowrisc.org>
1 parent 0e9f4f4 commit c81a42a

79 files changed

Lines changed: 83 additions & 83 deletions

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capture/capture_aes.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -202,7 +202,7 @@ def configure_cipher(cfg, capture_cfg, ot_aes, ot_prng):
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device_id = ot_aes.init(fpga_mode_bit,
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cfg["test"]["enable_icache"],
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cfg["test"]["enable_dummy_instr"],
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cfg["test"]["jittery_clock_enable"],
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cfg["test"]["enable_jittery_clock"],
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cfg["test"]["sram_readback_enable"])
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# Configure PRNGs.

capture/capture_hmac.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -195,7 +195,7 @@ def configure_cipher(cfg, capture_cfg, ot_hmac, ot_prng):
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# Initialize HMAC on the target.
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device_id = ot_hmac.init(cfg["test"]["enable_icache"],
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cfg["test"]["enable_dummy_instr"],
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cfg["test"]["jittery_clock_enable"],
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cfg["test"]["enable_jittery_clock"],
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cfg["test"]["sram_readback_enable"])
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# Seed the PRNG used for generating keys and plaintexts in batch mode.

capture/capture_ibex.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -358,7 +358,7 @@ def main(argv=None):
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# Init the pentest framework and read the device ID.
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device_id = ot_ibex.init(cfg["test"]["enable_icache"],
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cfg["test"]["enable_dummy_instr"],
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cfg["test"]["jittery_clock_enable"],
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cfg["test"]["enable_jittery_clock"],
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cfg["test"]["sram_readback_enable"])
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# Capture traces.
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capture(scope, ot_ibex, ot_prng, capture_cfg, project, target)

capture/capture_kmac.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -206,7 +206,7 @@ def configure_cipher(cfg, capture_cfg, ot_kmac, ot_prng):
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device_id = ot_kmac.init(fpga_mode_bit,
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cfg["test"]["enable_icache"],
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cfg["test"]["enable_dummy_instr"],
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cfg["test"]["jittery_clock_enable"],
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cfg["test"]["enable_jittery_clock"],
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cfg["test"]["sram_readback_enable"])
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# Configure PRNGs.

capture/capture_sha3.py

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -191,7 +191,7 @@ def configure_cipher(cfg, capture_cfg, ot_sha3, ot_prng):
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device_id = ot_sha3.init(fpga_mode_bit,
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cfg["test"]["enable_icache"],
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cfg["test"]["enable_dummy_instr"],
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cfg["test"]["jittery_clock_enable"],
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cfg["test"]["enable_jittery_clock"],
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cfg["test"]["sram_readback_enable"])
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if cfg["test"]["masks_off"] is True:

capture/configs/aes_sca_chip.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,6 @@ test:
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# When True, the dummy instructions are enabled.
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enable_dummy_instr: False
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# When True, enable the jittery clock.
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jittery_clock_enable: False
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enable_jittery_clock: False
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# When True, enable the SRAM readback feature.
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sram_readback_enable: False

capture/configs/aes_sca_cw305.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -62,6 +62,6 @@ test:
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# When True, the dummy instructions are enabled.
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enable_dummy_instr: False
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# When True, enable the jittery clock.
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jittery_clock_enable: False
65+
enable_jittery_clock: False
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# When True, enable the SRAM readback feature.
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sram_readback_enable: False

capture/configs/aes_sca_cw310.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -64,6 +64,6 @@ test:
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# When True, the dummy instructions are enabled.
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enable_dummy_instr: False
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# When True, enable the jittery clock.
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jittery_clock_enable: False
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enable_jittery_clock: False
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# When True, enable the SRAM readback feature.
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sram_readback_enable: False

capture/configs/hmac_sca_chip.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,6 +49,6 @@ test:
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# When True, the dummy instructions are enabled.
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enable_dummy_instr: False
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# When True, enable the jittery clock.
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jittery_clock_enable: False
52+
enable_jittery_clock: False
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# When True, enable the SRAM readback feature.
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sram_readback_enable: False

capture/configs/hmac_sca_cw310.yaml

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,6 @@ test:
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# When True, the dummy instructions are enabled.
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enable_dummy_instr: False
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# When True, enable the jittery clock.
50-
jittery_clock_enable: False
50+
enable_jittery_clock: False
5151
# When True, enable the SRAM readback feature.
5252
sram_readback_enable: False

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