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ASIMD optimizations for lerp functions
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Lines changed: 335 additions & 28 deletions

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‎include/private/dsp/arch/aarch64/asimd/pmath.h‎

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#include <private/dsp/arch/aarch64/asimd/pmath/fmop_kx.h>
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#include <private/dsp/arch/aarch64/asimd/pmath/fmop_vv.h>
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#include <private/dsp/arch/aarch64/asimd/pmath/lanczos.h>
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#include <private/dsp/arch/aarch64/asimd/pmath/lerp.h>
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#include <private/dsp/arch/aarch64/asimd/pmath/log.h>
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#include <private/dsp/arch/aarch64/asimd/pmath/lramp.h>
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#include <private/dsp/arch/aarch64/asimd/pmath/minmax.h>

‎include/private/dsp/arch/aarch64/asimd/pmath/lerp.h‎

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/*
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* Copyright (C) 2026 Linux Studio Plugins Project <https://lsp-plug.in/>
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* (C) 2026 Vladimir Sadovnikov <sadko4u@gmail.com>
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*
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* This file is part of lsp-dsp-lib
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* Created on: 3 июл. 2026 г.
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*
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* lsp-dsp-lib is free software: you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as published by
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* the Free Software Foundation, either version 3 of the License, or
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* any later version.
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*
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* lsp-dsp-lib is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public License
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* along with lsp-dsp-lib. If not, see <https://www.gnu.org/licenses/>.
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*/
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#ifndef INCLUDE_PRIVATE_DSP_ARCH_AARCH64_ASIMD_PMATH_LERP_H_
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#define INCLUDE_PRIVATE_DSP_ARCH_AARCH64_ASIMD_PMATH_LERP_H_
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#ifndef PRIVATE_DSP_ARCH_AARCH64_ASIMD_IMPL
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#error "This header should not be included directly"
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#endif /* PRIVATE_DSP_ARCH_AARCH64_ASIMD_IMPL */
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#include <private/dsp/arch/aarch64/asimd/pmath/sin.h>
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namespace lsp
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{
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namespace asimd
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{
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void lerp_vvv(float *dst, const float *a, const float *b, const float *k, size_t count)
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{
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ARCH_AARCH64_ASM
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(
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// x32 blocks
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__ASM_EMIT("subs %[count], %[count], #32")
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__ASM_EMIT("b.lo 2f")
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__ASM_EMIT("1:")
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__ASM_EMIT("ldp q0, q1, [%[a], #0x00]") // v0 = a
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__ASM_EMIT("ldp q2, q3, [%[a], #0x20]")
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__ASM_EMIT("ldp q4, q5, [%[a], #0x40]")
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__ASM_EMIT("ldp q6, q7, [%[a], #0x60]")
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__ASM_EMIT("ldp q16, q17, [%[b], #0x00]") // v16 = b
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__ASM_EMIT("ldp q18, q19, [%[b], #0x20]")
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__ASM_EMIT("ldp q20, q21, [%[b], #0x40]")
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__ASM_EMIT("ldp q22, q23, [%[b], #0x60]")
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__ASM_EMIT("ldp q24, q25, [%[k], #0x00]") // v24 = k
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__ASM_EMIT("ldp q26, q27, [%[k], #0x20]")
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__ASM_EMIT("ldp q28, q29, [%[k], #0x40]")
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__ASM_EMIT("ldp q30, q31, [%[k], #0x60]")
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__ASM_EMIT("fsub v16.4s, v16.4s, v0.4s") // v16 = b-a
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__ASM_EMIT("fsub v17.4s, v17.4s, v1.4s")
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__ASM_EMIT("fsub v18.4s, v18.4s, v2.4s")
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__ASM_EMIT("fsub v19.4s, v19.4s, v3.4s")
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__ASM_EMIT("fsub v20.4s, v20.4s, v4.4s")
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__ASM_EMIT("fsub v21.4s, v21.4s, v5.4s")
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__ASM_EMIT("fsub v22.4s, v22.4s, v6.4s")
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__ASM_EMIT("fsub v23.4s, v23.4s, v7.4s")
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__ASM_EMIT("fmla v0.4s, v16.4s, v24.4s") // v0 = a + (b-a)*k
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__ASM_EMIT("fmla v1.4s, v17.4s, v25.4s")
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__ASM_EMIT("fmla v2.4s, v18.4s, v26.4s")
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__ASM_EMIT("fmla v3.4s, v19.4s, v27.4s")
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__ASM_EMIT("fmla v4.4s, v20.4s, v28.4s")
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__ASM_EMIT("fmla v5.4s, v21.4s, v29.4s")
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__ASM_EMIT("fmla v6.4s, v22.4s, v30.4s")
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__ASM_EMIT("fmla v7.4s, v23.4s, v31.4s")
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__ASM_EMIT("stp q0, q1, [%[dst], #0x00]")
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__ASM_EMIT("stp q2, q3, [%[dst], #0x20]")
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__ASM_EMIT("stp q4, q5, [%[dst], #0x40]")
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__ASM_EMIT("stp q6, q7, [%[dst], #0x60]")
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__ASM_EMIT("subs %[count], %[count], #32")
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__ASM_EMIT("add %[a], %[a], #0x80")
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__ASM_EMIT("add %[b], %[b], #0x80")
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__ASM_EMIT("add %[k], %[k], #0x80")
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__ASM_EMIT("add %[dst], %[dst], #0x80")
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__ASM_EMIT("b.hs 1b")
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// x16 block
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__ASM_EMIT("2:")
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__ASM_EMIT("adds %[count], %[count], #16")
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__ASM_EMIT("b.lt 4f")
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__ASM_EMIT("ldp q0, q1, [%[a], #0x00]") // v0 = a
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__ASM_EMIT("ldp q2, q3, [%[a], #0x20]")
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__ASM_EMIT("ldp q16, q17, [%[b], #0x00]") // v16 = b
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__ASM_EMIT("ldp q18, q19, [%[b], #0x20]")
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__ASM_EMIT("ldp q24, q25, [%[k], #0x00]") // v24 = k
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__ASM_EMIT("ldp q26, q27, [%[k], #0x20]")
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__ASM_EMIT("fsub v16.4s, v16.4s, v0.4s") // v16 = b-a
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__ASM_EMIT("fsub v17.4s, v17.4s, v1.4s")
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__ASM_EMIT("fsub v18.4s, v18.4s, v2.4s")
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__ASM_EMIT("fsub v19.4s, v19.4s, v3.4s")
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__ASM_EMIT("fmla v0.4s, v16.4s, v24.4s") // v0 = a + (b-a)*k
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__ASM_EMIT("fmla v1.4s, v17.4s, v25.4s")
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__ASM_EMIT("fmla v2.4s, v18.4s, v26.4s")
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__ASM_EMIT("fmla v3.4s, v19.4s, v27.4s")
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__ASM_EMIT("stp q0, q1, [%[dst], #0x00]")
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__ASM_EMIT("stp q2, q3, [%[dst], #0x20]")
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__ASM_EMIT("sub %[count], %[count], #16")
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__ASM_EMIT("add %[a], %[a], #0x40")
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__ASM_EMIT("add %[b], %[b], #0x40")
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__ASM_EMIT("add %[k], %[k], #0x40")
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__ASM_EMIT("add %[dst], %[dst], #0x40")
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// x8 block
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__ASM_EMIT("4:")
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__ASM_EMIT("adds %[count], %[count], #8")
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__ASM_EMIT("b.lt 6f")
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__ASM_EMIT("ldp q0, q1, [%[a], #0x00]") // v0 = a
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__ASM_EMIT("ldp q16, q17, [%[b], #0x00]") // v16 = b
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__ASM_EMIT("ldp q24, q25, [%[k], #0x00]") // v24 = k
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__ASM_EMIT("fsub v16.4s, v16.4s, v0.4s") // v16 = b-a
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__ASM_EMIT("fsub v17.4s, v17.4s, v1.4s")
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__ASM_EMIT("fmla v0.4s, v16.4s, v24.4s") // v0 = a + (b-a)*k
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__ASM_EMIT("fmla v1.4s, v17.4s, v25.4s")
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__ASM_EMIT("stp q0, q1, [%[dst], #0x00]")
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__ASM_EMIT("sub %[count], %[count], #8")
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__ASM_EMIT("add %[a], %[a], #0x20")
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__ASM_EMIT("add %[b], %[b], #0x20")
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__ASM_EMIT("add %[k], %[k], #0x20")
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__ASM_EMIT("add %[dst], %[dst], #0x20")
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// x4 blocks
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__ASM_EMIT("6:")
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__ASM_EMIT("adds %[count], %[count], #4")
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__ASM_EMIT("b.lt 8f")
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__ASM_EMIT("ldr q0, [%[a], #0x00]") // v0 = a
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__ASM_EMIT("ldr q16, [%[b], #0x00]") // v16 = b
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__ASM_EMIT("ldr q24, [%[k], #0x00]") // v24 = k
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__ASM_EMIT("fsub v16.4s, v16.4s, v0.4s") // v16 = b-a
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__ASM_EMIT("fmla v0.4s, v16.4s, v24.4s") // v0 = a + (b-a)*k
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__ASM_EMIT("str q0, [%[dst], #0x00]")
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__ASM_EMIT("sub %[count], %[count], #4")
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__ASM_EMIT("add %[a], %[a], #0x10")
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__ASM_EMIT("add %[b], %[b], #0x10")
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__ASM_EMIT("add %[k], %[k], #0x10")
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__ASM_EMIT("add %[dst], %[dst], #0x10")
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// x1 blocks
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__ASM_EMIT("8:")
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__ASM_EMIT("adds %[count], %[count], #3")
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__ASM_EMIT("b.lt 10f")
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__ASM_EMIT("9:")
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__ASM_EMIT("ld1r {v0.4s}, [%[a]]") // v0 = a
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__ASM_EMIT("ld1r {v16.4s}, [%[b]]") // v16 = b
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__ASM_EMIT("ld1r {v24.4s}, [%[k]]") // v24 = k
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__ASM_EMIT("fsub v16.4s, v16.4s, v0.4s") // v16 = b-a
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__ASM_EMIT("fmla v0.4s, v16.4s, v24.4s") // v0 = a + (b-a)*k
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__ASM_EMIT("st1 {v0.s}[0], [%[dst]]")
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__ASM_EMIT("subs %[count], %[count], #1")
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__ASM_EMIT("add %[a], %[a], #0x04")
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__ASM_EMIT("add %[b], %[b], #0x04")
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__ASM_EMIT("add %[k], %[k], #0x04")
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__ASM_EMIT("add %[dst], %[dst], #0x04")
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__ASM_EMIT("b.ge 9b")
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// end
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__ASM_EMIT("10:")
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: [dst] "+r" (dst), [a] "+r" (a), [b] "+r" (b), [k] "+r" (k),
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[count] "+r" (count)
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:
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: "cc", "memory",
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"v0", "v1", "v2", "v3",
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"v4", "v5", "v6", "v7",
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"v16", "v17", "v18", "v19",
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"v20", "v21", "v22", "v23",
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"v24", "v25", "v26", "v27",
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"v28", "v29", "v30", "v31"
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);
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}
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void lerp_vvk(float *dst, const float *a, const float *b, float k, size_t count)
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{
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ARCH_AARCH64_ASM
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(
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// x32 blocks
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__ASM_EMIT("subs %[count], %[count], #32")
177+
__ASM_EMIT("ld1r {v24.4s}, [%[k]]")
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__ASM_EMIT("b.lo 2f")
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__ASM_EMIT("1:")
180+
__ASM_EMIT("ldp q0, q1, [%[a], #0x00]") // v0 = a
181+
__ASM_EMIT("ldp q2, q3, [%[a], #0x20]")
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__ASM_EMIT("ldp q4, q5, [%[a], #0x40]")
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__ASM_EMIT("ldp q6, q7, [%[a], #0x60]")
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__ASM_EMIT("ldp q16, q17, [%[b], #0x00]") // v16 = b
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__ASM_EMIT("ldp q18, q19, [%[b], #0x20]")
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__ASM_EMIT("ldp q20, q21, [%[b], #0x40]")
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__ASM_EMIT("ldp q22, q23, [%[b], #0x60]")
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__ASM_EMIT("fsub v16.4s, v16.4s, v0.4s") // v16 = b-a
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__ASM_EMIT("fsub v17.4s, v17.4s, v1.4s")
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__ASM_EMIT("fsub v18.4s, v18.4s, v2.4s")
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__ASM_EMIT("fsub v19.4s, v19.4s, v3.4s")
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__ASM_EMIT("fsub v20.4s, v20.4s, v4.4s")
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__ASM_EMIT("fsub v21.4s, v21.4s, v5.4s")
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__ASM_EMIT("fsub v22.4s, v22.4s, v6.4s")
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__ASM_EMIT("fsub v23.4s, v23.4s, v7.4s")
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__ASM_EMIT("fmla v0.4s, v16.4s, v24.4s") // v0 = a + (b-a)*k
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__ASM_EMIT("fmla v1.4s, v17.4s, v24.4s")
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__ASM_EMIT("fmla v2.4s, v18.4s, v24.4s")
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__ASM_EMIT("fmla v3.4s, v19.4s, v24.4s")
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__ASM_EMIT("fmla v4.4s, v20.4s, v24.4s")
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__ASM_EMIT("fmla v5.4s, v21.4s, v24.4s")
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__ASM_EMIT("fmla v6.4s, v22.4s, v24.4s")
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__ASM_EMIT("fmla v7.4s, v23.4s, v24.4s")
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__ASM_EMIT("stp q0, q1, [%[dst], #0x00]")
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__ASM_EMIT("stp q2, q3, [%[dst], #0x20]")
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__ASM_EMIT("stp q4, q5, [%[dst], #0x40]")
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__ASM_EMIT("stp q6, q7, [%[dst], #0x60]")
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__ASM_EMIT("subs %[count], %[count], #32")
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__ASM_EMIT("add %[a], %[a], #0x80")
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__ASM_EMIT("add %[b], %[b], #0x80")
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__ASM_EMIT("add %[dst], %[dst], #0x80")
212+
__ASM_EMIT("b.hs 1b")
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// x16 block
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__ASM_EMIT("2:")
215+
__ASM_EMIT("adds %[count], %[count], #16")
216+
__ASM_EMIT("b.lt 4f")
217+
__ASM_EMIT("ldp q0, q1, [%[a], #0x00]") // v0 = a
218+
__ASM_EMIT("ldp q2, q3, [%[a], #0x20]")
219+
__ASM_EMIT("ldp q16, q17, [%[b], #0x00]") // v16 = b
220+
__ASM_EMIT("ldp q18, q19, [%[b], #0x20]")
221+
__ASM_EMIT("fsub v16.4s, v16.4s, v0.4s") // v16 = b-a
222+
__ASM_EMIT("fsub v17.4s, v17.4s, v1.4s")
223+
__ASM_EMIT("fsub v18.4s, v18.4s, v2.4s")
224+
__ASM_EMIT("fsub v19.4s, v19.4s, v3.4s")
225+
__ASM_EMIT("fmla v0.4s, v16.4s, v24.4s") // v0 = a + (b-a)*k
226+
__ASM_EMIT("fmla v1.4s, v17.4s, v24.4s")
227+
__ASM_EMIT("fmla v2.4s, v18.4s, v24.4s")
228+
__ASM_EMIT("fmla v3.4s, v19.4s, v24.4s")
229+
__ASM_EMIT("stp q0, q1, [%[dst], #0x00]")
230+
__ASM_EMIT("stp q2, q3, [%[dst], #0x20]")
231+
__ASM_EMIT("sub %[count], %[count], #16")
232+
__ASM_EMIT("add %[a], %[a], #0x40")
233+
__ASM_EMIT("add %[b], %[b], #0x40")
234+
__ASM_EMIT("add %[dst], %[dst], #0x40")
235+
// x8 block
236+
__ASM_EMIT("4:")
237+
__ASM_EMIT("adds %[count], %[count], #8")
238+
__ASM_EMIT("b.lt 6f")
239+
__ASM_EMIT("ldp q0, q1, [%[a], #0x00]") // v0 = a
240+
__ASM_EMIT("ldp q16, q17, [%[b], #0x00]") // v16 = b
241+
__ASM_EMIT("fsub v16.4s, v16.4s, v0.4s") // v16 = b-a
242+
__ASM_EMIT("fsub v17.4s, v17.4s, v1.4s")
243+
__ASM_EMIT("fmla v0.4s, v16.4s, v24.4s") // v0 = a + (b-a)*k
244+
__ASM_EMIT("fmla v1.4s, v17.4s, v24.4s")
245+
__ASM_EMIT("stp q0, q1, [%[dst], #0x00]")
246+
__ASM_EMIT("sub %[count], %[count], #8")
247+
__ASM_EMIT("add %[a], %[a], #0x20")
248+
__ASM_EMIT("add %[b], %[b], #0x20")
249+
__ASM_EMIT("add %[dst], %[dst], #0x20")
250+
// x4 blocks
251+
__ASM_EMIT("6:")
252+
__ASM_EMIT("adds %[count], %[count], #4")
253+
__ASM_EMIT("b.lt 8f")
254+
__ASM_EMIT("ldr q0, [%[a], #0x00]") // v0 = a
255+
__ASM_EMIT("ldr q16, [%[b], #0x00]") // v16 = b
256+
__ASM_EMIT("fsub v16.4s, v16.4s, v0.4s") // v16 = b-a
257+
__ASM_EMIT("fmla v0.4s, v16.4s, v24.4s") // v0 = a + (b-a)*k
258+
__ASM_EMIT("str q0, [%[dst], #0x00]")
259+
__ASM_EMIT("sub %[count], %[count], #4")
260+
__ASM_EMIT("add %[a], %[a], #0x10")
261+
__ASM_EMIT("add %[b], %[b], #0x10")
262+
__ASM_EMIT("add %[dst], %[dst], #0x10")
263+
// x1 blocks
264+
__ASM_EMIT("8:")
265+
__ASM_EMIT("adds %[count], %[count], #3")
266+
__ASM_EMIT("b.lt 10f")
267+
__ASM_EMIT("9:")
268+
__ASM_EMIT("ld1r {v0.4s}, [%[a]]") // v0 = a
269+
__ASM_EMIT("ld1r {v16.4s}, [%[b]]") // v16 = b
270+
__ASM_EMIT("fsub v16.4s, v16.4s, v0.4s") // v16 = b-a
271+
__ASM_EMIT("fmla v0.4s, v16.4s, v24.4s") // v0 = a + (b-a)*k
272+
__ASM_EMIT("st1 {v0.s}[0], [%[dst]]")
273+
__ASM_EMIT("subs %[count], %[count], #1")
274+
__ASM_EMIT("add %[a], %[a], #0x04")
275+
__ASM_EMIT("add %[b], %[b], #0x04")
276+
__ASM_EMIT("add %[dst], %[dst], #0x04")
277+
__ASM_EMIT("b.ge 9b")
278+
// end
279+
__ASM_EMIT("10:")
280+
281+
: [dst] "+r" (dst), [a] "+r" (a), [b] "+r" (b),
282+
[count] "+r" (count)
283+
: [k] "r" (&k)
284+
: "cc", "memory",
285+
"v0", "v1", "v2", "v3",
286+
"v4", "v5", "v6", "v7",
287+
"v16", "v17", "v18", "v19",
288+
"v20", "v21", "v22", "v23",
289+
"v24"
290+
);
291+
}
292+
} /* namespace asimd */
293+
} /* namespace lsp */
294+
295+
296+
297+
298+
#endif /* INCLUDE_PRIVATE_DSP_ARCH_AARCH64_ASIMD_PMATH_LERP_H_ */

‎src/main/aarch64/asimd.cpp‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -516,6 +516,14 @@
516516
EXPORT1(pmix_v2);
517517
EXPORT1(pmix_k1);
518518
EXPORT1(pmix_k2);
519+
520+
EXPORT1(lerp_vvv);
521+
EXPORT1(lerp_vvk);
522+
// EXPORT1(lerp_vkv);
523+
// EXPORT1(lerp_vkk);
524+
// EXPORT1(lerp_kvv);
525+
// EXPORT1(lerp_kvk);
526+
// EXPORT1(lerp_kkv);
519527
}
520528
} /* namespace asimd */
521529
} /* namespace lsp */

‎src/test/ptest/pmath/lerp_vvk.cpp‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -60,12 +60,12 @@ namespace lsp
6060
}
6161
)
6262

63-
// IF_ARCH_AARCH64(
64-
// namespace asimd
65-
// {
66-
// void lerp_vvk(float *dst, const float *a, const float *b, float k, size_t count);
67-
// }
68-
// )
63+
IF_ARCH_AARCH64(
64+
namespace asimd
65+
{
66+
void lerp_vvk(float *dst, const float *a, const float *b, float k, size_t count);
67+
}
68+
)
6969

7070
typedef void (* lerp_vvk_t)(float *dst, const float *a, const float *b, float k, size_t count);
7171
}
@@ -113,7 +113,7 @@ PTEST_BEGIN("dsp.pmath", lerp_vvk, 5, 1000)
113113
IF_ARCH_X86(CALL(avx::lerp_vvk_fma3));
114114
IF_ARCH_X86(CALL(avx512::lerp_vvk));
115115
IF_ARCH_ARM(CALL(neon_d32::lerp_vvk));
116-
// IF_ARCH_AARCH64(CALL(asimd::lerp_vvk));
116+
IF_ARCH_AARCH64(CALL(asimd::lerp_vvk));
117117
PTEST_SEPARATOR;
118118
}
119119

‎src/test/ptest/pmath/lerp_vvv.cpp‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -60,12 +60,12 @@ namespace lsp
6060
}
6161
)
6262

63-
// IF_ARCH_AARCH64(
64-
// namespace asimd
65-
// {
66-
// void lerp_vvv(float *dst, const float *a, const float *b, const float *k, size_t count);
67-
// }
68-
// )
63+
IF_ARCH_AARCH64(
64+
namespace asimd
65+
{
66+
void lerp_vvv(float *dst, const float *a, const float *b, const float *k, size_t count);
67+
}
68+
)
6969

7070
typedef void (* lerp_vvv_t)(float *dst, const float *a, const float *b, const float *k, size_t count);
7171
}
@@ -114,7 +114,7 @@ PTEST_BEGIN("dsp.pmath", lerp_vvv, 5, 1000)
114114
IF_ARCH_X86(CALL(avx::lerp_vvv_fma3));
115115
IF_ARCH_X86(CALL(avx512::lerp_vvv));
116116
IF_ARCH_ARM(CALL(neon_d32::lerp_vvv));
117-
// IF_ARCH_AARCH64(CALL(asimd::lerp_vvv));
117+
IF_ARCH_AARCH64(CALL(asimd::lerp_vvv));
118118
PTEST_SEPARATOR;
119119
}
120120

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