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lukefleedlukefleed
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Refactor code structure for improved readability and maintainability
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‎Cargo.toml‎

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@@ -108,6 +108,10 @@ name = "benchmark_locked_access"
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harness = false
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path = "benches/fixed/benchmark_locked_access.rs"
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[[bench]]
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name = "bench_random_write"
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harness = false
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path = "benches/fixed/bench_random_write.rs"
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[features]
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default = ["parallel"]

‎benches/fixed/bench_random_write.rs‎

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// benches/fixed/bench_random_write.rs
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use std::time::Duration;
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use compressed_intvec::prelude::*;
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use criterion::{black_box, criterion_group, criterion_main, Criterion};
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use rand::{rngs::SmallRng, Rng, SeedableRng};
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use simple_sds_sbwt::{int_vector::IntVector as SdsIntVector, ops::Access};
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use succinct::int_vec::{IntVecMut, IntVector as SuccinctIntVector};
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use sux::prelude::{BitFieldSliceMut, BitFieldVec};
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/// Generates a vector with uniformly random values up to a given maximum.
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fn generate_random_vec(size: usize, max_val_exclusive: u64) -> Vec<u64> {
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let mut rng = SmallRng::seed_from_u64(42);
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(0..size)
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.map(|_| rng.random_range(0..max_val_exclusive))
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.collect()
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}
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/// The main benchmark function for random write performance.
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fn benchmark_random_write(c: &mut Criterion) {
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const VECTOR_SIZE: usize = 10_000_000;
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const NUM_WRITES: usize = 1_000_000;
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// Test a range of bit widths.
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let bit_widths_to_test: Vec<u32> = (4..=64).step_by(4).collect();
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// Generate a single, consistent set of random indices for all benchmarks.
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let mut rng = SmallRng::seed_from_u64(1337);
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let access_indices: Vec<usize> = (0..NUM_WRITES)
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.map(|_| rng.random_range(0..VECTOR_SIZE))
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.collect();
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for &bit_width in &bit_widths_to_test {
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let mut group = c.benchmark_group(format!("RandomWrite/{}bit", bit_width));
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// Generate the initial data and the values to be written.
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let initial_data = generate_random_vec(VECTOR_SIZE, 1u64 << bit_width);
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let access_values = generate_random_vec(NUM_WRITES, 1u64 << bit_width);
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// --- 1. Baseline: Standard Vec with the smallest fitting type ---
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match bit_width {
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bw if bw <= 8 => {
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let baseline_data: Vec<u8> = initial_data.iter().map(|&v| v as u8).collect();
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let values_typed: Vec<u8> = access_values.iter().map(|&v| v as u8).collect();
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group.bench_function("Baseline_Vec<u8>/set_unchecked", |b| {
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b.iter_with_setup(
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|| baseline_data.clone(),
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|mut vec| {
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for i in 0..NUM_WRITES {
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unsafe {
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*vec.get_unchecked_mut(access_indices[i]) = values_typed[i]
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};
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}
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black_box(vec);
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},
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);
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});
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}
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bw if bw <= 16 => {
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let baseline_data: Vec<u16> = initial_data.iter().map(|&v| v as u16).collect();
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let values_typed: Vec<u16> = access_values.iter().map(|&v| v as u16).collect();
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group.bench_function("Baseline_Vec<u16>/set_unchecked", |b| {
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b.iter_with_setup(
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|| baseline_data.clone(),
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|mut vec| {
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for i in 0..NUM_WRITES {
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unsafe {
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*vec.get_unchecked_mut(access_indices[i]) = values_typed[i]
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};
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}
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black_box(vec);
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},
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);
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});
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}
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bw if bw <= 32 => {
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let baseline_data: Vec<u32> = initial_data.iter().map(|&v| v as u32).collect();
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let values_typed: Vec<u32> = access_values.iter().map(|&v| v as u32).collect();
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group.bench_function("Baseline_Vec<u32>/set_unchecked", |b| {
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b.iter_with_setup(
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|| baseline_data.clone(),
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|mut vec| {
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for i in 0..NUM_WRITES {
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unsafe {
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*vec.get_unchecked_mut(access_indices[i]) = values_typed[i]
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};
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}
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black_box(vec);
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},
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);
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});
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}
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_ => {
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let baseline_data: Vec<u64> = initial_data.to_vec();
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group.bench_function("Baseline_Vec<u64>/set_unchecked", |b| {
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b.iter_with_setup(
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|| baseline_data.clone(),
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|mut vec| {
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for i in 0..NUM_WRITES {
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unsafe {
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*vec.get_unchecked_mut(access_indices[i]) = access_values[i]
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};
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}
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black_box(vec);
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},
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);
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});
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}
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};
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// --- 2. Setup Compressed Vectors ---
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let le_fixed_vec = LEFixedVec::builder()
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.bit_width(BitWidth::Explicit(bit_width as usize))
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.build(&initial_data)
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.unwrap();
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let sux_bfv = BitFieldVec::<u64>::from_slice(&initial_data).unwrap();
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let mut succinct_iv = SuccinctIntVector::<u64>::new(bit_width as usize);
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succinct_iv.reserve_exact(initial_data.len().try_into().unwrap());
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for &val in &initial_data {
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succinct_iv.push(val);
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}
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let mut sds_iv =
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SdsIntVector::with_len(initial_data.len(), bit_width as usize, 0).unwrap();
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for (i, &val) in initial_data.iter().enumerate() {
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sds_iv.set(i, val);
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}
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// --- 3. Benchmark compressed-intvec ---
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group.bench_function("LEFixedVec/set_unchecked", |b| {
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b.iter_with_setup(
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|| le_fixed_vec.clone(),
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|mut vec| {
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for i in 0..NUM_WRITES {
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unsafe { vec.set_unchecked(access_indices[i], access_values[i]) };
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}
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black_box(vec);
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},
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);
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});
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// --- 4. Benchmark sux::BitFieldVec ---
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group.bench_function("sux::BitFieldVec/set_unchecked", |b| {
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b.iter_with_setup(
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|| sux_bfv.clone(),
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|mut vec| {
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for i in 0..NUM_WRITES {
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unsafe { vec.set_unchecked(access_indices[i], access_values[i]) };
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}
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black_box(vec);
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},
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);
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});
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// --- 5. Benchmark succinct::IntVector ---
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group.bench_function("succinct::IntVector/set", |b| {
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b.iter_with_setup(
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|| succinct_iv.clone(),
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|mut vec| {
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for i in 0..NUM_WRITES {
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// `set` performs bounds checking.
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vec.set(access_indices[i] as u64, access_values[i]);
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}
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black_box(vec);
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},
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);
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});
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// --- 6. Benchmark simple-sds-sbwt::IntVector ---
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group.bench_function("simple-sds-sbwt::IntVector/set", |b| {
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b.iter_with_setup(
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|| sds_iv.clone(),
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|mut vec| {
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for i in 0..NUM_WRITES {
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// `set` performs bounds checking.
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vec.set(access_indices[i], access_values[i]);
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}
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black_box(vec);
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},
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);
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});
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group.finish();
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}
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}
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criterion_group! {
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name = benches;
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config = Criterion::default()
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.sample_size(40)
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.warm_up_time(Duration::from_millis(500))
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.measurement_time(Duration::from_secs(8));
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targets = benchmark_random_write
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}
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criterion_main!(benches);

‎images/random_write_performance.html‎

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‎images/random_write_performance.svg‎

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