VSCodium/VSCode: File | Auto Save is ignored

[tmssngr]

My VSCodium is configured to automatically save files. However, when invoking FPGA Toolchain > Run Testbench, modified files remain modified (bright dot shows in tab at the x location), so it will run the wrong files.

[lushaylabs]

Hey, sorry to hear, just to better understand the issue, you are saying you have a testbench file and when you edit it, it doesn't save even though you have auto-save turned on.
Also just to be clear, are you talking about the module debugger or an actual verilog testbench ?

[tmssngr]

Sorry for being unclear. In VSCodium/VSCode File| Auto Save is selected. I mean a *.v file that I edit in VSCodium/VSCode. It remains in unsaved state when invoking Build and Program, Build Only or Run Testbench (only tried these). Maybe your plugin needs to trigger some event to cause the autosave (which otherwise only happens when switching to another application).