fix: support IDF v6 GPIO register changes

Signed-off-by: Zhibin (Ryan) Wen <wenzhibin@espressif.com>

Author: Sped0n

src/m5_unit_component/adapter_gpio.cpp

@@ -30,7 +30,7 @@
 constexpr auto M5_ADC_ATTEN_DB = ADC_ATTEN_DB_12;
 #else
 #pragma message "Not exists ADC_ATTEN_DB_12"
-constexpr auto M5_ADC_ATTEN_DB       = ADC_ATTEN_DB_11;
+constexpr auto M5_ADC_ATTEN_DB = ADC_ATTEN_DB_11;
 #endif
 
 #if defined(SOC_DAC_SUPPORTED) && SOC_DAC_SUPPORTED
@@ -628,8 +628,8 @@ m5::hal::error::error_t AdapterGPIOBase::GPIOImpl::read_analog_millivolts(uint32
         cali_ok = (adc_cali_create_scheme_curve_fitting(&cali_config, &cali_handle) == ESP_OK);
 #elif ADC_CALI_SCHEME_LINE_FITTING_SUPPORTED
         adc_cali_line_fitting_config_t cali_config = {
-            .unit_id = unit,
-            .atten = M5_ADC_ATTEN_DB,
+            .unit_id  = unit,
+            .atten    = M5_ADC_ATTEN_DB,
             .bitwidth = ADC_BITWIDTH_DEFAULT,
 #if CONFIG_IDF_TARGET_ESP32
             .default_vref = 1100,  // Fallback Vref (mV); used only when eFuse has no calibration

src/m5_unit_component/adapter_gpio_v2.cpp

@@ -27,11 +27,13 @@ rmt_tx_channel_config_t to_rmt_tx_config(const adapter_config_t &cfg, const uint
     out.clk_src = RMT_CLK_SRC_DEFAULT;
     out.mem_block_symbols =
         std::max<uint32_t>(SOC_RMT_MEM_WORDS_PER_CHANNEL, cfg.tx.mem_blocks * SOC_RMT_MEM_WORDS_PER_CHANNEL);
-    out.resolution_hz      = calculate_rmt_resolution_hz(apb_freq_hz, cfg.tx.tick_ns);
-    out.trans_queue_depth  = 4;
-    out.flags.with_dma     = cfg.tx.with_dma;
+    out.resolution_hz     = calculate_rmt_resolution_hz(apb_freq_hz, cfg.tx.tick_ns);
+    out.trans_queue_depth = 4;
+    out.flags.with_dma    = cfg.tx.with_dma;
+#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(6, 0, 0)
     out.flags.io_loop_back = cfg.tx.loop_enabled;
-    out.flags.invert_out   = cfg.tx.invert_signal;
+#endif
+    out.flags.invert_out = cfg.tx.invert_signal;
     return out;
 }
 

src/m5_unit_component/pin.cpp

@@ -14,6 +14,7 @@
 #include <driver/i2c.h>
 #include <soc/gpio_struct.h>
 #include <soc/gpio_periph.h>
+#include <soc/gpio_reg.h>
 
 namespace m5 {
 namespace unit {
@@ -39,7 +40,7 @@ void pin_backup_t::backup(void)
         _gpio_enable = (bool)((*reinterpret_cast<uint32_t*>(((pin_num & 32) ? GPIO_ENABLE1_REG : GPIO_ENABLE_REG)) &
                                (1U << (pin_num & 31))) != 0);
 #else
-        _gpio_enable         = (bool)((*reinterpret_cast<uint32_t*>(GPIO_ENABLE_REG) & (1U << (pin_num & 31))) != 0);
+        _gpio_enable = (bool)((*reinterpret_cast<uint32_t*>(GPIO_ENABLE_REG) & (1U << (pin_num & 31))) != 0);
 #endif
 
         _in_func_num = -1;