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demo/grafana: pure-wire latency panel + clearer latency info tips (both boards)#24

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docs/dashboard-wire-latency-panel
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demo/grafana: pure-wire latency panel + clearer latency info tips (both boards)#24
armcconnell wants to merge 1 commit into
mainfrom
docs/dashboard-wire-latency-panel

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Summary

Adds a Wire latency (publisher→recv, network only) timeseries panel (p50/p95/p99 of send_latency_ms) to both dashboards, and sharpens the latency panel descriptions.

Motivation: source→recv is dominated by the venue→publisher ingest lag (block→emit), which can tail to seconds and is not network. send→recv (recv_ts − publisher_send_ts, kernel-stamped via SO_TIMESTAMPNS) isolates pure transport. The new panel surfaces that directly.

Confirmed live: TOB wire ≈ 68/69/70 ms (flat); MBO wire ≈ 78/210/274 ms (the p99 bump is publisher-side burst serialization at block boundaries) — both far below the source→recv ingest figures.

Changes

  • New wire-latency panel on topofbook and marketbyorder boards (identical except the source table).
  • Info tips: send→recv = pure wire; source→recv = wire + block→emit ingest lag; quantiles panel explains the send/source gap. Filled in previously-empty descriptions too.
  • Kept the two boards as close to identical as possible.

Docs/dashboard-only; no code or schema change.

… (both boards)

Adds a 'Wire latency (publisher->recv, network only)' timeseries (p50/p95/p99
of send_latency_ms) to both the Top-of-Book and Market-by-Order dashboards, so
the network/transport number is separated from the venue->publisher ingest lag
that dominates source->recv.

Also fills in/clarifies panel descriptions, with the latency tips made explicit:
send->recv = pure wire (kernel-stamped recv), source->recv = wire + block->emit
ingest lag. Mirrored identically across both boards.
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