diff --git a/bsp/gd32/risc-v/gd32vw553h-eval/board/Kconfig b/bsp/gd32/risc-v/gd32vw553h-eval/board/Kconfig index e97ec600a4f..d872bb925f6 100644 --- a/bsp/gd32/risc-v/gd32vw553h-eval/board/Kconfig +++ b/bsp/gd32/risc-v/gd32vw553h-eval/board/Kconfig @@ -107,7 +107,27 @@ menu "On-chip Peripheral Drivers" bool "Enable PWM16" default n endif - + + menuconfig BSP_USING_WDT + bool "Enable WDT" + default n + if BSP_USING_WDT + config BSP_USING_FWDT + bool "Enable FWDT" + default y + config BSP_USING_WWDT + bool "Enable WWDT" + default n + choice + prompt "Select WDT type" + default BSP_USING_FWDT + config BSP_USING_FWDT + bool "Enable FWDT" + config BSP_USING_WWDT + bool "Enable WWDT" + endchoice + endif + menuconfig BSP_USING_HW_I2C bool "Enable Hardware I2C" default n diff --git a/bsp/gd32/risc-v/libraries/gd32_drivers/SConscript b/bsp/gd32/risc-v/libraries/gd32_drivers/SConscript index 6d92cf3946e..05e694d9e2a 100644 --- a/bsp/gd32/risc-v/libraries/gd32_drivers/SConscript +++ b/bsp/gd32/risc-v/libraries/gd32_drivers/SConscript @@ -33,7 +33,7 @@ if GetDepend('RT_USING_SFUD'): src += ['drv_spi_flash.c', 'drv_spi.c'] # add wdt drivers. -if GetDepend('RT_USING_WDT'): +if GetDepend(['RT_USING_WDT', 'SOC_GD32VW553H']): src += ['drv_wdt.c'] # add rtc drivers. @@ -52,6 +52,7 @@ if GetDepend('RT_USING_ADC'): if GetDepend(['RT_USING_PWM', 'SOC_GD32VW553H']): src += ['drv_pwm.c'] + path = [cwd] path += [cwd + "/config"] diff --git a/bsp/gd32/risc-v/libraries/gd32_drivers/drv_wdt.c b/bsp/gd32/risc-v/libraries/gd32_drivers/drv_wdt.c new file mode 100644 index 00000000000..8d45576f9fc --- /dev/null +++ b/bsp/gd32/risc-v/libraries/gd32_drivers/drv_wdt.c @@ -0,0 +1,181 @@ +/* + * Copyright (c) 2006-2026, RT-Thread Development Team + * + * SPDX-License-Identifier: Apache-2.0 + * + * Change Logs: + * Date Author Notes + * 2026-02-04 Yixizhang first version + */ + +#include +#include +#ifdef RT_USING_WDT + +#if defined(BSP_USING_FWDT) + #define HW_WDGT_DEV_NAME "fwdgt" +#elif defined(BSP_USING_WWDT) + #define HW_WDGT_DEV_NAME "wwdgt" +#endif + +#define DBG_TAG "wdt" +#define DBG_LVL DBG_LOG + +#include +struct gd32_wdt_obj +{ + rt_watchdog_t watchdog; + rt_uint16_t is_start; +}; +static struct gd32_wdt_obj gd32_wdt; +static struct rt_watchdog_ops ops; + +static rt_err_t wdt_init(rt_watchdog_t *wdt) +{ + LOG_D("wdt init success."); + return RT_EOK; +} + +static rt_err_t wdt_control(rt_watchdog_t *wdt, int cmd, void *arg) +{ + + rt_uint32_t time_sec; + rt_uint32_t time_msec; + rt_uint32_t wdgt_count; + rt_uint32_t window_value; + switch (cmd) + { + /* feed the watchdog */ + case RT_DEVICE_CTRL_WDT_KEEPALIVE: +#if defined(BSP_USING_FWDT) + fwdgt_counter_reload(); +#elif defined(BSP_USING_WWDT) + wwdgt_counter_update(0x70); + LOG_D("wdt update success."); +#endif + break; + case RT_DEVICE_CTRL_WDT_SET_TIMEOUT: + +#if defined(BSP_USING_FWDT) + /* set timeout sec*/ + time_sec = *(rt_uint32_t*)arg; + wdgt_count = 32*1000/32*time_sec; + ErrStatus res = fwdgt_prescaler_value_config(FWDGT_PSC_DIV32); + res = fwdgt_reload_value_config(wdgt_count); + LOG_D("timeout=%d sec,count=%d res=%d ", time_sec, wdgt_count, res); +#elif defined(BSP_USING_WWDT) + /* set timeout ms */ + window_value = 0x7F; + time_msec = *(rt_uint32_t*)arg; + wdgt_count = (rt_uint32_t)((float)((float)1/0.78)*time_msec) + 0x3F; + wwdgt_config(wdgt_count, window_value, WWDGT_CFG_PSC_DIV8); + LOG_D("timeout=%d msec,count=%d ", time_msec, wdgt_count); +#endif + + break; + case RT_DEVICE_CTRL_WDT_START: +#if defined(BSP_USING_FWDT) + fwdgt_enable(); +#elif defined(BSP_USING_WWDT) + wwdgt_enable(); +#endif + LOG_D("wdt control enable success."); + break; + default: + LOG_W("This command is not supported."); + return -RT_ERROR; + } + return RT_EOK; +} + +int rt_wdt_init(void) +{ + rcu_periph_clock_enable(RCU_WWDGT); + gd32_wdt.is_start = 0; + ops.init = &wdt_init; + ops.control = &wdt_control; + gd32_wdt.watchdog.ops = &ops; + /* register watchdog device */ + if (rt_hw_watchdog_register(&gd32_wdt.watchdog, HW_WDGT_DEV_NAME, RT_DEVICE_FLAG_DEACTIVATE, RT_NULL) != RT_EOK) + { + LOG_E("wdt device register failed."); + return -RT_ERROR; + } + LOG_D(" wdt device register success."); + return RT_EOK; +} +INIT_BOARD_EXPORT(rt_wdt_init); + +#if defined(BSP_USING_FWDT) +int fwdt_test_sample() +{ + rt_err_t ret = RT_EOK; + rt_device_t hw_dev = RT_NULL; + rt_ubase_t time_out_sec = 4; + hw_dev = rt_device_find(HW_WDGT_DEV_NAME); + + LOG_D("find fwdt device success,device=%x",hw_dev); + if (hw_dev == RT_NULL) + { + LOG_D("fwdt sample run failed! can't find %s device!", HW_WDGT_DEV_NAME); + return -RT_ERROR; + } + ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); + LOG_D("open fwdt device success"); + if (ret != RT_EOK) + { + LOG_D("open %s device failed!", HW_WDGT_DEV_NAME); + return ret; + } + + ret = rt_device_control(hw_dev, RT_DEVICE_CTRL_WDT_SET_TIMEOUT, &time_out_sec); + if (ret != RT_EOK) + { + LOG_D("control %s device failed!", HW_WDGT_DEV_NAME); + return ret; + } + rt_device_control(hw_dev, RT_DEVICE_CTRL_WDT_START, RT_NULL); + rt_device_control(hw_dev, RT_DEVICE_CTRL_WDT_KEEPALIVE, RT_NULL); + return ret; +} + +MSH_CMD_EXPORT(fwdt_test_sample, fwdt timeout 4 sec reset) + +#elif defined(BSP_USING_WWDT) +int wwdt_test_sample() +{ + rt_err_t ret = RT_EOK; + rt_device_t hw_dev = RT_NULL; + rt_ubase_t time_out_msec = 40; + hw_dev = rt_device_find(HW_WDGT_DEV_NAME); + + LOG_D("find wwdt device success,device=%x",hw_dev); + if (hw_dev == RT_NULL) + { + LOG_D("wwdt sample run failed! can't find %s device!", HW_WDGT_DEV_NAME); + return -RT_ERROR; + } + ret = rt_device_open(hw_dev, RT_DEVICE_OFLAG_RDWR); + LOG_D("open wwdt device success"); + if (ret != RT_EOK) + { + LOG_D("open %s device failed!", HW_WDGT_DEV_NAME); + return ret; + } + + ret = rt_device_control(hw_dev, RT_DEVICE_CTRL_WDT_SET_TIMEOUT, &time_out_msec); + if (ret != RT_EOK) + { + LOG_D("control %s device failed!", HW_WDGT_DEV_NAME); + return ret; + } + rt_device_control(hw_dev, RT_DEVICE_CTRL_WDT_START, RT_NULL); + rt_device_control(hw_dev, RT_DEVICE_CTRL_WDT_KEEPALIVE, RT_NULL); + return ret; +} + +MSH_CMD_EXPORT(wwdt_test_sample, wwdt timeout 40 msec reset) +#endif + +#endif /* RT_USING_WDT */ + diff --git a/components/drivers/i2c/dev_i2c_core.c b/components/drivers/i2c/dev_i2c_core.c index 97c860f8290..fd7774e0343 100644 --- a/components/drivers/i2c/dev_i2c_core.c +++ b/components/drivers/i2c/dev_i2c_core.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2023, RT-Thread Development Team + * Copyright (c) 2006-2024, RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -7,6 +7,7 @@ * Date Author Notes * 2012-04-25 weety first version * 2021-04-20 RiceChen added support for bus control api + * 2024-06-23 wdfk-prog Add max_hz setting */ #include @@ -101,16 +102,42 @@ rt_err_t rt_i2c_control(struct rt_i2c_bus_device *bus, { rt_err_t ret; - if(bus->ops->i2c_bus_control) + switch (cmd) { - ret = bus->ops->i2c_bus_control(bus, cmd, args); - return ret; - } - else - { - LOG_E("I2C bus operation not supported"); - return -RT_EINVAL; + case RT_I2C_CTRL_SET_MAX_HZ: + { + if (args == RT_NULL) + { + return -RT_ERROR; + } + + rt_uint32_t max_hz = *(rt_uint32_t *)args; + if(max_hz > 0) + { + bus->config.max_hz = max_hz; + } + else + { + return -RT_ERROR; + } + break; + } + default: + { + if(bus->ops->i2c_bus_control) + { + ret = bus->ops->i2c_bus_control(bus, cmd, args); + return ret; + } + else + { + LOG_E("I2C bus operation not supported"); + return -RT_EINVAL; + } + break; + } } + return RT_EOK; } rt_ssize_t rt_i2c_master_send(struct rt_i2c_bus_device *bus, diff --git a/components/drivers/include/drivers/dev_i2c.h b/components/drivers/include/drivers/dev_i2c.h index e704d512e0a..869917855e0 100644 --- a/components/drivers/include/drivers/dev_i2c.h +++ b/components/drivers/include/drivers/dev_i2c.h @@ -7,6 +7,7 @@ * Date Author Notes * 2012-04-25 weety first version * 2021-04-20 RiceChen added support for bus control api + * 2024-06-23 wdfk-prog Add the config struct */ #ifndef __DEV_I2C_H__ @@ -185,6 +186,8 @@ extern "C" { #define RT_I2C_NO_READ_ACK (1u << 6) /* when I2C reading, we do not ACK */ #define RT_I2C_NO_STOP (1u << 7) /*!< do not generate STOP condition */ +#define RT_I2C_CTRL_SET_MAX_HZ 0x20 + #define RT_I2C_DEV_CTRL_10BIT (RT_DEVICE_CTRL_BASE(I2CBUS) + 0x01) #define RT_I2C_DEV_CTRL_ADDR (RT_DEVICE_CTRL_BASE(I2CBUS) + 0x02) #define RT_I2C_DEV_CTRL_TIMEOUT (RT_DEVICE_CTRL_BASE(I2CBUS) + 0x03) @@ -233,6 +236,21 @@ struct rt_i2c_bus_device_ops void *args); }; +/** + * I2C configuration structure. + * mode : master: 0x00; slave: 0x01; + * max_hz: Maximum limit baud rate. + * usage_freq: Actual usage baud rate. + */ +struct rt_i2c_configuration +{ + rt_uint8_t mode; + rt_uint8_t reserved[3]; + + rt_uint32_t max_hz; + rt_uint32_t usage_freq; +}; + /** * @brief I2C Bus Device */ @@ -244,6 +262,7 @@ struct rt_i2c_bus_device struct rt_mutex lock; rt_uint32_t timeout; rt_uint32_t retries; + struct rt_i2c_configuration config; void *priv; }; diff --git a/components/drivers/include/drivers/dev_mmcsd_core.h b/components/drivers/include/drivers/dev_mmcsd_core.h index 0e170a6695e..a49867ed84e 100644 --- a/components/drivers/include/drivers/dev_mmcsd_core.h +++ b/components/drivers/include/drivers/dev_mmcsd_core.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2006-2023, RT-Thread Development Team + * Copyright (c) 2006-2026 RT-Thread Development Team * * SPDX-License-Identifier: Apache-2.0 * @@ -175,50 +175,6 @@ struct rt_mmcsd_req #define R5_STATUS(x) (x & 0xCB00) #define R5_IO_CURRENT_STATE(x) ((x & 0x3000) >> 12) - - -/** - * fls - find last (most-significant) bit set - * @x: the word to search - * - * This is defined the same way as ffs. - * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. - */ - -rt_inline rt_uint32_t __rt_fls(rt_uint32_t val) -{ - rt_uint32_t bit = 32; - - if (!val) - return 0; - if (!(val & 0xffff0000u)) - { - val <<= 16; - bit -= 16; - } - if (!(val & 0xff000000u)) - { - val <<= 8; - bit -= 8; - } - if (!(val & 0xf0000000u)) - { - val <<= 4; - bit -= 4; - } - if (!(val & 0xc0000000u)) - { - val <<= 2; - bit -= 2; - } - if (!(val & 0x80000000u)) - { - bit -= 1; - } - - return bit; -} - #define MMCSD_HOST_PLUGED 0 #define MMCSD_HOST_UNPLUGED 1 diff --git a/components/libc/posix/libdl/dlelf.c b/components/libc/posix/libdl/dlelf.c index 24d82d73b4a..6490b326339 100644 --- a/components/libc/posix/libdl/dlelf.c +++ b/components/libc/posix/libdl/dlelf.c @@ -205,7 +205,10 @@ rt_err_t dlmodule_load_shared_object(struct rt_dlmodule* module, void *module_pt } if (unsolved) + { + unsolved = RT_FALSE; return -RT_ERROR; + } } /* construct module symbol table */ diff --git a/components/lwp/arch/aarch64/common/reloc.c b/components/lwp/arch/aarch64/common/reloc.c index a2c6f1ac87d..a6871e19ed0 100644 --- a/components/lwp/arch/aarch64/common/reloc.c +++ b/components/lwp/arch/aarch64/common/reloc.c @@ -10,7 +10,8 @@ #define Elf_Word Elf64_Word #define Elf_Addr Elf64_Addr #define Elf_Half Elf64_Half -#define Elf_Ehdr Elf64_Ehdr #define Elf_Phdr Elf64_Phdr +#define Elf_Ehdr Elf64_Ehdr +#define Elf_Phdr Elf64_Phdr #define Elf_Shdr Elf64_Shdr typedef struct diff --git a/include/rtthread.h b/include/rtthread.h index a87515907e3..08c57f58101 100644 --- a/include/rtthread.h +++ b/include/rtthread.h @@ -809,6 +809,7 @@ rt_device_t rt_console_get_device(void); #endif /* RT_USING_THREADSAFE_PRINTF */ #endif /* defined(RT_USING_DEVICE) && defined(RT_USING_CONSOLE) */ +int __rt_fls(int val); int __rt_ffs(int value); unsigned long __rt_ffsl(unsigned long value); unsigned long __rt_clz(unsigned long value); diff --git a/src/kservice.c b/src/kservice.c index 29c9022c898..60806ce82ac 100644 --- a/src/kservice.c +++ b/src/kservice.c @@ -1103,6 +1103,50 @@ rt_weak void rt_free_align(void *ptr) RTM_EXPORT(rt_free_align); #endif /* RT_USING_HEAP */ +/** + * fls - find last (most-significant) bit set + * @x: the word to search + * + * This is defined the same way as ffs. + * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32. + */ + +int __rt_fls(int val) +{ + int bit = 32; + + if (!val) + { + return 0; + } + if (!(val & 0xffff0000u)) + { + val <<= 16; + bit -= 16; + } + if (!(val & 0xff000000u)) + { + val <<= 8; + bit -= 8; + } + if (!(val & 0xf0000000u)) + { + val <<= 4; + bit -= 4; + } + if (!(val & 0xc0000000u)) + { + val <<= 2; + bit -= 2; + } + if (!(val & 0x80000000u)) + { + bit -= 1; + } + + return bit; +} + #ifndef RT_USING_CPU_FFS #ifdef RT_USING_TINY_FFS const rt_uint8_t __lowest_bit_bitmap[] =