Why didn't using the PYNQ-Z2 board generate a bitfile?

[jray317]

Using examples/bert's bert_demo.py and the corresponding yaml file, I replaced 'v80' in the board section with 'pynq_z2', but no bitfile was generated. Why is that? If I want to switch to other Xilinx boards, such as the vck5000, what should I do?

[tafk7]

There is currently some tension between the "board" and "fpga_part" parameters inside FINN, depending on the target backend flow (vitis vs vivado) you may need to specify an explicit fpga_part; for the VCK5000 I don't believe it has a mapped fpga_part value (see basic.py and platforms.py in FINN). For Pynq-Z2, please try again with the extract string "Pynq-Z2".

We're looking at reworking target platforms for greater customization and extensibility in a future update! Please let me know if issues persist with the Pynq-Z2.

[jray317]

I modified the bert.yaml file, additionally adding two steps that can generate the bitfile and driven. Considering the inheritance relationship of the blueprint, I also modified the relevant content in bert_quicktest.yaml and bert_demo.yaml, with board: "Pynq-Z2". However, when running ./quicktest.sh, some corresponding issues will appear, mainly showing that specific modules do not exist. Just like the picture in Chapter 4, it shows that certain wrappers are missing.