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| Kernel instantiation |`moe_gemv.cu` adds `__nv_bfloat16` details/instantiations (group sizes 0/32/64/128, INT4/INT8, bias on/off) under `ENABLE_BF16`. | The custom FC1/FC2 GEMV kernels run for BF16; no grouped-GEMM fallback when the FP16 gate would route. |
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| Profiling | GPT-OSS-20B, Qwen3.6-35B-A3B, and Gemma model shapes profiled with `block_size=64` for both dtypes. | BF16 matches FP16 routing and latency within noise (about 1.3x–1.5x faster than grouped GEMM); SwiGLU BF16 parity tests pass. |
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#### Split-K2 SwiGLU GEMV default path
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The fp16 INT4 interleaved-SwiGLU GEMV path uses a two-pass Split-K2 FC1 kernel by
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default for supported decode shapes. The first pass computes two K-split FP32
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partials into QMoE workspace, and the second pass reduces those partials, adds
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optional bias, and applies the interleaved SwiGLU epilogue. FC2 stays on the
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regular `moe_gemv_kernel` path.
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Set `ORT_DISABLE_MOE_GEMV_SPLITK2_SWIGLU=1` before process start to force the
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previous single-kernel FC1 SwiGLU GEMV path for debugging, A/B benchmarking, or
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bisecting numerical differences. On GPT-OSS-20B, Split-K2 reduced FC1 kernel
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work from about 21.42 us to 19.98 us and improved repeated CUDA-graph decode
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throughput by about 0.9% to 1.6% with valid focused-helper output. A 1000-sample
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MMLU smoke matched the opt-out fallback within noise. A future autotuner can
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replace this hand-selected default with per-shape route selection.
int tunable_op_enable = 0; // flag specifying if TunableOp is enabled.
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int tunable_op_tuning_enable = 0; // flag specifying if TunableOp is enabled for tuning, this relies on TunableOp is enabled.
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int tunable_op_max_tuning_duration_ms = 0; // Max tuning duration time limit for TunableOp.
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int enable_skip_layer_norm_strict_mode = 0; //flag specifying if SkipLayerNorm is in strict mode. If true, use LayerNormalization kernel.
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//The strict mode has better accuracy but lower performance.
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int enable_skip_layer_norm_strict_mode = 0; //[Deprecated] Accepted for ABI/back-compat but not stored in EP info. SkipLayerNorm always accumulates in fp32.
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//Setting it has no effect on computation or output.
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int prefer_nhwc = 0; // make the CUDA EP NHWC preferred
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int use_ep_level_unified_stream = 0; // flag specifying if ep level stream is used or not
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