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[usb] Fixes for new STM32H5 devices with OTG USB
1 parent 1b48df2 commit 6ea57ad

3 files changed

Lines changed: 38 additions & 5 deletions

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src/modm/platform/clock/stm32/rcc_h5.hpp.in

Lines changed: 33 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -429,6 +429,37 @@ public:
429429
}
430430
%% endfor
431431
%#
432+
%% if target.name in ["e4", "e5", "f4", "f5"]
433+
enum class
434+
UsbClockSource : uint32_t
435+
{
436+
Disabled = 0,
437+
Pll1Q = 0b01 << RCC_CCIPR4_OTGFSSEL_Pos,
438+
Pll{{pll_ids[-1]}}Q = 0b10 << RCC_CCIPR4_OTGFSSEL_Pos,
439+
Hsi48 = 0b11 << RCC_CCIPR4_OTGFSSEL_Pos,
440+
};
441+
static inline void
442+
setUsbClockSource(UsbClockSource src)
443+
{
444+
RCC->CCIPR4 = (RCC->CCIPR4 & ~RCC_CCIPR4_OTGFSSEL) | uint32_t(src);
445+
}
446+
%#
447+
%% if target.name in ["e5", "f5"]
448+
enum class
449+
UsbHsClockSource : uint32_t
450+
{
451+
Disabled = 0,
452+
Pll1Q = 0b01 << RCC_CCIPR4_OTGHSSEL_Pos,
453+
Pll{{pll_ids[-1]}}Q = 0b10 << RCC_CCIPR4_OTGHSSEL_Pos,
454+
Hsi48 = 0b11 << RCC_CCIPR4_OTGHSSEL_Pos,
455+
};
456+
static inline void
457+
setUsbHsClockSource(UsbHsClockSource src)
458+
{
459+
RCC->CCIPR4 = (RCC->CCIPR4 & ~RCC_CCIPR4_OTGHSSEL) | uint32_t(src);
460+
}
461+
%% endif
462+
%% else
432463
enum class
433464
UsbClockSource : uint32_t
434465
{
@@ -442,7 +473,8 @@ public:
442473
{
443474
RCC->CCIPR4 = (RCC->CCIPR4 & ~RCC_CCIPR4_USBSEL) | uint32_t(src);
444475
}
445-
476+
%% endif
477+
%#
446478
// CCIPR5
447479
enum class
448480
CanClockSource : uint32_t

src/modm/platform/usb/stm32/module.lb

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -68,6 +68,7 @@ def generate_instance(env, port, otg=False):
6868
"port": port,
6969
"peripheral": "Usbotg{}".format(port) if otg else "Usb",
7070
"is_otg": otg,
71+
"has_id": "Id" in all_signals,
7172
"is_phyc": port == "hs" and not is_ulpi,
7273
"is_remap": irq_data["is_remap"],
7374
"irqs": irq_data["port_irqs"][port],

src/modm/platform/usb/stm32/usb.hpp.in

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -66,11 +66,11 @@ public:
6666
using Connector = GpioConnector<Peripheral::{{ peripheral }}, Signals...>;
6767
using Dp = typename Connector::template GetSignal< Gpio::Signal::Dp >;
6868
using Dm = typename Connector::template GetSignal< Gpio::Signal::Dm >;
69-
%% if is_otg
69+
%% if has_id
7070
using Id = typename Connector::template GetSignal< Gpio::Signal::Id >;
7171
%% endif
7272
static constexpr bool all_usb =
73-
Connector::template IsValid<Dp> and Connector::template IsValid<Dm>;
73+
Connector::template IsValid<Dp> and Connector::template IsValid<Dm>{% if has_id %} and Connector::template IsValid<Id>{% endif %};
7474
%% if is_ulpi
7575
static constexpr bool any_usb =
7676
Connector::template IsValid<Dp> or Connector::template IsValid<Dm>;
@@ -90,7 +90,7 @@ public:
9090
%% endfor
9191
%#
9292
static_assert((any_ulpi xor any_usb) and (all_ulpi or all_usb),
93-
"{{ name }}::connect() requires at least Dp, Dm (+Id) signals OR 12 ULPI signals:\n"
93+
"{{ name }}::connect() requires at least Dp, Dm{% if has_id %} (+Id){% endif %} signals OR 12 ULPI signals:\n"
9494
%% for signal in ulpi_signals
9595
" - {{ signal.replace("Ulpi", "") | upper }}{% if loop.last %}");{% else %}\n"{% endif %}
9696
%% endfor
@@ -111,7 +111,7 @@ public:
111111
%% set idt = ""
112112
%% endif
113113
{{idt}}GpioSet<Dp, Dm>::configure(Gpio::OutputType::PushPull, Gpio::OutputSpeed::High);
114-
%% if is_otg
114+
%% if has_id
115115
{{idt}}Id::configure(Gpio::OutputType::OpenDrain, Gpio::OutputSpeed::High);
116116
{{idt}}Id::configure(Gpio::InputType::PullUp);
117117
%% endif

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