diff --git a/book/i18n/ko/src/SUMMARY.md b/book/i18n/ko/src/SUMMARY.md
index dd70147b..ba409758 100644
--- a/book/i18n/ko/src/SUMMARY.md
+++ b/book/i18n/ko/src/SUMMARY.md
@@ -12,23 +12,17 @@
 
 - [Puzzle 1: Map](./puzzle_01/puzzle_01.md)
   - [🔰 원시 메모리 방식](./puzzle_01/raw.md)
-  - [💡 미리보기: LayoutTensor를 활용한 현대적 방식](./puzzle_01/layout_tensor_preview.md)
+  - [💡 미리보기: TileTensor를 활용한 현대적 방식](./puzzle_01/tile_tensor_preview.md)
 - [Puzzle 2: Zip](./puzzle_02/puzzle_02.md)
 - [Puzzle 3: 가드](./puzzle_03/puzzle_03.md)
 - [Puzzle 4: 2D Map](./puzzle_04/puzzle_04.md)
   - [🔰 원시 메모리 방식](./puzzle_04/raw.md)
-  - [📚 LayoutTensor 알아보기](./puzzle_04/introduction_layout_tensor.md)
-  - [🚀 현대적 2D 연산](./puzzle_04/layout_tensor.md)
+  - [📚 TileTensor 알아보기](./puzzle_04/introduction_tile_tensor.md)
+  - [🚀 현대적 2D 연산](./puzzle_04/tile_tensor.md)
 - [Puzzle 5: 브로드캐스트](./puzzle_05/puzzle_05.md)
-  - [🔰 원시 메모리 방식](./puzzle_05/raw.md)
-  - [📐 LayoutTensor 버전](./puzzle_05/layout_tensor.md)
 - [Puzzle 6: 블록](./puzzle_06/puzzle_06.md)
 - [Puzzle 7: 2D 블록](./puzzle_07/puzzle_07.md)
-  - [🔰 원시 메모리 방식](./puzzle_07/raw.md)
-  - [📐 LayoutTensor 버전](./puzzle_07/layout_tensor.md)
 - [Puzzle 8: 공유 메모리](./puzzle_08/puzzle_08.md)
-  - [🔰 원시 메모리 방식](./puzzle_08/raw.md)
-  - [📐 LayoutTensor 버전](./puzzle_08/layout_tensor.md)
 
 # Part II: 🐞 GPU 프로그램 디버깅
 
@@ -44,11 +38,7 @@
 # Part III: 🧮 GPU 알고리즘
 
 - [Puzzle 11: 풀링](./puzzle_11/puzzle_11.md)
-  - [🔰 원시 메모리 방식](./puzzle_11/raw.md)
-  - [📐 LayoutTensor 버전](./puzzle_11/layout_tensor.md)
 - [Puzzle 12: 내적](./puzzle_12/puzzle_12.md)
-  - [🔰 원시 메모리 방식](./puzzle_12/raw.md)
-  - [📐 LayoutTensor 버전](./puzzle_12/layout_tensor.md)
 - [Puzzle 13: 1D 합성곱](./puzzle_13/puzzle_13.md)
   - [🔰 기본 버전](./puzzle_13/simple.md)
   - [⭐ 블록 경계 버전](./puzzle_13/block_boundary.md)
diff --git a/book/i18n/ko/src/introduction.md b/book/i18n/ko/src/introduction.md
index 600ccb44..b1616edc 100644
--- a/book/i18n/ko/src/introduction.md
+++ b/book/i18n/ko/src/introduction.md
@@ -157,7 +157,7 @@ GPU 프로그래밍에서는 연산 자체보다 데이터를 옮기는 비용
 
 - 스레드 인덱싱과 블록 구성 배우기
 - 메모리 접근 패턴과 가드 이해하기
-- 원시 포인터와 LayoutTensor 추상화 모두 다뤄보기
+- 원시 포인터와 TileTensor 추상화 모두 다뤄보기
 - 스레드 간 통신을 위한 공유 메모리 기초 익히기
 
 **Part II: GPU 프로그램 디버깅 (퍼즐 9-10) ✅**
@@ -227,7 +227,7 @@ GPU 프로그래밍에서는 연산 자체보다 데이터를 옮기는 비용
 - AI 워크로드를 위한 텐서 코어 프로그래밍 배우기
 - 현대 GPU의 클러스터 프로그래밍 배우기
 
-이 책은 기존 방식과 달리, 먼저 저수준 메모리 조작으로 이해를 쌓은 뒤 점진적으로 Mojo의 LayoutTensor 추상화로 전환합니다. 이를 통해 GPU 메모리 패턴에 대한 깊은 이해와 현대적 텐서 기반 접근법의 실용적 지식을 모두 얻을 수 있습니다.
+이 책은 기존 방식과 달리, 먼저 저수준 메모리 조작으로 이해를 쌓은 뒤 점진적으로 Mojo의 TileTensor 추상화로 전환합니다. 이를 통해 GPU 메모리 패턴에 대한 깊은 이해와 현대적 텐서 기반 접근법의 실용적 지식을 모두 얻을 수 있습니다.
 
 ## 시작할 준비가 되셨나요?
 
diff --git a/book/i18n/ko/src/puzzle_01/puzzle_01.md b/book/i18n/ko/src/puzzle_01/puzzle_01.md
index 1498b7f9..dbbe968b 100644
--- a/book/i18n/ko/src/puzzle_01/puzzle_01.md
+++ b/book/i18n/ko/src/puzzle_01/puzzle_01.md
@@ -32,8 +32,8 @@
 
 직접 메모리를 다루며 GPU의 기본 원리를 익힙니다.
 
-### [💡 미리보기: LayoutTensor를 활용한 현대적 방식](./layout_tensor_preview.md)
+### [💡 미리보기: TileTensor를 활용한 현대적 방식](./tile_tensor_preview.md)
 
-LayoutTensor가 GPU 프로그래밍을 어떻게 단순화하는지 살펴봅니다. 더 안전하고 깔끔한 코드를 작성할 수 있습니다.
+TileTensor가 GPU 프로그래밍을 어떻게 단순화하는지 살펴봅니다. 더 안전하고 깔끔한 코드를 작성할 수 있습니다.
 
 💡 **팁**: 두 방식을 모두 익히면 현대적인 GPU 프로그래밍 패턴을 더 깊이 이해할 수 있습니다.
diff --git a/book/i18n/ko/src/puzzle_01/layout_tensor_preview.md b/book/i18n/ko/src/puzzle_01/tile_tensor_preview.md
similarity index 75%
rename from book/i18n/ko/src/puzzle_01/layout_tensor_preview.md
rename to book/i18n/ko/src/puzzle_01/tile_tensor_preview.md
index 903cd802..87635036 100644
--- a/book/i18n/ko/src/puzzle_01/layout_tensor_preview.md
+++ b/book/i18n/ko/src/puzzle_01/tile_tensor_preview.md
@@ -1,6 +1,6 @@
 <!-- i18n-source-commit: f614177b516e68590fa807e66e31c9f20488c7e7 -->
 
-## 왜 LayoutTensor를 고려해야 할까요?
+## 왜 TileTensor를 고려해야 할까요?
 
 아래 기존 구현을 보면 몇 가지 잠재적인 문제를 발견할 수 있습니다:
 
@@ -32,9 +32,9 @@ idx = (batch * HEIGHT + row) * WIDTH + col
 idx = (batch * padded_height + row) * padded_width + col
 ```
 
-### LayoutTensor 미리보기
+### TileTensor 미리보기
 
-[LayoutTensor](https://docs.modular.com/mojo/kernels/layout/layout_tensor/LayoutTensor/)를 사용하면 이런 경우를 훨씬 깔끔하게 처리할 수 있습니다:
+[TileTensor](https://docs.modular.com/mojo/kernels/layout/tile_tensor/TileTensor/)를 사용하면 이런 경우를 훨씬 깔끔하게 처리할 수 있습니다:
 
 ```mojo
 # 미리보기 - 지금은 이 문법을 몰라도 괜찮습니다!
@@ -42,7 +42,7 @@ output[i, j] = a[i, j] + 10.0  # 2D 인덱싱
 output[b, i, j] = a[b, i, j] + 10.0  # 3D 인덱싱
 ```
 
-Puzzle 4에서 LayoutTensor를 자세히 배울 예정입니다. 그때 이 개념들이 필수가 됩니다. 지금은 다음 내용을 이해하는 데 집중하세요:
+Puzzle 4에서 TileTensor를 자세히 배울 예정입니다. 그때 이 개념들이 필수가 됩니다. 지금은 다음 내용을 이해하는 데 집중하세요:
 
 - 기본 스레드 인덱싱
 - 간단한 메모리 접근 패턴
diff --git a/book/i18n/ko/src/puzzle_02/puzzle_02.md b/book/i18n/ko/src/puzzle_02/puzzle_02.md
index 3381ff6f..480ba4c2 100644
--- a/book/i18n/ko/src/puzzle_02/puzzle_02.md
+++ b/book/i18n/ko/src/puzzle_02/puzzle_02.md
@@ -132,4 +132,4 @@ expected: HostBuffer([0.0, 2.0, 4.0, 6.0])
 - 한 배열을 다른 배열에 브로드캐스트해야 한다면?
 - 여러 배열에서 병합(coalesced) 접근을 어떻게 보장할 수 있을까?
 
-이러한 질문들은 Puzzle 4의 [LayoutTensor 알아보기](../puzzle_04/introduction_layout_tensor.md)에서 다룹니다.
+이러한 질문들은 Puzzle 4의 [TileTensor 알아보기](../puzzle_04/introduction_tile_tensor.md)에서 다룹니다.
diff --git a/book/i18n/ko/src/puzzle_03/puzzle_03.md b/book/i18n/ko/src/puzzle_03/puzzle_03.md
index 79f70fd9..901181ec 100644
--- a/book/i18n/ko/src/puzzle_03/puzzle_03.md
+++ b/book/i18n/ko/src/puzzle_03/puzzle_03.md
@@ -160,4 +160,4 @@ if i < height and j < width and k < depth and
    i >= padding and j >= padding: ...
 ```
 
-이런 경계 처리 패턴은 Puzzle 4의 [LayoutTensor 알아보기](../puzzle_04/introduction_layout_tensor.md)에서 배우면 훨씬 깔끔해집니다. LayoutTensor는 형태 관리 기능을 기본으로 제공합니다.
+이런 경계 처리 패턴은 Puzzle 4의 [TileTensor 알아보기](../puzzle_04/introduction_tile_tensor.md)에서 배우면 훨씬 깔끔해집니다. TileTensor는 형태 관리 기능을 기본으로 제공합니다.
diff --git a/book/i18n/ko/src/puzzle_04/introduction_layout_tensor.md b/book/i18n/ko/src/puzzle_04/introduction_tile_tensor.md
similarity index 65%
rename from book/i18n/ko/src/puzzle_04/introduction_layout_tensor.md
rename to book/i18n/ko/src/puzzle_04/introduction_tile_tensor.md
index 35098d83..076a239b 100644
--- a/book/i18n/ko/src/puzzle_04/introduction_layout_tensor.md
+++ b/book/i18n/ko/src/puzzle_04/introduction_tile_tensor.md
@@ -1,11 +1,11 @@
 <!-- i18n-source-commit: 9ac1b899ca05c1be26f2d9ee77fe97503d00cc0f -->
 
-# LayoutTensor 알아보기
+# TileTensor 알아보기
 
 퍼즐 풀이를 잠시 멈추고, GPU 프로그래밍을 더 즐겁게 만들어줄 강력한 추상화를 미리 살펴봅시다:
-🥁 ... 바로 **[LayoutTensor](https://docs.modular.com/mojo/kernels/layout/layout_tensor/LayoutTensor/)** 입니다.
+🥁 ... 바로 **[TileTensor](https://docs.modular.com/mojo/kernels/layout/tile_tensor/TileTensor/)** 입니다.
 
-> 💡 _LayoutTensor가 어떤 일을 할 수 있는지 맛보기로 살펴봅니다. 지금 모든 걸 이해할 필요는 없어요 - 퍼즐을 진행하면서 각 기능을 자세히 알아볼 겁니다_.
+> 💡 _TileTensor가 어떤 일을 할 수 있는지 맛보기로 살펴봅니다. 지금 모든 걸 이해할 필요는 없어요 - 퍼즐을 진행하면서 각 기능을 자세히 알아볼 겁니다_.
 
 ## 문제: 점점 복잡해지는 코드
 
@@ -32,9 +32,9 @@ if row < height and col < width:
     output[idx] = a[idx] + 10.0
 ```
 
-## 해결책: LayoutTensor 미리보기
+## 해결책: TileTensor 미리보기
 
-LayoutTensor는 이런 문제들을 깔끔하게 해결해줍니다. 앞으로 배울 내용을 살짝 엿보면:
+TileTensor는 이런 문제들을 깔끔하게 해결해줍니다. 앞으로 배울 내용을 살짝 엿보면:
 
 1. **자연스러운 인덱싱**: 수동 오프셋 계산 대신 `tensor[i, j]` 사용
 2. **유연한 메모리 레이아웃**: 행 우선, 열 우선, 타일 구성 지원
@@ -42,34 +42,36 @@ LayoutTensor는 이런 문제들을 깔끔하게 해결해줍니다. 앞으로 
 
 ## 앞으로 배울 내용 맛보기
 
-LayoutTensor가 할 수 있는 일을 몇 가지 예시로 살펴봅시다. 지금 모든 세부 사항을 이해할 필요는 없습니다 - 앞으로 나올 퍼즐에서 각 기능을 꼼꼼히 다룰 거예요.
+TileTensor가 할 수 있는 일을 몇 가지 예시로 살펴봅시다. 지금 모든 세부 사항을 이해할 필요는 없습니다 - 앞으로 나올 퍼즐에서 각 기능을 꼼꼼히 다룰 거예요.
 
 ### 기본 사용 예시
 
 ```mojo
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
 
 # 레이아웃 정의
 comptime HEIGHT = 2
 comptime WIDTH = 3
-comptime layout = Layout.row_major(HEIGHT, WIDTH)
+comptime layout = row_major[HEIGHT, WIDTH]()
+comptime LayoutType = type_of(layout)
 
 # 텐서 생성
-tensor = LayoutTensor[dtype, layout](buffer.unsafe_ptr())
+tensor = TileTensor(buffer, layout)
 
 # 자연스럽게 요소 접근
 tensor[0, 0] = 1.0  # 첫 번째 요소
 tensor[1, 2] = 2.0  # 마지막 요소
 ```
 
-`Layout`과 `LayoutTensor`에 대해 더 알아보려면 [Mojo 매뉴얼](https://docs.modular.com/mojo/manual/)의 가이드를 참고하세요:
+`Layout`과 `TileTensor`에 대해 더 알아보려면 [Mojo 매뉴얼](https://docs.modular.com/mojo/manual/)의 가이드를 참고하세요:
 
 - [Introduction to layouts](https://docs.modular.com/mojo/manual/layout/layouts)
-- [Using LayoutTensor](https://docs.modular.com/mojo/manual/layout/tensors)
+- [Using TileTensor](https://docs.modular.com/mojo/manual/layout/tensors)
 
 ## 간단한 예제
 
-LayoutTensor의 기본을 보여주는 간단한 예제로 모든 것을 정리해봅시다:
+TileTensor의 기본을 보여주는 간단한 예제로 모든 것을 정리해봅시다:
 
 ```mojo
 {{#include ../../../../src/puzzle_04/intro.mojo}}
@@ -87,28 +89,28 @@ LayoutTensor의 기본을 보여주는 간단한 예제로 모든 것을 정리
   <div class="tab-content">
 
 ```bash
-pixi run layout_tensor_intro
+pixi run tile_tensor_intro
 ```
 
   </div>
   <div class="tab-content">
 
 ```bash
-pixi run -e amd layout_tensor_intro
+pixi run -e amd tile_tensor_intro
 ```
 
   </div>
   <div class="tab-content">
 
 ```bash
-pixi run -e apple layout_tensor_intro
+pixi run -e apple tile_tensor_intro
 ```
 
   </div>
   <div class="tab-content">
 
 ```bash
-uv run poe layout_tensor_intro
+uv run poe tile_tensor_intro
 ```
 
   </div>
@@ -130,7 +132,7 @@ After:
 3. 자연스러운 인덱싱으로 하나의 요소를 수정합니다
 4. 변경 사항이 출력에 반영됩니다
 
-이 간단한 예제는 LayoutTensor의 핵심 장점을 보여줍니다:
+이 간단한 예제는 TileTensor의 핵심 장점을 보여줍니다:
 
 - 텐서 생성과 접근을 위한 깔끔한 문법
 - 자동 메모리 레이아웃 처리
@@ -143,6 +145,6 @@ After:
 - 복잡한 타일링 전략
 - 하드웨어 가속 연산
 
-LayoutTensor와 함께 GPU 프로그래밍 여정을 시작할 준비가 됐나요? 퍼즐로 들어가봅시다!
+TileTensor와 함께 GPU 프로그래밍 여정을 시작할 준비가 됐나요? 퍼즐로 들어가봅시다!
 
 💡 **팁**: 진행하면서 이 예제를 기억해두세요 - 이 기본 개념을 바탕으로 점점 더 정교한 GPU 프로그램을 만들어갈 겁니다.
diff --git a/book/i18n/ko/src/puzzle_04/puzzle_04.md b/book/i18n/ko/src/puzzle_04/puzzle_04.md
index 522fe51e..d97ce9b4 100644
--- a/book/i18n/ko/src/puzzle_04/puzzle_04.md
+++ b/book/i18n/ko/src/puzzle_04/puzzle_04.md
@@ -51,12 +51,12 @@
 
 수동으로 메모리를 관리하면서 2D 인덱싱이 어떻게 동작하는지 알아봅니다.
 
-### [📚 LayoutTensor 알아보기](./introduction_layout_tensor.md)
+### [📚 TileTensor 알아보기](./introduction_tile_tensor.md)
 
 GPU에서 다차원 배열 연산과 메모리 관리를 간편하게 해주는 강력한 추상화를 소개합니다.
 
-### [🚀 현대적 2D 연산](./layout_tensor.md)
+### [🚀 현대적 2D 연산](./tile_tensor.md)
 
-자연스러운 2D 인덱싱과 자동 경계 검사를 갖춘 LayoutTensor를 직접 써봅니다.
+자연스러운 2D 인덱싱과 자동 경계 검사를 갖춘 TileTensor를 직접 써봅니다.
 
-💡 **참고**: 이 퍼즐부터는 더 깔끔하고 안전한 GPU 코드를 위해 LayoutTensor를 주로 사용합니다.
+💡 **참고**: 이 퍼즐부터는 더 깔끔하고 안전한 GPU 코드를 위해 TileTensor를 주로 사용합니다.
diff --git a/book/i18n/ko/src/puzzle_04/layout_tensor.md b/book/i18n/ko/src/puzzle_04/tile_tensor.md
similarity index 65%
rename from book/i18n/ko/src/puzzle_04/layout_tensor.md
rename to book/i18n/ko/src/puzzle_04/tile_tensor.md
index 5412e089..75499e48 100644
--- a/book/i18n/ko/src/puzzle_04/layout_tensor.md
+++ b/book/i18n/ko/src/puzzle_04/tile_tensor.md
@@ -1,10 +1,10 @@
 <!-- i18n-source-commit: db06539cab77774402e8a4bf955018fd853803d9 -->
 
-# LayoutTensor 버전
+# TileTensor 버전
 
 ## 개요
 
-2D _LayoutTensor_ `a`의 각 위치에 10을 더해 2D _LayoutTensor_ `output`에 저장하는 커널을 구현해 보세요.
+2D _TileTensor_ `a`의 각 위치에 10을 더해 2D _TileTensor_ `output`에 저장하는 커널을 구현해 보세요.
 
 **참고**: _스레드 수가 행렬의 위치 수보다 많습니다_.
 
@@ -12,13 +12,13 @@
 
 이 퍼즐에서 배울 내용:
 
-- 2D 배열 접근에 `LayoutTensor` 사용하기
+- 2D 배열 접근에 `TileTensor` 사용하기
 - `tensor[i, j]`로 직접 2D 인덱싱하기
-- `LayoutTensor`에서 경계 검사 처리하기
+- `TileTensor`에서 경계 검사 처리하기
 
-핵심은 `LayoutTensor`가 자연스러운 2D 인덱싱 인터페이스를 제공하여 내부 메모리 레이아웃을 추상화한다는 점입니다. 그러면서도 경계 검사는 여전히 필요합니다.
+핵심은 `TileTensor`가 자연스러운 2D 인덱싱 인터페이스를 제공하여 내부 메모리 레이아웃을 추상화한다는 점입니다. 그러면서도 경계 검사는 여전히 필요합니다.
 
-- **2D 접근**: `LayoutTensor`로 자연스러운 \\((i,j)\\) 인덱싱
+- **2D 접근**: `TileTensor`로 자연스러운 \\((i,j)\\) 인덱싱
 - **메모리 추상화**: 수동 행 우선 계산 불필요
 - **가드 조건**: 두 차원 모두 경계 검사 필요
 - **스레드 범위**: 스레드 \\((3 \times 3)\\)가 텐서 원소 \\((2 \times 2)\\)보다 많음
@@ -26,10 +26,10 @@
 ## 완성할 코드
 
 ```mojo
-{{#include ../../../../../problems/p04/p04_layout_tensor.mojo:add_10_2d_layout_tensor}}
+{{#include ../../../../../problems/p04/p04_tile_tensor.mojo:add_10_2d_tile_tensor}}
 ```
 
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p04/p04_layout_tensor.mojo" class="filename">전체 코드 보기: problems/p04/p04_layout_tensor.mojo</a>
+<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p04/p04_tile_tensor.mojo" class="filename">전체 코드 보기: problems/p04/p04_tile_tensor.mojo</a>
 
 <details>
 <summary><strong>팁</strong></summary>
@@ -57,28 +57,28 @@
   <div class="tab-content">
 
 ```bash
-pixi run p04_layout_tensor
+pixi run p04_tile_tensor
 ```
 
   </div>
   <div class="tab-content">
 
 ```bash
-pixi run -e amd p04_layout_tensor
+pixi run -e amd p04_tile_tensor
 ```
 
   </div>
   <div class="tab-content">
 
 ```bash
-pixi run -e apple p04_layout_tensor
+pixi run -e apple p04_tile_tensor
 ```
 
   </div>
   <div class="tab-content">
 
 ```bash
-uv run poe p04_layout_tensor
+uv run poe p04_tile_tensor
 ```
 
   </div>
@@ -97,7 +97,7 @@ expected: HostBuffer([10.0, 11.0, 12.0, 13.0])
 <summary></summary>
 
 ```mojo
-{{#include ../../../../../solutions/p04/p04_layout_tensor.mojo:add_10_2d_layout_tensor_solution}}
+{{#include ../../../../../solutions/p04/p04_tile_tensor.mojo:add_10_2d_tile_tensor_solution}}
 ```
 
 <div class="solution-explanation">
@@ -106,7 +106,7 @@ expected: HostBuffer([10.0, 11.0, 12.0, 13.0])
 
 - `row = thread_idx.y`, `col = thread_idx.x`로 2D 스레드 인덱스를 가져옴
 - `if row < size and col < size`로 범위를 벗어난 접근 방지
-- `LayoutTensor`의 2D 인덱싱 사용: `output[row, col] = a[row, col] + 10.0`
+- `TileTensor`의 2D 인덱싱 사용: `output[row, col] = a[row, col] + 10.0`
 
 </div>
 </details>
diff --git a/book/i18n/ko/src/puzzle_05/layout_tensor.md b/book/i18n/ko/src/puzzle_05/layout_tensor.md
deleted file mode 100644
index 319ef21c..00000000
--- a/book/i18n/ko/src/puzzle_05/layout_tensor.md
+++ /dev/null
@@ -1,130 +0,0 @@
-<!-- i18n-source-commit: db06539cab77774402e8a4bf955018fd853803d9 -->
-
-# LayoutTensor 버전
-
-## 개요
-
-1D LayoutTensor `a`와 `b`를 브로드캐스트로 더해 2D LayoutTensor `output`에 저장하는 커널을 구현해 보세요.
-
-**참고**: _스레드 수가 행렬의 위치 수보다 많습니다._
-
-## 핵심 개념
-
-이 퍼즐에서 배울 내용:
-
-- 브로드캐스트 연산에 `LayoutTensor` 사용하기
-- 서로 다른 텐서 크기 다루기
-- `LayoutTensor`로 2D 인덱싱 처리하기
-
-핵심은 `LayoutTensor`가 서로 다른 텐서 크기 \\((1, n)\\)와 \\((n, 1)\\)을 \\((n,n)\\)으로 자연스럽게 브로드캐스트할 수 있다는 점입니다. 그러면서도 경계 검사는 여전히 필요합니다.
-
-- **텐서 크기**: 입력 벡터의 크기는 \\((1, n)\\)과 \\((n, 1)\\)
-- **브로드캐스트**: 두 차원을 결합해 \\((n,n)\\) 출력 생성
-- **가드 조건**: 출력 크기에 대한 경계 검사는 여전히 필요
-- **스레드 범위**: 텐서 원소 \\((2 \times 2)\\)보다 스레드 \\((3 \times 3)\\)가 많음
-
-## 완성할 코드
-
-```mojo
-{{#include ../../../../../problems/p05/p05_layout_tensor.mojo:broadcast_add_layout_tensor}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p05/p05_layout_tensor.mojo" class="filename">전체 코드 보기: problems/p05/p05_layout_tensor.mojo</a>
-
-<details>
-<summary><strong>팁</strong></summary>
-
-<div class="solution-tips">
-
-1. 2D 인덱스 가져오기: `row = thread_idx.y`, `col = thread_idx.x`
-2. 가드 추가: `if row < size and col < size`
-3. 가드 내부: LayoutTensor로 `a`와 `b` 값을 어떻게 브로드캐스트할지 생각해 보세요
-
-</div>
-</details>
-
-## 코드 실행
-
-솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p05_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p05_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p05_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p05_layout_tensor
-```
-
-  </div>
-</div>
-
-퍼즐을 아직 풀지 않았다면 출력이 다음과 같이 나타납니다:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, 0.0])
-expected: HostBuffer([1.0, 2.0, 11.0, 12.0])
-```
-
-## 솔루션
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../../../solutions/p05/p05_layout_tensor.mojo:broadcast_add_layout_tensor_solution}}
-```
-
-<div class="solution-explanation">
-
-LayoutTensor 브로드캐스트와 GPU 스레드 매핑의 핵심 개념을 보여주는 솔루션입니다:
-
-1. **스레드에서 행렬로 매핑**
-
-   - `thread_idx.y`로 행, `thread_idx.x`로 열에 접근
-   - 자연스러운 2D 인덱싱이 출력 행렬 구조와 일치
-   - 초과 스레드(3×3 그리드)는 경계 검사로 처리
-
-2. **브로드캐스트 작동 방식**
-   - 입력 `a`의 크기는 `(1,n)`: `a[0,col]`이 행을 가로질러 브로드캐스트
-   - 입력 `b`의 크기는 `(n,1)`: `b[row,0]`이 열을 가로질러 브로드캐스트
-   - 출력의 크기는 `(n,n)`: 각 원소는 해당 브로드캐스트 값들의 합
-
-   ```txt
-   [ a0 a1 ]  +  [ b0 ]  =  [ a0+b0  a1+b0 ]
-                 [ b1 ]     [ a0+b1  a1+b1 ]
-   ```
-
-3. **경계 검사**
-   - 가드 조건 `row < size and col < size`로 범위 초과 접근 방지
-   - 행렬 범위와 초과 스레드를 효율적으로 처리
-   - 브로드캐스트 덕분에 `a`와 `b`에 대한 별도 검사 불필요
-
-이 패턴은 이후 퍼즐에서 다룰 더 복잡한 텐서 연산의 기초가 됩니다.
-</div>
-</details>
diff --git a/book/i18n/ko/src/puzzle_05/puzzle_05.md b/book/i18n/ko/src/puzzle_05/puzzle_05.md
index 766ebef3..f572c2b8 100644
--- a/book/i18n/ko/src/puzzle_05/puzzle_05.md
+++ b/book/i18n/ko/src/puzzle_05/puzzle_05.md
@@ -4,9 +4,7 @@
 
 ## 개요
 
-벡터 `a`와 `b`를 브로드캐스트(broadcast)로 더해 2D 행렬 `output`에 저장하는 커널을 구현해 보세요.
-
-병렬 프로그래밍에서 **브로드캐스트**란 요소별 연산을 할 때 저차원 배열을 고차원 배열의 형상에 맞게 자동으로 확장하는 것을 말합니다. 실제로 메모리에 데이터를 복제하지 않고, 추가 차원에 걸쳐 값을 논리적으로 반복하는 방식입니다. 예를 들어, 2D 행렬의 각 행(또는 열)에 1D 벡터를 더할 때 벡터를 여러 번 복사하지 않아도 같은 요소가 자동으로 반복 적용됩니다.
+1D TileTensor `a`와 `b`를 브로드캐스트로 더해 2D TileTensor `output`에 저장하는 커널을 구현해 보세요.
 
 **참고**: _스레드 수가 행렬의 위치 수보다 많습니다._
 
@@ -15,19 +13,121 @@
 
 ## 핵심 개념
 
-- 벡터를 행렬로 브로드캐스트하기
-- 2D 스레드 관리
-- 서로 다른 차원 간 연산
-- 메모리 레이아웃 패턴
+이 퍼즐에서 배울 내용:
+
+- 브로드캐스트 연산에 `TileTensor` 사용하기
+- 서로 다른 텐서 크기 다루기
+- `TileTensor`로 2D 인덱싱 처리하기
+
+핵심은 `TileTensor`가 서로 다른 텐서 크기 \\((1, n)\\)와 \\((n, 1)\\)을 \\((n,n)\\)으로 자연스럽게 브로드캐스트할 수 있다는 점입니다. 그러면서도 경계 검사는 여전히 필요합니다.
+
+- **텐서 크기**: 입력 벡터의 크기는 \\((1, n)\\)과 \\((n, 1)\\)
+- **브로드캐스트**: 두 차원을 결합해 \\((n,n)\\) 출력 생성
+- **가드 조건**: 출력 크기에 대한 경계 검사는 여전히 필요
+- **스레드 범위**: 텐서 원소 \\((2 \times 2)\\)보다 스레드 \\((3 \times 3)\\)가 많음
+
+## 완성할 코드
+
+```mojo
+{{#include ../../../../../problems/p05/p05.mojo:broadcast_add}}
+```
+
+<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p05/p05.mojo" class="filename">전체 코드 보기: problems/p05/p05.mojo</a>
+
+<details>
+<summary><strong>팁</strong></summary>
+
+<div class="solution-tips">
+
+1. 2D 인덱스 가져오기: `row = thread_idx.y`, `col = thread_idx.x`
+2. 가드 추가: `if row < size and col < size`
+3. 가드 내부: TileTensor로 `a`와 `b` 값을 어떻게 브로드캐스트할지 생각해 보세요
+
+</div>
+</details>
+
+## 코드 실행
+
+솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
+
+<div class="code-tabs" data-tab-group="package-manager">
+  <div class="tab-buttons">
+    <button class="tab-button">pixi NVIDIA (default)</button>
+    <button class="tab-button">pixi AMD</button>
+    <button class="tab-button">pixi Apple</button>
+    <button class="tab-button">uv</button>
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run p05
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e amd p05
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e apple p05
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+uv run poe p05
+```
+
+  </div>
+</div>
+
+퍼즐을 아직 풀지 않았다면 출력이 다음과 같이 나타납니다:
+
+```txt
+out: HostBuffer([0.0, 0.0, 0.0, 0.0])
+expected: HostBuffer([1.0, 2.0, 11.0, 12.0])
+```
+
+## 솔루션
+
+<details class="solution-details">
+<summary></summary>
+
+```mojo
+{{#include ../../../../../solutions/p05/p05.mojo:broadcast_add_solution}}
+```
+
+<div class="solution-explanation">
+
+TileTensor 브로드캐스트와 GPU 스레드 매핑의 핵심 개념을 보여주는 솔루션입니다:
 
-## 구현 방식
+1. **스레드에서 행렬로 매핑**
 
-### [🔰 원시 메모리 방식](./raw.md)
+   - `thread_idx.y`로 행, `thread_idx.x`로 열에 접근
+   - 자연스러운 2D 인덱싱이 출력 행렬 구조와 일치
+   - 초과 스레드(3×3 그리드)는 경계 검사로 처리
 
-수동 메모리 인덱싱으로 브로드캐스트를 처리하는 방법을 알아봅니다.
+2. **브로드캐스트 작동 방식**
+   - 입력 `a`의 크기는 `(1,n)`: `a[0,col]`이 행을 가로질러 브로드캐스트
+   - 입력 `b`의 크기는 `(n,1)`: `b[row,0]`이 열을 가로질러 브로드캐스트
+   - 출력의 크기는 `(n,n)`: 각 원소는 해당 브로드캐스트 값들의 합
 
-### [📐 LayoutTensor 버전](./layout_tensor.md)
+   ```txt
+   [ a0 a1 ]  +  [ b0 ]  =  [ a0+b0  a1+b0 ]
+                 [ b1 ]     [ a0+b1  a1+b1 ]
+   ```
 
-서로 다른 차원 간 연산을 LayoutTensor로 처리합니다.
+3. **경계 검사**
+   - 가드 조건 `row < size and col < size`로 범위 초과 접근 방지
+   - 행렬 범위와 초과 스레드를 효율적으로 처리
+   - 브로드캐스트 덕분에 `a`와 `b`에 대한 별도 검사 불필요
 
-💡 **참고**: 수동 인덱싱과 비교했을 때 LayoutTensor가 브로드캐스트를 얼마나 간단하게 만들어주는지 확인해 보세요.
+이 패턴은 이후 퍼즐에서 다룰 더 복잡한 텐서 연산의 기초가 됩니다.
+</div>
+</details>
diff --git a/book/i18n/ko/src/puzzle_05/raw.md b/book/i18n/ko/src/puzzle_05/raw.md
deleted file mode 100644
index a6576518..00000000
--- a/book/i18n/ko/src/puzzle_05/raw.md
+++ /dev/null
@@ -1,127 +0,0 @@
-<!-- i18n-source-commit: db06539cab77774402e8a4bf955018fd853803d9 -->
-
-## 개요
-
-벡터 `a`와 `b`를 브로드캐스트로 더해 2D 행렬 `output`에 저장하는 커널을 구현해 보세요.
-
-**참고**: _스레드 수가 행렬의 위치 수보다 많습니다._
-
-## 핵심 개념
-
-이 퍼즐에서 배울 내용:
-
-- 1D 벡터를 각각 다른 차원 방향으로 브로드캐스트하기
-- 2D 스레드 인덱스로 브로드캐스트 연산 수행하기
-- 브로드캐스트 패턴에서 경계 조건 처리하기
-
-핵심은 두 1D 벡터의 원소들을 브로드캐스트로 2D 출력 행렬에 매핑하는 방법을 이해하고, 스레드 경계를 올바르게 처리하는 것입니다.
-
-- **브로드캐스트**: `a`의 각 원소가 `b`의 각 원소와 결합
-- **스레드 매핑**: \\(2 \times 2\\) 출력에 \\((3 \times 3)\\) 스레드 그리드 사용
-- **벡터 접근**: `a`와 `b`는 서로 다른 접근 패턴 사용
-- **경계 검사**: 행렬 범위를 벗어나는 스레드를 가드로 처리
-
-## 완성할 코드
-
-```mojo
-{{#include ../../../../../problems/p05/p05.mojo:broadcast_add}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p05/p05.mojo" class="filename">전체 코드 보기: problems/p05/p05.mojo</a>
-
-<details>
-<summary><strong>팁</strong></summary>
-
-<div class="solution-tips">
-
-1. 2D 인덱스 가져오기: `row = thread_idx.y`, `col = thread_idx.x`
-2. 가드 추가: `if row < size and col < size`
-3. 가드 내부: `a`와 `b` 값을 어떻게 브로드캐스트할지 생각해 보세요
-
-</div>
-</details>
-
-## 코드 실행
-
-솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p05
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p05
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p05
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p05
-```
-
-  </div>
-</div>
-
-퍼즐을 아직 풀지 않았다면 출력이 다음과 같이 나타납니다:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, 0.0])
-expected: HostBuffer([1.0, 2.0, 11.0, 12.0])
-```
-
-## 솔루션
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../../../solutions/p05/p05.mojo:broadcast_add_solution}}
-```
-
-<div class="solution-explanation">
-
-LayoutTensor 추상화 없이 GPU 브로드캐스트의 기본 개념을 보여주는 솔루션입니다:
-
-1. **스레드에서 행렬로 매핑**
-   - `thread_idx.y`로 행, `thread_idx.x`로 열에 접근
-   - 2D 스레드 그리드를 출력 행렬 원소에 직접 매핑
-   - 3×3 그리드의 초과 스레드를 2×2 출력에 맞게 처리
-
-2. **브로드캐스트 작동 방식**
-   - 벡터 `a`는 수평 방향으로 브로드캐스트: 각 행에서 동일한 `a[col]` 사용
-   - 벡터 `b`는 수직 방향으로 브로드캐스트: 각 열에서 동일한 `b[row]` 사용
-   - 두 벡터를 더해 출력 생성
-
-   ```txt
-   [ a0 a1 ]  +  [ b0 ]  =  [ a0+b0  a1+b0 ]
-                 [ b1 ]     [ a0+b1  a1+b1 ]
-   ```
-
-3. **경계 검사**
-   - 단일 가드 조건 `row < size and col < size`로 두 차원 모두 처리
-   - 입력 벡터와 출력 행렬의 범위 초과 접근 방지
-   - 3×3 스레드 그리드가 2×2 데이터보다 크므로 반드시 필요
-
-LayoutTensor 버전과 비교해서 동일한 기본 개념을 유지하면서 추상화가 브로드캐스트 연산을 얼마나 단순하게 만드는지 확인해 보세요.
-</div>
-</details>
diff --git a/book/i18n/ko/src/puzzle_06/puzzle_06.md b/book/i18n/ko/src/puzzle_06/puzzle_06.md
index 22c1e080..08909897 100644
--- a/book/i18n/ko/src/puzzle_06/puzzle_06.md
+++ b/book/i18n/ko/src/puzzle_06/puzzle_06.md
@@ -29,7 +29,7 @@
 
 <a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p06/p06.mojo" class="filename">전체 코드 보기: problems/p06/p06.mojo</a>
 
-> 참고: 이 퍼즐의 `LayoutTensor` 버전은 거의 동일하므로 독자에게 맡깁니다.
+> 참고: 이 퍼즐의 `TileTensor` 버전은 거의 동일하므로 독자에게 맡깁니다.
 
 <details>
 <summary><strong>팁</strong></summary>
diff --git a/book/i18n/ko/src/puzzle_07/layout_tensor.md b/book/i18n/ko/src/puzzle_07/layout_tensor.md
deleted file mode 100644
index 1c983fd8..00000000
--- a/book/i18n/ko/src/puzzle_07/layout_tensor.md
+++ /dev/null
@@ -1,160 +0,0 @@
-<!-- i18n-source-commit: db06539cab77774402e8a4bf955018fd853803d9 -->
-
-# LayoutTensor 버전
-
-## 개요
-
-2D LayoutTensor `a`의 각 위치에 10을 더해 2D LayoutTensor `output`에 저장하는 커널을 구현해 보세요.
-
-**참고:** _블록당 스레드 수가 `a`의 행과 열 크기보다 모두 작습니다._
-
-## 핵심 개념
-
-이 퍼즐에서 배울 내용:
-
-- 여러 블록과 함께 `LayoutTensor` 사용하기
-- 2D 블록 구성으로 큰 행렬 처리하기
-- 블록 인덱싱과 `LayoutTensor` 접근 결합하기
-
-핵심은 `LayoutTensor`가 2D 인덱싱을 단순화해 주지만, 큰 행렬에서는 여전히 블록 간 조율이 필요하다는 점입니다.
-
-## 구성
-
-- **행렬 크기**: \\(5 \times 5\\) 원소
-- **레이아웃 처리**: `LayoutTensor`가 행 우선 구성 관리
-- **블록 조율**: 여러 블록으로 전체 행렬 커버
-- **2D 인덱싱**: 경계 검사와 함께 자연스러운 \\((i,j)\\) 접근
-- **총 스레드 수**: \\(25\\)개 원소에 대해 \\(36\\)개
-- **스레드 매핑**: 각 스레드가 행렬 원소 하나씩 처리
-
-## 완성할 코드
-
-```mojo
-{{#include ../../../../../problems/p07/p07_layout_tensor.mojo:add_10_blocks_2d_layout_tensor}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p07/p07_layout_tensor.mojo" class="filename">전체 코드 보기: problems/p07/p07_layout_tensor.mojo</a>
-
-<details>
-<summary><strong>팁</strong></summary>
-
-<div class="solution-tips">
-
-1. 전역 인덱스 계산: `row = block_dim.y * block_idx.y + thread_idx.y`, `col = block_dim.x * block_idx.x + thread_idx.x`
-2. 가드 추가: `if row < size and col < size`
-3. 가드 내부: 2D LayoutTensor에 10을 더하는 방법을 생각해 보세요
-
-</div>
-</details>
-
-## 코드 실행
-
-솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p07_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p07_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p07_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p07_layout_tensor
-```
-
-  </div>
-</div>
-
-퍼즐을 아직 풀지 않았다면 출력이 다음과 같이 나타납니다:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, ... , 0.0])
-expected: HostBuffer([10.0, 11.0, 12.0, ... , 34.0])
-```
-
-## 솔루션
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../../../solutions/p07/p07_layout_tensor.mojo:add_10_blocks_2d_layout_tensor_solution}}
-```
-
-<div class="solution-explanation">
-
-LayoutTensor가 2D 블록 기반 처리를 얼마나 간소화하는지 보여주는 솔루션입니다:
-
-1. **2D 스레드 인덱싱**
-   - 전역 행(row): `block_dim.y * block_idx.y + thread_idx.y`
-   - 전역 열(col): `block_dim.x * block_idx.x + thread_idx.x`
-   - 스레드 그리드를 텐서 원소에 매핑:
-
-     ```txt
-     3×3 블록으로 구성된 5×5 텐서:
-
-     Block (0,0)         Block (1,0)
-     [(0,0) (0,1) (0,2)] [(0,3) (0,4)    *  ]
-     [(1,0) (1,1) (1,2)] [(1,3) (1,4)    *  ]
-     [(2,0) (2,1) (2,2)] [(2,3) (2,4)    *  ]
-
-     Block (0,1)         Block (1,1)
-     [(3,0) (3,1) (3,2)] [(3,3) (3,4)    *  ]
-     [(4,0) (4,1) (4,2)] [(4,3) (4,4)    *  ]
-     [  *     *     *  ] [  *     *      *  ]
-     ```
-
-     (* = 스레드는 존재하지만 텐서 경계 밖)
-
-2. **LayoutTensor의 장점**
-   - 자연스러운 2D 인덱싱: 수동 오프셋 계산 대신 `tensor[row, col]` 사용
-   - 자동 메모리 레이아웃 최적화
-   - 접근 패턴 예시:
-
-     ```txt
-     원시 메모리:          LayoutTensor:
-     row * size + col    tensor[row, col]
-     (2,1) -> 11        (2,1) -> 같은 원소
-     ```
-
-3. **경계 검사**
-   - 가드 `row < size and col < size`가 처리하는 상황:
-     - 부분 블록에서 범위를 벗어나는 스레드
-     - 텐서 경계의 엣지 케이스
-     - 메모리 레이아웃은 LayoutTensor가 자동으로 처리
-     - 25개 원소를 36개 스레드로 처리 (3×3 블록의 2×2 그리드)
-
-4. **블록 조율**
-   - 각 3×3 블록이 5×5 텐서의 일부분을 담당
-   - LayoutTensor가 처리하는 부분:
-     - 메모리 레이아웃 최적화
-     - 효율적인 접근 패턴
-     - 블록 경계 간 조율
-     - 캐시 친화적 데이터 접근
-
-이 패턴은 LayoutTensor가 최적의 메모리 접근 패턴과 스레드 조율을 유지하면서도 2D 블록 처리를 얼마나 간소화하는지 보여줍니다.
-</div>
-</details>
diff --git a/book/i18n/ko/src/puzzle_07/puzzle_07.md b/book/i18n/ko/src/puzzle_07/puzzle_07.md
index 882da4d3..3cb2b593 100644
--- a/book/i18n/ko/src/puzzle_07/puzzle_07.md
+++ b/book/i18n/ko/src/puzzle_07/puzzle_07.md
@@ -4,7 +4,7 @@
 
 ## 개요
 
-행렬 `a`의 각 위치에 10을 더해 `output`에 저장하는 커널을 구현해 보세요.
+2D TileTensor `a`의 각 위치에 10을 더해 2D TileTensor `output`에 저장하는 커널을 구현해 보세요.
 
 **참고:** _블록당 스레드 수가 `a`의 행과 열 크기보다 모두 작습니다._
 
@@ -13,10 +13,13 @@
 
 ## 핵심 개념
 
-- 블록 기반 처리
-- 그리드와 블록의 조율
-- 여러 블록에 걸친 인덱싱
-- 메모리 접근 패턴
+이 퍼즐에서 배울 내용:
+
+- 여러 블록과 함께 `TileTensor` 사용하기
+- 2D 블록 구성으로 큰 행렬 처리하기
+- 블록 인덱싱과 `TileTensor` 접근 결합하기
+
+핵심은 `TileTensor`가 2D 인덱싱을 단순화해 주지만, 큰 행렬에서는 여전히 블록 간 조율이 필요하다는 점입니다.
 
 > 🔑 **2D 스레드 인덱싱 방식**
 >
@@ -47,14 +50,143 @@
 > - 블록 간 겹침 없음
 > - 효율적인 메모리 접근 패턴
 
-## 구현 방식
+## 구성
+
+- **행렬 크기**: \\(5 \times 5\\) 원소
+- **레이아웃 처리**: `TileTensor`가 행 우선 구성 관리
+- **블록 조율**: 여러 블록으로 전체 행렬 커버
+- **2D 인덱싱**: 경계 검사와 함께 자연스러운 \\((i,j)\\) 접근
+- **총 스레드 수**: \\(25\\)개 원소에 대해 \\(36\\)개
+- **스레드 매핑**: 각 스레드가 행렬 원소 하나씩 처리
+
+## 완성할 코드
+
+```mojo
+{{#include ../../../../../problems/p07/p07.mojo:add_10_blocks_2d}}
+```
+
+<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p07/p07.mojo" class="filename">전체 코드 보기: problems/p07/p07.mojo</a>
+
+<details>
+<summary><strong>팁</strong></summary>
+
+<div class="solution-tips">
+
+1. 전역 인덱스 계산: `row = block_dim.y * block_idx.y + thread_idx.y`, `col = block_dim.x * block_idx.x + thread_idx.x`
+2. 가드 추가: `if row < size and col < size`
+3. 가드 내부: 2D TileTensor에 10을 더하는 방법을 생각해 보세요
+
+</div>
+</details>
+
+## 코드 실행
+
+솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
+
+<div class="code-tabs" data-tab-group="package-manager">
+  <div class="tab-buttons">
+    <button class="tab-button">pixi NVIDIA (default)</button>
+    <button class="tab-button">pixi AMD</button>
+    <button class="tab-button">pixi Apple</button>
+    <button class="tab-button">uv</button>
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run p07
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e amd p07
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e apple p07
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+uv run poe p07
+```
+
+  </div>
+</div>
+
+퍼즐을 아직 풀지 않았다면 출력이 다음과 같이 나타납니다:
+
+```txt
+out: HostBuffer([0.0, 0.0, 0.0, ... , 0.0])
+expected: HostBuffer([10.0, 11.0, 12.0, ... , 34.0])
+```
+
+## 솔루션
+
+<details class="solution-details">
+<summary></summary>
+
+```mojo
+{{#include ../../../../../solutions/p07/p07.mojo:add_10_blocks_2d_solution}}
+```
+
+<div class="solution-explanation">
+
+TileTensor가 2D 블록 기반 처리를 얼마나 간소화하는지 보여주는 솔루션입니다:
+
+1. **2D 스레드 인덱싱**
+   - 전역 행(row): `block_dim.y * block_idx.y + thread_idx.y`
+   - 전역 열(col): `block_dim.x * block_idx.x + thread_idx.x`
+   - 스레드 그리드를 텐서 원소에 매핑:
+
+     ```txt
+     3×3 블록으로 구성된 5×5 텐서:
+
+     Block (0,0)         Block (1,0)
+     [(0,0) (0,1) (0,2)] [(0,3) (0,4)    *  ]
+     [(1,0) (1,1) (1,2)] [(1,3) (1,4)    *  ]
+     [(2,0) (2,1) (2,2)] [(2,3) (2,4)    *  ]
+
+     Block (0,1)         Block (1,1)
+     [(3,0) (3,1) (3,2)] [(3,3) (3,4)    *  ]
+     [(4,0) (4,1) (4,2)] [(4,3) (4,4)    *  ]
+     [  *     *     *  ] [  *     *      *  ]
+     ```
+
+     (* = 스레드는 존재하지만 텐서 경계 밖)
 
-### [🔰 원시 메모리 방식](./raw.md)
+2. **TileTensor의 장점**
+   - 자연스러운 2D 인덱싱: 수동 오프셋 계산 대신 `tensor[row, col]` 사용
+   - 자동 메모리 레이아웃 최적화
+   - 접근 패턴 예시:
 
-수동 인덱싱으로 여러 블록에 걸친 연산을 처리하는 방법을 알아봅니다.
+     ```txt
+     원시 메모리:          TileTensor:
+     row * size + col    tensor[row, col]
+     (2,1) -> 11        (2,1) -> 같은 원소
+     ```
 
-### [📐 LayoutTensor 버전](./layout_tensor.md)
+3. **경계 검사**
+   - 가드 `row < size and col < size`가 처리하는 상황:
+     - 부분 블록에서 범위를 벗어나는 스레드
+     - 텐서 경계의 엣지 케이스
+     - 메모리 레이아웃은 TileTensor가 자동으로 처리
+     - 25개 원소를 36개 스레드로 처리 (3×3 블록의 2×2 그리드)
 
-LayoutTensor 기능을 활용해 블록 기반 처리를 깔끔하게 구현합니다.
+4. **블록 조율**
+   - 각 3×3 블록이 5×5 텐서의 일부분을 담당
+   - TileTensor가 처리하는 부분:
+     - 메모리 레이아웃 최적화
+     - 효율적인 접근 패턴
+     - 블록 경계 간 조율
+     - 캐시 친화적 데이터 접근
 
-💡 **참고**: LayoutTensor가 블록 간 조율과 메모리 접근 패턴을 얼마나 단순화하는지 확인해 보세요.
+이 패턴은 TileTensor가 최적의 메모리 접근 패턴과 스레드 조율을 유지하면서도 2D 블록 처리를 얼마나 간소화하는지 보여줍니다.
+</div>
+</details>
diff --git a/book/i18n/ko/src/puzzle_07/raw.md b/book/i18n/ko/src/puzzle_07/raw.md
deleted file mode 100644
index 33ba22fc..00000000
--- a/book/i18n/ko/src/puzzle_07/raw.md
+++ /dev/null
@@ -1,157 +0,0 @@
-<!-- i18n-source-commit: db06539cab77774402e8a4bf955018fd853803d9 -->
-
-## 개요
-
-행렬 `a`의 각 위치에 10을 더해 `output`에 저장하는 커널을 구현해 보세요.
-
-**참고:** _블록당 스레드 수가 `a`의 행과 열 크기보다 모두 작습니다._
-
-## 핵심 개념
-
-이 퍼즐에서 배울 내용:
-
-- 2D 블록과 스레드 배치 다루기
-- 블록 크기보다 큰 행렬 데이터 처리하기
-- 2D 인덱스와 선형 메모리 접근 간 변환하기
-
-핵심은 하나의 블록보다 큰 2D 행렬을 처리할 때 여러 블록의 스레드들이 어떻게 함께 작동하는지 이해하는 것입니다.
-
-## 구성
-
-- **행렬 크기**: \\(5 \times 5\\) 원소
-- **2D 블록**: 각 블록이 \\(3 \times 3\\) 영역 처리
-- **그리드 레이아웃**: \\(2 \times 2\\) 그리드에 블록 배치
-- **총 스레드 수**: \\(25\\)개 원소에 대해 \\(36\\)개
-- **메모리 패턴**: 2D 데이터를 행 우선으로 저장
-- **커버리지**: 모든 행렬 원소가 빠짐없이 처리되도록 보장
-
-## 완성할 코드
-
-```mojo
-{{#include ../../../../../problems/p07/p07.mojo:add_10_blocks_2d}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p07/p07.mojo" class="filename">전체 코드 보기: problems/p07/p07.mojo</a>
-
-<details>
-<summary><strong>팁</strong></summary>
-
-<div class="solution-tips">
-
-1. 전역 인덱스 계산: `row = block_dim.y * block_idx.y + thread_idx.y`, `col = block_dim.x * block_idx.x + thread_idx.x`
-2. 가드 추가: `if row < size and col < size`
-3. 가드 내부: 행 우선 방식으로 10을 더하는 방법을 생각해 보세요!
-
-</div>
-</details>
-
-## 코드 실행
-
-솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p07
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p07
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p07
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p07
-```
-
-  </div>
-</div>
-
-퍼즐을 아직 풀지 않았다면 출력이 다음과 같이 나타납니다:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, ... , 0.0])
-expected: HostBuffer([10.0, 11.0, 12.0, ... , 34.0])
-```
-
-## 솔루션
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../../../solutions/p07/p07.mojo:add_10_blocks_2d_solution}}
-```
-
-<div class="solution-explanation">
-
-원시 메모리로 2D 블록 기반 처리를 구현할 때의 핵심 개념을 보여주는 솔루션입니다:
-
-1. **2D 스레드 인덱싱**
-   - 전역 행(row): `block_dim.y * block_idx.y + thread_idx.y`
-   - 전역 열(col): `block_dim.x * block_idx.x + thread_idx.x`
-   - 스레드 그리드를 행렬 원소에 매핑:
-
-     ```txt
-     3×3 블록으로 구성된 5×5 행렬:
-
-     Block (0,0)         Block (1,0)
-     [(0,0) (0,1) (0,2)] [(0,3) (0,4)    *  ]
-     [(1,0) (1,1) (1,2)] [(1,3) (1,4)    *  ]
-     [(2,0) (2,1) (2,2)] [(2,3) (2,4)    *  ]
-
-     Block (0,1)         Block (1,1)
-     [(3,0) (3,1) (3,2)] [(3,3) (3,4)    *  ]
-     [(4,0) (4,1) (4,2)] [(4,3) (4,4)    *  ]
-     [  *     *     *  ] [  *     *      *  ]
-     ```
-
-     (* = 스레드는 존재하지만 행렬 경계 밖)
-
-2. **메모리 레이아웃**
-   - 행 우선 선형 메모리: `index = row * size + col`
-   - 5×5 행렬 예시:
-
-     ```txt
-     2D 인덱스:       선형 메모리:
-     (2,1) -> 11   [00 01 02 03 04]
-                   [05 06 07 08 09]
-                   [10 11 12 13 14]
-                   [15 16 17 18 19]
-                   [20 21 22 23 24]
-     ```
-
-3. **경계 검사**
-   - 가드 `row < size and col < size`가 처리하는 경우:
-     - 부분 블록에서 남는 스레드
-     - 행렬 경계의 엣지 케이스
-     - 3×3 스레드 블록의 2×2 그리드 = 25개 원소에 36개 스레드
-
-4. **블록 조율**
-   - 각 3×3 블록이 5×5 행렬의 일부분을 담당
-   - 2×2 블록 그리드로 전체를 빠짐없이 커버
-   - 경계 검사로 겹치는 스레드 처리
-   - 블록들이 함께 효율적으로 병렬 처리
-
-이 패턴은 블록 크기보다 큰 2D 데이터를 다룰 때 효율적인 메모리 접근과 스레드 조율을 어떻게 유지하는지 보여줍니다.
-</div>
-</details>
diff --git a/book/i18n/ko/src/puzzle_08/layout_tensor.md b/book/i18n/ko/src/puzzle_08/layout_tensor.md
deleted file mode 100644
index c05cdb4a..00000000
--- a/book/i18n/ko/src/puzzle_08/layout_tensor.md
+++ /dev/null
@@ -1,193 +0,0 @@
-<!-- i18n-source-commit: 477e5a0d3eed091b3dde0812977773f7dc97730a -->
-
-## 개요
-
-1D LayoutTensor `a`의 각 위치에 10을 더해 1D LayoutTensor `output`에 저장하는 커널을 구현해 보세요.
-
-**참고:** _블록당 스레드 수가 `a`의 크기보다 작습니다._
-
-## 핵심 개념
-
-이 퍼즐에서 배울 내용:
-
-- address_space를 활용한 LayoutTensor의 공유 메모리 기능
-- 공유 메모리를 사용할 때의 스레드 동기화
-- LayoutTensor로 블록 로컬 데이터 관리하기
-
-핵심은 LayoutTensor가 블록 로컬 저장소의 성능은 그대로 유지하면서 공유 메모리 관리를 얼마나 간소화하는지 이해하는 것입니다.
-
-## 구성
-
-- 배열 크기: `SIZE = 8` 원소
-- 블록당 스레드 수: `TPB = 4`
-- 블록 수: 2
-- 공유 메모리: 블록당 `TPB`개 원소
-
-## 원시 메모리 방식과의 주요 차이점
-
-1. **메모리 할당**: [stack_allocation](https://docs.modular.com/mojo/std/memory/memory/stack_allocation/) 대신 address_space를 사용한 [LayoutTensor](https://docs.modular.com/mojo/stdlib/layout/layout_tensor/LayoutTensor) 사용
-
-   ```mojo
-   # 원시 메모리 방식
-   shared = stack_allocation[TPB, Scalar[dtype]]()
-
-   # LayoutTensor 방식
-   shared = LayoutTensor[dtype, Layout.row_major(TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
-   ```
-
-2. **메모리 접근**: 동일한 문법
-
-   ```mojo
-   # 원시 메모리 방식
-   shared[local_i] = a[global_i]
-
-   # LayoutTensor 방식
-   shared[local_i] = a[global_i]
-   ```
-
-3. **안전 기능**:
-
-   - 타입 안전성
-   - 레이아웃 관리
-   - 메모리 정렬 처리
-
-> **참고**: LayoutTensor가 메모리 레이아웃을 처리하지만, 공유 메모리 사용 시 `barrier()`를 통한 스레드 동기화는 여전히 직접 관리해야 합니다.
-
-**학습 참고**: 이 퍼즐에서는 각 스레드가 자신의 공유 메모리 위치에만 접근하므로 `barrier()`가 엄밀히 필요하지 않습니다. 하지만 더 복잡한 상황에서 필요한 올바른 동기화 패턴을 익히기 위해 포함되어 있습니다.
-
-## 완성할 코드
-
-```mojo
-{{#include ../../../../../problems/p08/p08_layout_tensor.mojo:add_10_shared_layout_tensor}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p08/p08_layout_tensor.mojo" class="filename">전체 코드 보기: problems/p08/p08_layout_tensor.mojo</a>
-
-<details>
-<summary><strong>팁</strong></summary>
-
-<div class="solution-tips">
-
-1. address_space 파라미터로 LayoutTensor 공유 메모리 생성
-2. 자연스러운 인덱싱으로 데이터 로드: `shared[local_i] = a[global_i]`
-3. `barrier()`로 동기화 (학습용 - 여기서는 엄밀히 필요하지 않음)
-4. 공유 메모리 인덱스로 데이터 처리
-5. 범위를 벗어난 접근을 방지하는 가드
-
-</div>
-</details>
-
-## 코드 실행
-
-솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p08_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p08_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p08_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p08_layout_tensor
-```
-
-  </div>
-</div>
-
-퍼즐을 아직 풀지 않았다면 출력이 다음과 같이 나타납니다:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
-expected: HostBuffer([11.0, 11.0, 11.0, 11.0, 11.0, 11.0, 11.0, 11.0])
-```
-
-## 솔루션
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../../../solutions/p08/p08_layout_tensor.mojo:add_10_shared_layout_tensor_solution}}
-```
-
-<div class="solution-explanation">
-
-LayoutTensor가 성능을 유지하면서 공유 메모리 사용을 얼마나 간소화하는지 보여주는 솔루션입니다:
-
-1. **LayoutTensor를 사용한 메모리 계층 구조**
-   - 전역 텐서: `a`와 `output` (느림, 모든 블록에서 보임)
-   - 공유 텐서: `shared` (빠름, 스레드 블록 로컬)
-   - 블록당 4개 스레드로 8개 원소를 처리하는 예시:
-
-     ```txt
-     전역 텐서 a: [1 1 1 1 | 1 1 1 1]  # 입력: 모두 1
-
-     Block (0):         Block (1):
-     shared[0..3]       shared[0..3]
-     [1 1 1 1]          [1 1 1 1]
-     ```
-
-2. **스레드 조율**
-   - 로드 단계 (자연스러운 인덱싱 사용):
-
-     ```txt
-     Thread 0: shared[0] = a[0]=1    Thread 2: shared[2] = a[2]=1
-     Thread 1: shared[1] = a[1]=1    Thread 3: shared[3] = a[3]=1
-     barrier()    ↓         ↓        ↓         ↓   # 모든 로드 완료 대기
-     ```
-
-   - 처리 단계: 각 스레드가 자신의 공유 텐서 값에 10을 더함
-   - 결과: `output[global_i] = shared[local_i] + 10 = 11`
-
-   **참고**: 이 경우에는 각 스레드가 자신의 공유 메모리 위치(`shared[local_i]`)에만 쓰고 읽으므로 `barrier()`가 엄밀히 필요하지 않습니다. 하지만 스레드들이 서로의 데이터에 접근하는 상황에서 필수적인 동기화 패턴을 익히기 위해 포함되어 있습니다.
-
-3. **LayoutTensor의 장점**
-   - 공유 메모리 할당:
-
-     ```txt
-     # address_space를 사용한 깔끔한 LayoutTensor API
-     shared = LayoutTensor[dtype, Layout.row_major(TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
-     ```
-
-   - 전역과 공유 메모리 모두 자연스러운 인덱싱:
-
-     ```txt
-     Block 0 출력: [11 11 11 11]
-     Block 1 출력: [11 11 11 11]
-     ```
-
-   - 내장된 레이아웃 관리와 타입 안전성
-
-4. **메모리 접근 패턴**
-   - 로드: 전역 텐서 → 공유 텐서 (최적화됨)
-   - 동기화: 원시 메모리 버전과 동일한 `barrier()` 필요
-   - 처리: 공유 메모리 값에 10 더하기
-   - 저장: 결과(11)를 전역 텐서에 쓰기
-
-이 패턴은 LayoutTensor가 공유 메모리의 성능 이점을 유지하면서 더 편리한 API와 내장 기능을 제공하는 방법을 보여줍니다.
-</div>
-</details>
diff --git a/book/i18n/ko/src/puzzle_08/puzzle_08.md b/book/i18n/ko/src/puzzle_08/puzzle_08.md
index caccb88c..0137735d 100644
--- a/book/i18n/ko/src/puzzle_08/puzzle_08.md
+++ b/book/i18n/ko/src/puzzle_08/puzzle_08.md
@@ -4,21 +4,167 @@
 
 ## 개요
 
-벡터 `a`의 각 위치에 10을 더해 벡터 `output`에 저장하는 커널을 구현해 보세요.
+1D TileTensor `a`의 각 위치에 10을 더해 1D TileTensor `output`에 저장하는 커널을 구현해 보세요.
 
 **참고:** _블록당 스레드 수가 `a`의 크기보다 작습니다._
 
 <img src="/puzzle_08/media/08.png" alt="공유 메모리 시각화" class="light-mode-img">
 <img src="/puzzle_08/media/08d.png" alt="공유 메모리 시각화" class="dark-mode-img">
 
-## 구현 방식
+## 핵심 개념
 
-### [🔰 원시 메모리 방식](./raw.md)
+이 퍼즐에서 배울 내용:
 
-공유 메모리와 동기화를 수동으로 관리하는 방법을 알아봅니다.
+- address_space를 활용한 TileTensor의 공유 메모리 기능
+- 공유 메모리를 사용할 때의 스레드 동기화
+- TileTensor로 블록 로컬 데이터 관리하기
 
-### [📐 LayoutTensor 버전](./layout_tensor.md)
+핵심은 TileTensor가 블록 로컬 저장소의 성능은 그대로 유지하면서 공유 메모리 관리를 얼마나 간소화하는지 이해하는 것입니다.
 
-LayoutTensor에 내장된 공유 메모리 관리 기능을 활용합니다.
+## 구성
 
-💡 **참고**: LayoutTensor가 성능을 유지하면서도 공유 메모리 연산을 얼마나 간소화하는지 경험해 보세요.
+- 배열 크기: `SIZE = 8` 원소
+- 블록당 스레드 수: `TPB = 4`
+- 블록 수: 2
+- 공유 메모리: 블록당 `TPB`개 원소
+
+> **경고**: 각 블록에는 해당 블록의 스레드들이 읽고 쓸 수 있는 공유 메모리의 양이 _상수_로 고정되어 있습니다. 이 값은 파이썬 리터럴 상수여야 하며 변수를 사용할 수 없습니다. 공유 메모리에 쓴 후에는 [barrier](https://docs.modular.com/mojo/std/gpu/sync/sync/barrier/)를 호출해 스레드들이 교차하지 않도록 해야 합니다.
+
+**학습 참고**: 이 퍼즐에서는 각 스레드가 자신의 공유 메모리 위치에만 접근하므로 `barrier()`가 엄밀히 필요하지 않습니다. 하지만 더 복잡한 상황에서 필요한 올바른 동기화 패턴을 익히기 위해 포함되어 있습니다.
+
+## 완성할 코드
+
+```mojo
+{{#include ../../../../../problems/p08/p08.mojo:add_10_shared}}
+```
+
+<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p08/p08.mojo" class="filename">전체 코드 보기: problems/p08/p08.mojo</a>
+
+<details>
+<summary><strong>팁</strong></summary>
+
+<div class="solution-tips">
+
+1. address_space 파라미터로 TileTensor 공유 메모리 생성
+2. 자연스러운 인덱싱으로 데이터 로드: `shared[local_i] = a[global_i]`
+3. `barrier()`로 동기화 (학습용 - 여기서는 엄밀히 필요하지 않음)
+4. 공유 메모리 인덱스로 데이터 처리
+5. 범위를 벗어난 접근을 방지하는 가드
+
+</div>
+</details>
+
+## 코드 실행
+
+솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
+
+<div class="code-tabs" data-tab-group="package-manager">
+  <div class="tab-buttons">
+    <button class="tab-button">pixi NVIDIA (default)</button>
+    <button class="tab-button">pixi AMD</button>
+    <button class="tab-button">pixi Apple</button>
+    <button class="tab-button">uv</button>
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run p08
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e amd p08
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e apple p08
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+uv run poe p08
+```
+
+  </div>
+</div>
+
+퍼즐을 아직 풀지 않았다면 출력이 다음과 같이 나타납니다:
+
+```txt
+out: HostBuffer([0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
+expected: HostBuffer([11.0, 11.0, 11.0, 11.0, 11.0, 11.0, 11.0, 11.0])
+```
+
+## 솔루션
+
+<details class="solution-details">
+<summary></summary>
+
+```mojo
+{{#include ../../../../../solutions/p08/p08.mojo:add_10_shared_solution}}
+```
+
+<div class="solution-explanation">
+
+TileTensor가 성능을 유지하면서 공유 메모리 사용을 얼마나 간소화하는지 보여주는 솔루션입니다:
+
+1. **TileTensor를 사용한 메모리 계층 구조**
+   - 전역 텐서: `a`와 `output` (느림, 모든 블록에서 보임)
+   - 공유 텐서: `shared` (빠름, 스레드 블록 로컬)
+   - 블록당 4개 스레드로 8개 원소를 처리하는 예시:
+
+     ```txt
+     전역 텐서 a: [1 1 1 1 | 1 1 1 1]  # 입력: 모두 1
+
+     Block (0):         Block (1):
+     shared[0..3]       shared[0..3]
+     [1 1 1 1]          [1 1 1 1]
+     ```
+
+2. **스레드 조율**
+   - 로드 단계 (자연스러운 인덱싱 사용):
+
+     ```txt
+     Thread 0: shared[0] = a[0]=1    Thread 2: shared[2] = a[2]=1
+     Thread 1: shared[1] = a[1]=1    Thread 3: shared[3] = a[3]=1
+     barrier()    ↓         ↓        ↓         ↓   # 모든 로드 완료 대기
+     ```
+
+   - 처리 단계: 각 스레드가 자신의 공유 텐서 값에 10을 더함
+   - 결과: `output[global_i] = shared[local_i] + 10 = 11`
+
+   **참고**: 이 경우에는 각 스레드가 자신의 공유 메모리 위치(`shared[local_i]`)에만 쓰고 읽으므로 `barrier()`가 엄밀히 필요하지 않습니다. 하지만 스레드들이 서로의 데이터에 접근하는 상황에서 필수적인 동기화 패턴을 익히기 위해 포함되어 있습니다.
+
+3. **TileTensor의 장점**
+   - 공유 메모리 할당:
+
+     ```txt
+     # address_space를 사용한 깔끔한 TileTensor API
+     shared = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB]())
+     ```
+
+   - 전역과 공유 메모리 모두 자연스러운 인덱싱:
+
+     ```txt
+     Block 0 출력: [11 11 11 11]
+     Block 1 출력: [11 11 11 11]
+     ```
+
+   - 내장된 레이아웃 관리와 타입 안전성
+
+4. **메모리 접근 패턴**
+   - 로드: 전역 텐서 → 공유 텐서 (최적화됨)
+   - 동기화: 원시 메모리 버전과 동일한 `barrier()` 필요
+   - 처리: 공유 메모리 값에 10 더하기
+   - 저장: 결과(11)를 전역 텐서에 쓰기
+
+이 패턴은 TileTensor가 공유 메모리의 성능 이점을 유지하면서 더 편리한 API와 내장 기능을 제공하는 방법을 보여줍니다.
+</div>
+</details>
diff --git a/book/i18n/ko/src/puzzle_08/raw.md b/book/i18n/ko/src/puzzle_08/raw.md
deleted file mode 100644
index 18cf77f1..00000000
--- a/book/i18n/ko/src/puzzle_08/raw.md
+++ /dev/null
@@ -1,168 +0,0 @@
-<!-- i18n-source-commit: 9ac1b899ca05c1be26f2d9ee77fe97503d00cc0f -->
-
-## 개요
-
-벡터 `a`의 각 위치에 10을 더해 `output`에 저장하는 커널을 구현해 보세요.
-
-**참고:** _블록당 스레드 수가 `a`의 크기보다 작습니다._
-
-## 핵심 개념
-
-이 퍼즐에서 배울 내용:
-
-- 스레드 블록 내에서 공유 메모리 사용하기
-- 배리어(barrier)로 스레드 동기화하기
-- 블록 로컬 데이터 저장소 관리하기
-
-핵심은 공유 메모리가 블록 내 모든 스레드가 접근할 수 있는 빠른 로컬 저장소라는 점, 그리고 이를 사용할 때 스레드 간 조율이 필요하다는 점을 이해하는 것입니다.
-
-## 구성
-
-- 배열 크기: `SIZE = 8` 원소
-- 블록당 스레드 수: `TPB = 4`
-- 블록 수: 2
-- 공유 메모리: 블록당 `TPB`개 원소
-
-참고:
-
-- **공유 메모리**: 블록 내 스레드들이 함께 사용하는 빠른 저장소
-- **스레드 동기화**: `barrier()`를 사용한 조율
-- **메모리 범위**: 공유 메모리는 블록 내에서만 보임
-- **접근 패턴**: 로컬 인덱스 vs 전역 인덱스
-
-> **주의**: 각 블록이 가질 수 있는 공유 메모리 크기는 _상수_ 로 정해져야 합니다. 이 값은 변수가 아닌 리터럴 Python 상수여야 합니다. 공유 메모리에 쓴 후에는 [barrier](https://docs.modular.com/mojo/stdlib/gpu/sync/barrier/)를 호출하여 스레드들이 서로 앞서가지 않도록 해야 합니다.
-
-**학습 참고**: 이 퍼즐에서는 각 스레드가 자신의 공유 메모리 위치에만 접근하므로 `barrier()`가 엄밀히 필요하지 않습니다. 하지만 더 복잡한 상황에서 필요한 올바른 동기화 패턴을 익히기 위해 포함되어 있습니다.
-
-## 완성할 코드
-
-```mojo
-{{#include ../../../../../problems/p08/p08.mojo:add_10_shared}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p08/p08.mojo" class="filename">전체 코드 보기: problems/p08/p08.mojo</a>
-
-<details>
-<summary><strong>팁</strong></summary>
-
-<div class="solution-tips">
-
-1. `barrier()`로 공유 메모리 로드 완료 대기 (학습용 - 여기서는 엄밀히 필요하지 않음)
-2. `local_i`로 공유 메모리 접근: `shared[local_i]`
-3. `global_i`로 출력: `output[global_i]`
-4. 가드 추가: `if global_i < size`
-
-</div>
-</details>
-
-## 코드 실행
-
-솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p08
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p08
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p08
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p08
-```
-
-  </div>
-</div>
-
-퍼즐을 아직 풀지 않았다면 출력이 다음과 같이 나타납니다:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
-expected: HostBuffer([11.0, 11.0, 11.0, 11.0, 11.0, 11.0, 11.0, 11.0])
-```
-
-## 솔루션
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../../../solutions/p08/p08.mojo:add_10_shared_solution}}
-```
-
-<div class="solution-explanation">
-
-GPU 프로그래밍에서 공유 메모리 사용의 핵심 개념을 보여주는 솔루션입니다:
-
-1. **메모리 계층 구조**
-   - 전역 메모리: `a`와 `output` 배열 (느림, 모든 블록에서 보임)
-   - 공유 메모리: `shared` 배열 (빠름, 스레드 블록 로컬)
-   - 블록당 4개 스레드로 8개 원소를 처리하는 예시:
-
-     ```txt
-     전역 배열 a: [1 1 1 1 | 1 1 1 1]  # 입력: 모두 1
-
-     Block (0):      Block (1):
-     shared[0..3]    shared[0..3]
-     [1 1 1 1]       [1 1 1 1]
-     ```
-
-2. **스레드 조율**
-   - 로드 단계:
-
-     ```txt
-     Thread 0: shared[0] = a[0]=1    Thread 2: shared[2] = a[2]=1
-     Thread 1: shared[1] = a[1]=1    Thread 3: shared[3] = a[3]=1
-     barrier()    ↓         ↓        ↓         ↓   # 모든 로드 완료 대기
-     ```
-
-   - 처리 단계: 각 스레드가 자신의 공유 메모리 값에 10을 더함
-   - 결과: `output[i] = shared[local_i] + 10 = 11`
-
-   **참고**: 이 경우에는 각 스레드가 자신의 공유 메모리 위치(`shared[local_i]`)에만 쓰고 읽으므로 `barrier()`가 엄밀히 필요하지 않습니다. 하지만 스레드들이 서로의 데이터에 접근하는 상황에서 필수적인 동기화 패턴을 익히기 위해 포함되어 있습니다.
-
-3. **인덱스 매핑**
-   - 전역 인덱스: `block_dim.x * block_idx.x + thread_idx.x`
-
-     ```txt
-     Block 0 출력: [11 11 11 11]
-     Block 1 출력: [11 11 11 11]
-     ```
-
-   - 로컬 인덱스: 공유 메모리 접근에 `thread_idx.x` 사용
-
-     ```txt
-     두 블록 모두 처리: 1 + 10 = 11
-     ```
-
-4. **메모리 접근 패턴**
-   - 로드: 전역 → 공유 (병합 읽기로 1 값들 로드)
-   - 동기화: `barrier()`로 모든 로드 완료 보장
-   - 처리: 공유 메모리 값에 10 더하기
-   - 저장: 결과(11)를 전역 메모리에 쓰기
-
-이 패턴은 블록 내 스레드 조율을 유지하면서 공유 메모리로 데이터 접근을 최적화하는 방법을 보여줍니다.
-</div>
-</details>
diff --git a/book/i18n/ko/src/puzzle_09/puzzle_09.md b/book/i18n/ko/src/puzzle_09/puzzle_09.md
index 40ade8b5..7a8610e3 100644
--- a/book/i18n/ko/src/puzzle_09/puzzle_09.md
+++ b/book/i18n/ko/src/puzzle_09/puzzle_09.md
@@ -80,7 +80,7 @@ GPU 프로그래밍의 현실이 바로 이것입니다. **수천 개의 스레
 
 **로직 버그 조사** - 결과가 틀린 프로그램 디버깅
 
-- LayoutTensor 기반의 알고리즘 오류 조사
+- TileTensor 기반의 알고리즘 오류 조사
 - 최적화로 변수가 사라졌을 때 실행 흐름 분석하기
 - 반복문 경계와 반복 횟수 분석하기
 - 틀린 결과에서 패턴 찾아내기
diff --git a/book/i18n/ko/src/puzzle_09/second_case.md b/book/i18n/ko/src/puzzle_09/second_case.md
index 75dcf48e..595a8537 100644
--- a/book/i18n/ko/src/puzzle_09/second_case.md
+++ b/book/i18n/ko/src/puzzle_09/second_case.md
@@ -11,7 +11,7 @@
 - **[첫 번째 사례](./first_case.md)**: 명확한 크래시 신호(`CUDA_ERROR_ILLEGAL_ADDRESS`)가 조사를 안내함
 - **두 번째 사례**: 크래시도 없고 에러 메시지도 없음 - 탐정처럼 파헤쳐야 하는 미묘하게 잘못된 결과만 있음
 
-이번 중급 디버깅 챌린지에서는 `LayoutTensor` 연산을 사용하는 **알고리즘 오류**를 조사합니다. 프로그램은 성공적으로 실행되지만 잘못된 출력을 내는데, 실제 개발에서 훨씬 흔하면서도 까다로운 디버깅 시나리오입니다.
+이번 중급 디버깅 챌린지에서는 `TileTensor` 연산을 사용하는 **알고리즘 오류**를 조사합니다. 프로그램은 성공적으로 실행되지만 잘못된 출력을 내는데, 실제 개발에서 훨씬 흔하면서도 까다로운 디버깅 시나리오입니다.
 
 **사전 준비**: [Mojo GPU 디버깅의 핵심](./essentials.md)과 [탐정 수사: 첫 번째 사례](./first_case.md)를 먼저 완료해서 CUDA-GDB 워크플로우와 체계적인 디버깅 기법을 익혀두세요. 아래 명령을 실행했는지 확인하세요:
 
@@ -23,7 +23,7 @@ pixi run -e nvidia setup-cuda-gdb
 
 이번 디버깅 챌린지에서 배울 내용:
 
-- **LayoutTensor 디버깅**: 구조화된 데이터 접근 패턴 조사하기
+- **TileTensor 디버깅**: 구조화된 데이터 접근 패턴 조사하기
 - **로직 버그 탐지**: 크래시하지 않는 알고리즘 오류 찾기
 - **반복문 경계 분석**: 반복 횟수 문제 이해하기
 - **결과 패턴 분석**: 출력 데이터로 근본 원인까지 거슬러 올라가기
@@ -158,14 +158,14 @@ Each position should sum its neighbors: [left + center + right]
 CUDA thread hit application kernel entry function breakpoint, p09_process_sliding_window_...
    <<<(1,1,1),(4,1,1)>>> (output=..., input=...)
     at /home/ubuntu/workspace/mojo-gpu-puzzles/problems/p09/p09.mojo:30
-30          input: LayoutTensor[mut=False, dtype, vector_layout],
+30          input: TileTensor[mut=False, dtype, vector_layout],
 ```
 
 #### Step 4: 메인 로직으로 이동
 
 ```bash
 (cuda-gdb) n
-29          output: LayoutTensor[mut=True, dtype, vector_layout],
+29          output: TileTensor[mut=True, dtype, vector_layout],
 (cuda-gdb) n
 32          thread_id = thread_idx.x
 (cuda-gdb) n
@@ -193,7 +193,7 @@ Cannot access memory at address 0x0
 Attempt to take address of value not located in memory.
 ```
 
-**❌ 문제**: LayoutTensor 직접 인덱싱이 작동하지 않습니다.
+**❌ 문제**: TileTensor 직접 인덱싱이 작동하지 않습니다.
 
 ```bash
 (cuda-gdb) p a.ptr[0]
@@ -202,7 +202,7 @@ $2 = {0}
 $3 = {{0}, {1}, {2}, {3}}
 ```
 
-**🎯 돌파구**: `a.ptr[0]@4`로 전체 입력 배열을 볼 수 있습니다! 이것이 LayoutTensor 데이터를 검사하는 방법입니다.
+**🎯 돌파구**: `a.ptr[0]@4`로 전체 입력 배열을 볼 수 있습니다! 이것이 TileTensor 데이터를 검사하는 방법입니다.
 
 ### 3단계: 핵심 반복문 조사
 
@@ -356,9 +356,9 @@ for offset in range(ITER):           # ← 2번만 반복: [0, 1]
 - **호스트 출력 패턴**이 중요한 디버깅 단서를 제공합니다
 - **소스 코드 추론**이 제한된 디버거 기능을 보완합니다
 
-**LayoutTensor 디버깅**:
+**TileTensor 디버깅**:
 
-- LayoutTensor 추상화를 사용해도 근본적인 알고리즘 버그는 그대로 드러납니다
+- TileTensor 추상화를 사용해도 근본적인 알고리즘 버그는 그대로 드러납니다
 - 텐서 내용을 검사하려 하기보다 알고리즘 로직에 집중하세요
 - 체계적인 추론으로 각 스레드가 접근해야 하는 것과 실제로 접근하는 것을 추적하세요
 
diff --git a/book/i18n/ko/src/puzzle_09/third_case.md b/book/i18n/ko/src/puzzle_09/third_case.md
index 1c12a643..d6b8b02e 100644
--- a/book/i18n/ko/src/puzzle_09/third_case.md
+++ b/book/i18n/ko/src/puzzle_09/third_case.md
@@ -12,7 +12,7 @@
 - **[두 번째 사례](./second_case.md)**: 잘못된 결과 출력 → 패턴 분석 → 로직 버그 발견
 - **세 번째 사례**: 프로그램 무한 정지 → 스레드 상태 조사 → 조율 버그 발견
 
-이 고급 디버깅 챌린지에서는 공유 메모리, LayoutTensor 연산, 배리어 동기화가 얽힌 **스레드 조율 실패**를 조사하는 방법을 배웁니다 - 이전 사례들에서 익힌 체계적인 조사 기술을 총동원합니다.
+이 고급 디버깅 챌린지에서는 공유 메모리, TileTensor 연산, 배리어 동기화가 얽힌 **스레드 조율 실패**를 조사하는 방법을 배웁니다 - 이전 사례들에서 익힌 체계적인 조사 기술을 총동원합니다.
 
 **사전 준비**: [Mojo GPU 디버깅의 핵심](./essentials.md), [탐정 수사: 첫 번째 사례](./first_case.md), [탐정 수사: 두 번째 사례](./second_case.md)를 먼저 완료해서 CUDA-GDB 워크플로우, 변수 검사의 한계, 체계적인 디버깅 접근법을 이해하세요. 아래 설정 명령을 실행했는지 확인하세요:
 
@@ -25,7 +25,7 @@ pixi run -e nvidia setup-cuda-gdb
 이번 디버깅 챌린지에서 배울 내용:
 
 - **배리어 교착 상태 탐지**: 스레드들이 동기화 지점에서 영원히 기다리게 되는 상황 식별하기
-- **공유 메모리 조율**: LayoutTensor를 사용한 스레드 협력 패턴 이해하기
+- **공유 메모리 조율**: TileTensor를 사용한 스레드 협력 패턴 이해하기
 - **조건부 실행 분석**: 일부 스레드가 다른 코드 경로를 탈 때 디버깅하기
 - **스레드 조율 디버깅**: CUDA-GDB로 다중 스레드 동기화 실패 분석하기
 
@@ -155,7 +155,7 @@ Waiting for GPU computation to complete...
 CUDA thread hit application kernel entry function breakpoint, p09_collaborative_filter_Orig6A6AcB6A6A_1882ca334fc2d34b2b9c4fa338df6c07<<<(1,1,1),(4,1,1)>>> (
     output=..., a=...)
     at /home/ubuntu/workspace/mojo-gpu-puzzles/problems/p09/p09.mojo:56
-56          a: LayoutTensor[mut=False, dtype, vector_layout],
+56          a: TileTensor[mut=False, dtype, vector_layout],
 ```
 
 **🔍 주요 관찰**:
@@ -169,7 +169,7 @@ CUDA thread hit application kernel entry function breakpoint, p09_collaborative_
 
 ```bash
 (cuda-gdb) n
-55          output: LayoutTensor[mut=True, dtype, vector_layout],
+55          output: TileTensor[mut=True, dtype, vector_layout],
 (cuda-gdb) n
 58          thread_id = thread_idx.x
 (cuda-gdb) n
@@ -311,13 +311,13 @@ if thread_id < SIZE - 1:    # 모든 스레드가 진입하지 않음
 
 ```mojo
 def collaborative_filter(
-    output: LayoutTensor[mut=True, dtype, vector_layout],
-    a: LayoutTensor[mut=False, dtype, vector_layout],
+    output: TileTensor[mut=True, dtype, vector_layout],
+    a: TileTensor[mut=False, dtype, vector_layout],
 ):
     thread_id = thread_idx.x
-    shared_workspace = LayoutTensor[
+    shared_workspace = TileTensor[
         dtype,
-        Layout.row_major(SIZE-1),
+        row_major[SIZE-1](),
         MutAnyOrigin,
         address_space = AddressSpace.SHARED,
     ].stack_allocation()
@@ -364,7 +364,7 @@ def collaborative_filter(
 - **배리어 규칙**: 블록의 **모든** 스레드가 **같은** 배리어에 도달해야 함
 - **조건부 실행의 함정**: 어떤 if문이든 스레드 분기를 일으킬 수 있음
 - **공유 메모리 조율**: 올바른 동기화를 위해 배리어 배치에 주의 필요
-- **LayoutTensor가 교착 상태를 막아주지 않음**: 고수준 추상화라도 올바른 동기화는 여전히 필요
+- **TileTensor가 교착 상태를 막아주지 않음**: 고수준 추상화라도 올바른 동기화는 여전히 필요
 
 **💡 핵심 통찰**: 배리어 교착 상태는 GPU 버그 중 디버깅하기 가장 어려운 유형에 속합니다:
 
diff --git a/book/i18n/ko/src/puzzle_10/memcheck.md b/book/i18n/ko/src/puzzle_10/memcheck.md
index c708f244..2127623a 100644
--- a/book/i18n/ko/src/puzzle_10/memcheck.md
+++ b/book/i18n/ko/src/puzzle_10/memcheck.md
@@ -8,13 +8,13 @@
 
 **핵심 통찰**: GPU 프로그램은 불법적인 메모리 접근을 수행하면서도 동시에 "올바른" 결과를 만들어낼 수 있습니다.
 
-**선행 학습**: [Puzzle 4 LayoutTensor](../puzzle_04/introduction_layout_tensor.md)와 기본적인 GPU 메모리 개념에 대한 이해가 필요합니다.
+**선행 학습**: [Puzzle 4 TileTensor](../puzzle_04/introduction_tile_tensor.md)와 기본적인 GPU 메모리 개념에 대한 이해가 필요합니다.
 
 ## 조용한 메모리 버그의 발견
 
 ### 테스트는 통과했지만, 코드가 정말 올바른 걸까?
 
-얼핏 무해해 보이고 완벽하게 동작하는 듯한 프로그램으로 시작해 봅시다 (가드가 없는 [Puzzle 04](../puzzle_04/layout_tensor.md)입니다):
+얼핏 무해해 보이고 완벽하게 동작하는 듯한 프로그램으로 시작해 봅시다 (가드가 없는 [Puzzle 04](../puzzle_04/tile_tensor.md)입니다):
 
 ```mojo
 {{#include ../../../../../problems/p10/p10.mojo:add_10_2d_no_guard}}
@@ -163,10 +163,10 @@ Running memory bug example (bounds checking issue)...
 
 ### 해결책
 
-[Puzzle 04](../puzzle_04/layout_tensor.md)에서 본 것처럼, 다음과 같이 경계 검사를 해야 합니다:
+[Puzzle 04](../puzzle_04/tile_tensor.md)에서 본 것처럼, 다음과 같이 경계 검사를 해야 합니다:
 
 ```mojo
-{{#include ../../../../../solutions/p04/p04_layout_tensor.mojo:add_10_2d_layout_tensor_solution}}
+{{#include ../../../../../solutions/p04/p04_tile_tensor.mojo:add_10_2d_tile_tensor_solution}}
 ```
 
 해결책은 간단합니다: **메모리에 접근하기 전에 항상 스레드 인덱스를 데이터 차원에 대해 검증**하세요.
diff --git a/book/i18n/ko/src/puzzle_10/puzzle_10.md b/book/i18n/ko/src/puzzle_10/puzzle_10.md
index dd72314c..273c2bf6 100644
--- a/book/i18n/ko/src/puzzle_10/puzzle_10.md
+++ b/book/i18n/ko/src/puzzle_10/puzzle_10.md
@@ -125,7 +125,7 @@ GPU 검사를 하려면 **병렬 프로그램 탐정**이 되어야 합니다. 
 - Puzzle 1-8에서 다룬 GPU 프로그래밍 개념 (메모리 관리, 스레드 조율, 배리어)
 - **[호환 NVIDIA GPU 하드웨어](https://docs.modular.com/max/faq#gpu-requirements)**
 - `compute-sanitizer` 접근을 위한 `pixi` 패키지 매니저 환경 설정
-- **선행 퍼즐**: [Puzzle 4](../puzzle_04/introduction_layout_tensor.md)와 [Puzzle 8](../puzzle_08/layout_tensor.md) 숙지 권장
+- **선행 퍼즐**: [Puzzle 4](../puzzle_04/introduction_tile_tensor.md)와 [Puzzle 8](../puzzle_08/tile_tensor.md) 숙지 권장
 
 **목표**:
 
diff --git a/book/i18n/ko/src/puzzle_11/layout_tensor.md b/book/i18n/ko/src/puzzle_11/layout_tensor.md
deleted file mode 100644
index 188752cb..00000000
--- a/book/i18n/ko/src/puzzle_11/layout_tensor.md
+++ /dev/null
@@ -1,186 +0,0 @@
-<!-- i18n-source-commit: 51143596e241ae5954474ecb3133b1d7b147f6fc -->
-
-## 개요
-
-1D LayoutTensor `a`에서 각 위치의 직전 3개 값의 합을 계산하여 1D LayoutTensor `output`에 저장하는 커널을 구현하세요.
-
-**참고:** _각 위치마다 스레드 1개가 있습니다. 스레드당 전역 읽기 1회, 전역 쓰기 1회만 필요합니다._
-
-## 핵심 개념
-
-이 퍼즐에서 배울 내용:
-
-- LayoutTensor로 슬라이딩 윈도우 연산 구현하기
-- [Puzzle 8](../puzzle_08/layout_tensor.md)에서 다룬 LayoutTensor 주소 공간(address_space)으로 공유 메모리 관리하기
-- 효율적인 이웃 접근 패턴
-- 경계 조건 처리
-
-핵심은 LayoutTensor가 효율적인 윈도우 기반 연산은 유지하면서도 공유 메모리 관리를 간소화하는 방법입니다.
-
-## 구성
-
-- 배열 크기: `SIZE = 8`
-- 블록당 스레드 수: `TPB = 8`
-- 윈도우 크기: 3
-- 공유 메모리: `TPB`개
-
-참고:
-
-- **LayoutTensor 할당**: `LayoutTensor[dtype, Layout.row_major(TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()` 사용
-- **윈도우 접근**: 3개짜리 윈도우에 자연스러운 인덱싱
-- **경계 처리**: 처음 두 위치는 특수 케이스
-- **메모리 패턴**: 스레드당 공유 메모리 로드 1회
-
-## 완성할 코드
-
-```mojo
-{{#include ../../../../../problems/p11/p11_layout_tensor.mojo:pooling_layout_tensor}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p11/p11_layout_tensor.mojo" class="filename">전체 파일 보기: problems/p11/p11_layout_tensor.mojo</a>
-
-<details>
-<summary><strong>팁</strong></summary>
-
-<div class="solution-tips">
-
-1. LayoutTensor와 주소 공간(address_space)으로 공유 메모리 생성
-2. 자연스러운 인덱싱으로 데이터 로드: `shared[local_i] = a[global_i]`
-3. 처음 두 위치를 특수 케이스로 처리
-4. 윈도우 연산에 공유 메모리 활용
-5. 경계 초과 접근에 가드 추가
-
-</div>
-</details>
-
-## 코드 실행
-
-솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p11_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p11_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p11_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p11_layout_tensor
-```
-
-  </div>
-</div>
-
-퍼즐을 아직 풀지 않았다면 출력은 다음과 같습니다:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
-expected: HostBuffer([0.0, 1.0, 3.0, 6.0, 9.0, 12.0, 15.0, 18.0])
-```
-
-## 솔루션
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../../../solutions/p11/p11_layout_tensor.mojo:pooling_layout_tensor_solution}}
-```
-
-<div class="solution-explanation">
-
-LayoutTensor를 활용한 슬라이딩 윈도우 합계 구현입니다. 주요 단계는 다음과 같습니다:
-
-1. **공유 메모리 설정**
-   - LayoutTensor가 주소 공간(address_space)으로 블록 로컬 저장소를 생성:
-
-     ```txt
-     shared = LayoutTensor[dtype, Layout.row_major(TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
-     ```
-
-   - 각 스레드가 하나씩 로드:
-
-     ```txt
-     Input array:  [0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0]
-     Block shared: [0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0]
-     ```
-
-   - `barrier()`로 모든 데이터 로드 완료를 보장
-
-2. **경계 케이스**
-   - 위치 0: 하나만
-
-     ```txt
-     output[0] = shared[0] = 0.0
-     ```
-
-   - 위치 1: 처음 두 값의 합
-
-     ```txt
-     output[1] = shared[0] + shared[1] = 0.0 + 1.0 = 1.0
-     ```
-
-3. **메인 윈도우 연산**
-   - 위치 2 이후:
-
-     ```txt
-     Position 2: shared[0] + shared[1] + shared[2] = 0.0 + 1.0 + 2.0 = 3.0
-     Position 3: shared[1] + shared[2] + shared[3] = 1.0 + 2.0 + 3.0 = 6.0
-     Position 4: shared[2] + shared[3] + shared[4] = 2.0 + 3.0 + 4.0 = 9.0
-     ...
-     ```
-
-   - LayoutTensor의 자연스러운 인덱싱:
-
-     ```txt
-     # 3개짜리 슬라이딩 윈도우
-     window_sum = shared[i-2] + shared[i-1] + shared[i]
-     ```
-
-4. **메모리 접근 패턴**
-   - 스레드마다 공유 텐서로 전역 읽기 1회
-   - 공유 메모리를 통한 효율적인 이웃 접근
-   - LayoutTensor의 장점:
-     - 자동 경계 검사
-     - 자연스러운 윈도우 인덱싱
-     - 레이아웃을 인식하는 메모리 접근
-     - 전 과정에 걸친 타입 안전성
-
-공유 메모리의 성능과 LayoutTensor의 안전성 및 편의성을 결합한 방식입니다:
-
-- 전역 메모리 접근 최소화
-- 윈도우 연산 간소화
-- 깔끔한 경계 처리
-- 병합 접근 패턴 유지
-
-최종 출력은 누적 윈도우 합계입니다:
-
-```txt
-[0.0, 1.0, 3.0, 6.0, 9.0, 12.0, 15.0, 18.0]
-```
-
-</div>
-</details>
diff --git a/book/i18n/ko/src/puzzle_11/puzzle_11.md b/book/i18n/ko/src/puzzle_11/puzzle_11.md
index 10904fe5..80e8540e 100644
--- a/book/i18n/ko/src/puzzle_11/puzzle_11.md
+++ b/book/i18n/ko/src/puzzle_11/puzzle_11.md
@@ -4,21 +4,188 @@
 
 ## 개요
 
-벡터 `a`에서 각 위치의 직전 3개 값의 합을 계산하여 벡터 `output`에 저장하는 커널을 구현하세요.
+1D TileTensor `a`에서 각 위치의 직전 3개 값의 합을 계산하여 1D TileTensor `output`에 저장하는 커널을 구현하세요.
 
 **참고:** _각 위치마다 스레드 1개가 있습니다. 스레드당 전역 읽기 1회, 전역 쓰기 1회만 필요합니다._
 
 <img src="/puzzle_11/media/11-w.png" alt="Pooling 시각화" class="light-mode-img">
 <img src="/puzzle_11/media/11-b.png" alt="Pooling 시각화" class="dark-mode-img">
 
-## 구현 방식
+## 핵심 개념
 
-### [🔰 원시 메모리 방식](./raw.md)
+이 퍼즐에서 배울 내용:
 
-슬라이딩 윈도우 연산을 수동 메모리 관리와 동기화로 직접 구현하는 방법을 알아봅니다.
+- TileTensor로 슬라이딩 윈도우 연산 구현하기
+- [Puzzle 8](../puzzle_08/puzzle_08.md)에서 다룬 TileTensor 주소 공간(address_space)으로 공유 메모리 관리하기
+- 효율적인 이웃 접근 패턴
+- 경계 조건 처리
 
-### [📐 LayoutTensor 버전](./layout_tensor.md)
+핵심은 TileTensor가 효율적인 윈도우 기반 연산은 유지하면서도 공유 메모리 관리를 간소화하는 방법입니다.
 
-LayoutTensor의 기능을 활용해 효율적인 윈도우 기반 연산과 공유 메모리 관리를 구현합니다.
+## 구성
 
-💡 **참고**: LayoutTensor로 슬라이딩 윈도우 연산이 얼마나 간결해지는지 확인해 보세요. 효율적인 메모리 접근 패턴도 그대로 유지됩니다.
+- 배열 크기: `SIZE = 8`
+- 블록당 스레드 수: `TPB = 8`
+- 윈도우 크기: 3
+- 공유 메모리: `TPB`개
+
+참고:
+
+- **TileTensor 할당**: `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB]())` 사용
+- **윈도우 접근**: 3개짜리 윈도우에 자연스러운 인덱싱
+- **경계 처리**: 처음 두 위치는 특수 케이스
+- **메모리 패턴**: 스레드당 공유 메모리 로드 1회
+
+## 완성할 코드
+
+```mojo
+{{#include ../../../../../problems/p11/p11.mojo:pooling}}
+```
+
+<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p11/p11.mojo" class="filename">전체 파일 보기: problems/p11/p11.mojo</a>
+
+<details>
+<summary><strong>팁</strong></summary>
+
+<div class="solution-tips">
+
+1. TileTensor와 주소 공간(address_space)으로 공유 메모리 생성
+2. 자연스러운 인덱싱으로 데이터 로드: `shared[local_i] = a[global_i]`
+3. 처음 두 위치를 특수 케이스로 처리
+4. 윈도우 연산에 공유 메모리 활용
+5. 경계 초과 접근에 가드 추가
+
+</div>
+</details>
+
+## 코드 실행
+
+솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
+
+<div class="code-tabs" data-tab-group="package-manager">
+  <div class="tab-buttons">
+    <button class="tab-button">pixi NVIDIA (default)</button>
+    <button class="tab-button">pixi AMD</button>
+    <button class="tab-button">pixi Apple</button>
+    <button class="tab-button">uv</button>
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run p11
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e amd p11
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e apple p11
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+uv run poe p11
+```
+
+  </div>
+</div>
+
+퍼즐을 아직 풀지 않았다면 출력은 다음과 같습니다:
+
+```txt
+out: HostBuffer([0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
+expected: HostBuffer([0.0, 1.0, 3.0, 6.0, 9.0, 12.0, 15.0, 18.0])
+```
+
+## 솔루션
+
+<details class="solution-details">
+<summary></summary>
+
+```mojo
+{{#include ../../../../../solutions/p11/p11.mojo:pooling_solution}}
+```
+
+<div class="solution-explanation">
+
+TileTensor를 활용한 슬라이딩 윈도우 합계 구현입니다. 주요 단계는 다음과 같습니다:
+
+1. **공유 메모리 설정**
+   - TileTensor가 주소 공간(address_space)으로 블록 로컬 저장소를 생성:
+
+     ```txt
+     shared = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB]())
+     ```
+
+   - 각 스레드가 하나씩 로드:
+
+     ```txt
+     Input array:  [0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0]
+     Block shared: [0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0]
+     ```
+
+   - `barrier()`로 모든 데이터 로드 완료를 보장
+
+2. **경계 케이스**
+   - 위치 0: 하나만
+
+     ```txt
+     output[0] = shared[0] = 0.0
+     ```
+
+   - 위치 1: 처음 두 값의 합
+
+     ```txt
+     output[1] = shared[0] + shared[1] = 0.0 + 1.0 = 1.0
+     ```
+
+3. **메인 윈도우 연산**
+   - 위치 2 이후:
+
+     ```txt
+     Position 2: shared[0] + shared[1] + shared[2] = 0.0 + 1.0 + 2.0 = 3.0
+     Position 3: shared[1] + shared[2] + shared[3] = 1.0 + 2.0 + 3.0 = 6.0
+     Position 4: shared[2] + shared[3] + shared[4] = 2.0 + 3.0 + 4.0 = 9.0
+     ...
+     ```
+
+   - TileTensor의 자연스러운 인덱싱:
+
+     ```txt
+     # 3개짜리 슬라이딩 윈도우
+     window_sum = shared[i-2] + shared[i-1] + shared[i]
+     ```
+
+4. **메모리 접근 패턴**
+   - 스레드마다 공유 텐서로 전역 읽기 1회
+   - 공유 메모리를 통한 효율적인 이웃 접근
+   - TileTensor의 장점:
+     - 자동 경계 검사
+     - 자연스러운 윈도우 인덱싱
+     - 레이아웃을 인식하는 메모리 접근
+     - 전 과정에 걸친 타입 안전성
+
+공유 메모리의 성능과 TileTensor의 안전성 및 편의성을 결합한 방식입니다:
+
+- 전역 메모리 접근 최소화
+- 윈도우 연산 간소화
+- 깔끔한 경계 처리
+- 병합 접근 패턴 유지
+
+최종 출력은 누적 윈도우 합계입니다:
+
+```txt
+[0.0, 1.0, 3.0, 6.0, 9.0, 12.0, 15.0, 18.0]
+```
+
+</div>
+</details>
diff --git a/book/i18n/ko/src/puzzle_11/raw.md b/book/i18n/ko/src/puzzle_11/raw.md
deleted file mode 100644
index 1a100ae5..00000000
--- a/book/i18n/ko/src/puzzle_11/raw.md
+++ /dev/null
@@ -1,176 +0,0 @@
-<!-- i18n-source-commit: db06539cab77774402e8a4bf955018fd853803d9 -->
-
-## 개요
-
-벡터 `a`에서 각 위치의 직전 3개 값의 합을 계산하여 벡터 `output`에 저장하는 커널을 구현하세요.
-
-**참고:** _각 위치마다 스레드 1개가 있습니다. 스레드당 전역 읽기 1회, 전역 쓰기 1회만 필요합니다._
-
-## 핵심 개념
-
-이 퍼즐에서 배울 내용:
-
-- 공유 메모리로 슬라이딩 윈도우 연산 구현하기
-- 풀링의 경계 조건 처리
-- 이웃 데이터 접근을 위한 스레드 간 협력
-
-핵심은 공유 메모리를 사용해 윈도우 내 값들에 효율적으로 접근하는 것입니다. 시퀀스 앞부분은 특별히 처리해야 합니다.
-
-## 구성
-
-- 배열 크기: `SIZE = 8`
-- 블록당 스레드 수: `TPB = 8`
-- 윈도우 크기: 3
-- 공유 메모리: `TPB`개
-
-참고:
-
-- **윈도우 접근**: 각 출력은 이전 최대 3개 값에 의존합니다
-- **경계 처리**: 처음 두 위치는 특별한 처리가 필요합니다
-- **메모리 패턴**: 스레드당 공유 메모리 로드 1회
-- **스레드 동기화**: 윈도우 연산 전에 조율 필요
-
-## 완성할 코드
-
-```mojo
-{{#include ../../../../../problems/p11/p11.mojo:pooling}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p11/p11.mojo" class="filename">전체 파일 보기: problems/p11/p11.mojo</a>
-
-<details>
-<summary><strong>팁</strong></summary>
-
-<div class="solution-tips">
-
-1. 데이터를 로드하고 `barrier()` 호출
-2. 특수 케이스: `output[0] = shared[0]`, `output[1] = shared[0] + shared[1]`
-3. 일반 케이스: `if 1 < global_i < size`
-4. 세 값의 합: `shared[local_i - 2] + shared[local_i - 1] + shared[local_i]`
-
-</div>
-</details>
-
-## 코드 실행
-
-솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p11
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p11
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p11
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p11
-```
-
-  </div>
-</div>
-
-퍼즐을 아직 풀지 않았다면 출력은 다음과 같습니다:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
-expected: HostBuffer([0.0, 1.0, 3.0, 6.0, 9.0, 12.0, 15.0, 18.0])
-```
-
-## 솔루션
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../../../solutions/p11/p11.mojo:pooling_solution}}
-```
-
-<div class="solution-explanation">
-
-공유 메모리를 활용한 슬라이딩 윈도우 합계 구현입니다. 주요 단계는 다음과 같습니다:
-
-1. **공유 메모리 설정**
-   - 공유 메모리에 `TPB`개 할당:
-
-     ```txt
-     Input array:  [0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0]
-     Block shared: [0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0]
-     ```
-
-   - 각 스레드가 전역 메모리에서 하나씩 로드
-   - `barrier()`로 모든 데이터 로드 완료를 보장
-
-2. **경계 케이스**
-   - 위치 0: 하나만
-
-     ```txt
-     output[0] = shared[0] = 0.0
-     ```
-
-   - 위치 1: 처음 두 값의 합
-
-     ```txt
-     output[1] = shared[0] + shared[1] = 0.0 + 1.0 = 1.0
-     ```
-
-3. **메인 윈도우 연산**
-   - 위치 2 이후:
-
-     ```txt
-     Position 2: shared[0] + shared[1] + shared[2] = 0.0 + 1.0 + 2.0 = 3.0
-     Position 3: shared[1] + shared[2] + shared[3] = 1.0 + 2.0 + 3.0 = 6.0
-     Position 4: shared[2] + shared[3] + shared[4] = 2.0 + 3.0 + 4.0 = 9.0
-     ...
-     ```
-
-   - 로컬 인덱스를 사용한 윈도우 계산:
-
-     ```txt
-     # 3개짜리 슬라이딩 윈도우
-     window_sum = shared[i-2] + shared[i-1] + shared[i]
-     ```
-
-4. **메모리 접근 패턴**
-   - 스레드당 공유 메모리로 전역 읽기 1회
-   - 스레드당 공유 메모리에서 전역 쓰기 1회
-   - 이웃 접근을 위해 공유 메모리 활용
-   - 병합 메모리 접근 패턴 유지
-
-이 방식의 성능 최적화 포인트:
-
-- 전역 메모리 접근 최소화
-- 공유 메모리로 빠른 이웃 조회
-- 깔끔한 경계 처리
-- 효율적인 메모리 병합
-
-최종 출력은 누적 윈도우 합계를 보여줍니다:
-
-```txt
-[0.0, 1.0, 3.0, 6.0, 9.0, 12.0, 15.0, 18.0]
-```
-
-</div>
-</details>
diff --git a/book/i18n/ko/src/puzzle_12/layout_tensor.md b/book/i18n/ko/src/puzzle_12/layout_tensor.md
deleted file mode 100644
index 986f60e7..00000000
--- a/book/i18n/ko/src/puzzle_12/layout_tensor.md
+++ /dev/null
@@ -1,230 +0,0 @@
-<!-- i18n-source-commit: 51143596e241ae5954474ecb3133b1d7b147f6fc -->
-
-## 개요
-
-1D LayoutTensor `a`와 1D LayoutTensor `b`의 내적을 계산하여 1D LayoutTensor `output`(단일 값)에 저장하는 커널을 구현하세요.
-
-**참고:** _각 위치마다 스레드 1개가 있습니다. 스레드당 전역 읽기 2회, 블록당 전역 쓰기 1회만 필요합니다._
-
-## 핵심 개념
-
-이 퍼즐에서 배울 내용:
-
-- [Puzzle 8](../puzzle_08/layout_tensor.md), [Puzzle 11](../puzzle_11/layout_tensor.md)에서 이어지는 LayoutTensor 기반 병렬 리덕션
-- `address_space`를 활용한 공유 메모리 관리
-- 여러 스레드가 협력해 하나의 결과를 만들어가는 과정
-- 레이아웃을 인식하는 텐서 연산
-
-핵심은 LayoutTensor가 메모리 관리를 간소화하면서도, 병렬 리덕션의 효율은 그대로 살리는 방식을 이해하는 것입니다.
-
-## 구성
-
-- 벡터 크기: `SIZE = 8`
-- 블록당 스레드 수: `TPB = 8`
-- 블록 수: 1
-- 출력 크기: 1
-- 공유 메모리: `TPB`개
-
-참고:
-
-- **LayoutTensor 할당**: `LayoutTensor[dtype, Layout.row_major(TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()` 사용
-- **요소 접근**: 경계 검사가 자동으로 따라오는 자연스러운 인덱싱
-- **레이아웃 처리**: 입력용과 출력용 레이아웃을 따로 구성
-- **스레드 조율**: 동일한 동기화 패턴으로 `barrier()` 사용
-
-## 완성할 코드
-
-```mojo
-{{#include ../../../../../problems/p12/p12_layout_tensor.mojo:dot_product_layout_tensor}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p12/p12_layout_tensor.mojo" class="filename">전체 파일 보기: problems/p12/p12_layout_tensor.mojo</a>
-
-<details>
-<summary><strong>팁</strong></summary>
-
-<div class="solution-tips">
-
-1. LayoutTensor와 `address_space`로 공유 메모리 생성
-2. `shared[local_i]`에 `a[global_i] * b[global_i]`를 저장
-3. `barrier()`와 함께 병렬 리덕션 패턴 적용
-4. 스레드 0이 최종 결과를 `output[0]`에 기록
-
-</div>
-</details>
-
-## 코드 실행
-
-솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p12_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p12_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p12_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p12_layout_tensor
-```
-
-  </div>
-</div>
-
-퍼즐을 아직 풀지 않았다면 출력은 다음과 같습니다:
-
-```txt
-out: HostBuffer([0.0])
-expected: HostBuffer([140.0])
-```
-
-## 솔루션
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../../../solutions/p12/p12_layout_tensor.mojo:dot_product_layout_tensor_solution}}
-```
-
-<div class="solution-explanation">
-
-LayoutTensor를 활용한 병렬 리덕션으로 내적을 계산하는 솔루션입니다. 단계별로 살펴보겠습니다:
-
-### 1단계: 요소별 곱셈
-
-각 스레드가 직관적인 인덱싱으로 곱셈 연산을 하나씩 처리합니다:
-
-```mojo
-shared[local_i] = a[global_i] * b[global_i]
-```
-
-### 2단계: 병렬 리덕션
-
-레이아웃을 인식하는 트리 기반 리덕션입니다:
-
-```txt
-초기값:    [0*0  1*1  2*2  3*3  4*4  5*5  6*6  7*7]
-        = [0    1    4    9    16   25   36   49]
-
-Step 1:   [0+16 1+25 4+36 9+49  16   25   36   49]
-        = [16   26   40   58   16   25   36   49]
-
-Step 2:   [16+40 26+58 40   58   16   25   36   49]
-        = [56   84   40   58   16   25   36   49]
-
-Step 3:   [56+84  84   40   58   16   25   36   49]
-        = [140   84   40   58   16   25   36   49]
-```
-
-### 구현의 핵심 특징
-
-1. **메모리 관리**:
-   - `address_space` 파라미터 하나로 공유 메모리를 깔끔하게 할당
-   - 타입 안전한 연산이 보장되고
-   - 경계 검사가 자동으로 따라오며
-   - 인덱싱도 레이아웃을 인식
-
-2. **스레드 동기화**:
-   - 초기 곱셈이 끝나면 `barrier()`
-   - 리덕션 단계 사이마다 `barrier()`
-   - 스레드 간 안전한 조율 보장
-
-3. **리덕션 로직**:
-
-   ```mojo
-   stride = TPB // 2
-   while stride > 0:
-       if local_i < stride:
-           shared[local_i] += shared[local_i + stride]
-       barrier()
-       stride //= 2
-   ```
-
-4. **성능상 이점**:
-   - \\(O(\log n)\\) 시간 복잡도
-   - 병합 메모리 접근
-   - 최소한의 스레드 분기
-   - 공유 메모리의 효율적 활용
-
-LayoutTensor 버전은 병렬 리덕션의 효율은 그대로 유지하면서, 여기에 더해:
-
-- 타입 안전성이 한층 강화되고
-- 메모리 관리가 더 깔끔해지며
-- 레이아웃을 자동으로 인식하고
-- 인덱싱 문법도 자연스러워집니다
-
-### 배리어 동기화의 중요성
-
-리덕션 단계 사이의 `barrier()`는 정확한 결과를 위해 반드시 필요합니다. 그 이유를 살펴보겠습니다:
-
-`barrier()`가 없으면 경쟁 상태가 발생합니다:
-
-```text
-초기 공유 메모리: [0 1 4 9 16 25 36 49]
-
-Step 1 (stride = 4):
-Thread 0 읽기: shared[0] = 0, shared[4] = 16
-Thread 1 읽기: shared[1] = 1, shared[5] = 25
-Thread 2 읽기: shared[2] = 4, shared[6] = 36
-Thread 3 읽기: shared[3] = 9, shared[7] = 49
-
-barrier 없이:
-- Thread 0 쓰기: shared[0] = 0 + 16 = 16
-- Thread 1이 Thread 0보다 먼저 다음 단계(stride = 2)로 넘어가서
-  16이 아닌 이전 값 shared[0] = 0을 읽어버립니다!
-```
-
-`barrier()`가 있으면:
-
-```text
-Step 1 (stride = 4):
-모든 스레드가 합을 기록:
-[16 26 40 58 16 25 36 49]
-barrier()가 모든 스레드에게 이 값들이 보이도록 보장
-
-Step 2 (stride = 2):
-이제 업데이트된 값을 안전하게 읽을 수 있음:
-Thread 0: shared[0] = 16 + 40 = 56
-Thread 1: shared[1] = 26 + 58 = 84
-```
-
-`barrier()`는 다음을 보장합니다:
-
-1. 현재 단계의 모든 쓰기가 끝난 뒤에야 다음으로 넘어감
-2. 모든 스레드가 최신 값을 볼 수 있음
-3. 어떤 스레드도 앞서 나가지 않음
-4. 공유 메모리가 항상 일관된 상태를 유지
-
-이런 동기화 지점이 없으면:
-
-- 경쟁 상태가 발생하고
-- 스레드가 이미 지난 값을 읽게 되며
-- 실행할 때마다 결과가 달라지고
-- 최종 합계가 틀어질 수 있습니다
-
-</div>
-</details>
diff --git a/book/i18n/ko/src/puzzle_12/puzzle_12.md b/book/i18n/ko/src/puzzle_12/puzzle_12.md
index 7420e049..ccfdb365 100644
--- a/book/i18n/ko/src/puzzle_12/puzzle_12.md
+++ b/book/i18n/ko/src/puzzle_12/puzzle_12.md
@@ -4,7 +4,7 @@
 
 ## 개요
 
-벡터 `a`와 벡터 `b`의 내적을 계산하여 `output`(단일 값)에 저장하는 커널을 구현하세요. 내적은 크기가 같은 두 벡터에서 대응하는 원소끼리 곱한 뒤, 그 결과를 모두 더해 하나의 숫자(스칼라)를 구하는 연산입니다.
+1D TileTensor `a`와 1D TileTensor `b`의 내적을 계산하여 1D TileTensor `output`(단일 값)에 저장하는 커널을 구현하세요. 내적은 크기가 같은 두 벡터에서 대응하는 원소끼리 곱한 뒤, 그 결과를 모두 더해 하나의 숫자(스칼라)를 구하는 연산입니다.
 
 예를 들어, 두 벡터가 다음과 같을 때:
 
@@ -19,14 +19,225 @@
 <img src="/puzzle_12/media/12-w.png" alt="내적 시각화" class="light-mode-img">
 <img src="/puzzle_12/media/12-b.png" alt="내적 시각화" class="dark-mode-img">
 
-## 구현 방식
+## 핵심 개념
 
-### [🔰 원시 메모리 방식](./raw.md)
+이 퍼즐에서 배울 내용:
 
-수동 메모리 관리와 동기화로 리덕션을 밑바닥부터 구현하는 방법을 알아봅니다.
+- [Puzzle 8](../puzzle_08/puzzle_08.md), [Puzzle 11](../puzzle_11/puzzle_11.md)에서 이어지는 TileTensor 기반 병렬 리덕션
+- `address_space`를 활용한 공유 메모리 관리
+- 여러 스레드가 협력해 하나의 결과를 만들어가는 과정
+- 레이아웃을 인식하는 텐서 연산
 
-### [📐 LayoutTensor 버전](./layout_tensor.md)
+핵심은 TileTensor가 메모리 관리를 간소화하면서도, 병렬 리덕션의 효율은 그대로 살리는 방식을 이해하는 것입니다.
 
-LayoutTensor를 활용해 리덕션과 공유 메모리 관리를 더 간결하게 구현합니다.
+## 구성
 
-💡 **참고**: LayoutTensor로 메모리 접근 패턴이 얼마나 깔끔해지는지 확인해 보세요. 효율은 그대로입니다.
+- 벡터 크기: `SIZE = 8`
+- 블록당 스레드 수: `TPB = 8`
+- 블록 수: 1
+- 출력 크기: 1
+- 공유 메모리: `TPB`개
+
+참고:
+
+- **TileTensor 할당**: `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB]())` 사용
+- **요소 접근**: 경계 검사가 자동으로 따라오는 자연스러운 인덱싱
+- **레이아웃 처리**: 입력용과 출력용 레이아웃을 따로 구성
+- **스레드 조율**: 동일한 동기화 패턴으로 `barrier()` 사용
+
+## 완성할 코드
+
+```mojo
+{{#include ../../../../../problems/p12/p12.mojo:dot_product}}
+```
+
+<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p12/p12.mojo" class="filename">전체 파일 보기: problems/p12/p12.mojo</a>
+
+<details>
+<summary><strong>팁</strong></summary>
+
+<div class="solution-tips">
+
+1. TileTensor와 `address_space`로 공유 메모리 생성
+2. `shared[local_i]`에 `a[global_i] * b[global_i]`를 저장
+3. `barrier()`와 함께 병렬 리덕션 패턴 적용
+4. 스레드 0이 최종 결과를 `output[0]`에 기록
+
+</div>
+</details>
+
+## 코드 실행
+
+솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
+
+<div class="code-tabs" data-tab-group="package-manager">
+  <div class="tab-buttons">
+    <button class="tab-button">pixi NVIDIA (default)</button>
+    <button class="tab-button">pixi AMD</button>
+    <button class="tab-button">pixi Apple</button>
+    <button class="tab-button">uv</button>
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run p12
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e amd p12
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e apple p12
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+uv run poe p12
+```
+
+  </div>
+</div>
+
+퍼즐을 아직 풀지 않았다면 출력은 다음과 같습니다:
+
+```txt
+out: HostBuffer([0.0])
+expected: HostBuffer([140.0])
+```
+
+## 솔루션
+
+<details class="solution-details">
+<summary></summary>
+
+```mojo
+{{#include ../../../../../solutions/p12/p12.mojo:dot_product_solution}}
+```
+
+<div class="solution-explanation">
+
+TileTensor를 활용한 병렬 리덕션으로 내적을 계산하는 솔루션입니다. 단계별로 살펴보겠습니다:
+
+### 1단계: 요소별 곱셈
+
+각 스레드가 직관적인 인덱싱으로 곱셈 연산을 하나씩 처리합니다:
+
+```mojo
+shared[local_i] = a[global_i] * b[global_i]
+```
+
+### 2단계: 병렬 리덕션
+
+레이아웃을 인식하는 트리 기반 리덕션입니다:
+
+```txt
+초기값:    [0*0  1*1  2*2  3*3  4*4  5*5  6*6  7*7]
+        = [0    1    4    9    16   25   36   49]
+
+Step 1:   [0+16 1+25 4+36 9+49  16   25   36   49]
+        = [16   26   40   58   16   25   36   49]
+
+Step 2:   [16+40 26+58 40   58   16   25   36   49]
+        = [56   84   40   58   16   25   36   49]
+
+Step 3:   [56+84  84   40   58   16   25   36   49]
+        = [140   84   40   58   16   25   36   49]
+```
+
+### 구현의 핵심 특징
+
+1. **메모리 관리**:
+   - `address_space` 파라미터 하나로 공유 메모리를 깔끔하게 할당
+   - 타입 안전한 연산이 보장되고
+   - 경계 검사가 자동으로 따라오며
+   - 인덱싱도 레이아웃을 인식
+
+2. **스레드 동기화**:
+   - 초기 곱셈이 끝나면 `barrier()`
+   - 리덕션 단계 사이마다 `barrier()`
+   - 스레드 간 안전한 조율 보장
+
+3. **리덕션 로직**:
+
+   ```mojo
+   stride = TPB // 2
+   while stride > 0:
+       if local_i < stride:
+           shared[local_i] += shared[local_i + stride]
+       barrier()
+       stride //= 2
+   ```
+
+4. **성능상 이점**:
+   - \\(O(\log n)\\) 시간 복잡도
+   - 병합 메모리 접근
+   - 최소한의 스레드 분기
+   - 공유 메모리의 효율적 활용
+
+TileTensor 버전은 병렬 리덕션의 효율은 그대로 유지하면서, 여기에 더해:
+
+- 타입 안전성이 한층 강화되고
+- 메모리 관리가 더 깔끔해지며
+- 레이아웃을 자동으로 인식하고
+- 인덱싱 문법도 자연스러워집니다
+
+### 배리어 동기화의 중요성
+
+리덕션 단계 사이의 `barrier()`는 정확한 결과를 위해 반드시 필요합니다. 그 이유를 살펴보겠습니다:
+
+`barrier()`가 없으면 경쟁 상태가 발생합니다:
+
+```text
+초기 공유 메모리: [0 1 4 9 16 25 36 49]
+
+Step 1 (stride = 4):
+Thread 0 읽기: shared[0] = 0, shared[4] = 16
+Thread 1 읽기: shared[1] = 1, shared[5] = 25
+Thread 2 읽기: shared[2] = 4, shared[6] = 36
+Thread 3 읽기: shared[3] = 9, shared[7] = 49
+
+barrier 없이:
+- Thread 0 쓰기: shared[0] = 0 + 16 = 16
+- Thread 1이 Thread 0보다 먼저 다음 단계(stride = 2)로 넘어가서
+  16이 아닌 이전 값 shared[0] = 0을 읽어버립니다!
+```
+
+`barrier()`가 있으면:
+
+```text
+Step 1 (stride = 4):
+모든 스레드가 합을 기록:
+[16 26 40 58 16 25 36 49]
+barrier()가 모든 스레드에게 이 값들이 보이도록 보장
+
+Step 2 (stride = 2):
+이제 업데이트된 값을 안전하게 읽을 수 있음:
+Thread 0: shared[0] = 16 + 40 = 56
+Thread 1: shared[1] = 26 + 58 = 84
+```
+
+`barrier()`는 다음을 보장합니다:
+
+1. 현재 단계의 모든 쓰기가 끝난 뒤에야 다음으로 넘어감
+2. 모든 스레드가 최신 값을 볼 수 있음
+3. 어떤 스레드도 앞서 나가지 않음
+4. 공유 메모리가 항상 일관된 상태를 유지
+
+이런 동기화 지점이 없으면:
+
+- 경쟁 상태가 발생하고
+- 스레드가 이미 지난 값을 읽게 되며
+- 실행할 때마다 결과가 달라지고
+- 최종 합계가 틀어질 수 있습니다
+
+</div>
+</details>
diff --git a/book/i18n/ko/src/puzzle_12/raw.md b/book/i18n/ko/src/puzzle_12/raw.md
deleted file mode 100644
index ecf9a719..00000000
--- a/book/i18n/ko/src/puzzle_12/raw.md
+++ /dev/null
@@ -1,229 +0,0 @@
-<!-- i18n-source-commit: db06539cab77774402e8a4bf955018fd853803d9 -->
-
-## 개요
-
-벡터 `a`와 벡터 `b`의 내적을 계산하여 `output`(단일 값)에 저장하는 커널을 구현하세요.
-
-**참고:** _각 위치마다 스레드 1개가 있습니다. 스레드당 전역 읽기 2회, 블록당 전역 쓰기 1회만 필요합니다._
-
-## 핵심 개념
-
-이 퍼즐에서 다루는 내용:
-
-- 여러 값을 하나로 합치는 병렬 리덕션(parallel reduction) 구현하기
-- 공유 메모리에 중간 결과 저장하기
-- 스레드끼리 협력하여 하나의 결과 만들기
-
-핵심은 공유 메모리와 병렬 연산을 활용해, 흩어져 있는 값들을 효율적으로 하나의 결과로 모아가는 과정을 이해하는 것입니다.
-
-## 구성
-
-- 벡터 크기: `SIZE = 8`
-- 블록당 스레드 수: `TPB = 8`
-- 블록 수: 1
-- 출력 크기: 1
-- 공유 메모리: `TPB`개
-
-참고:
-
-- **요소 접근**: 각 스레드가 `a`와 `b`에서 대응하는 요소를 읽음
-- **부분 결과**: 중간 값을 계산하고 저장
-- **스레드 조율**: 결과를 합치기 전에 동기화
-- **최종 리덕션**: 부분 결과를 스칼라 출력으로 변환
-
-_참고: 이 문제에서는 공유 메모리 읽기 횟수를 신경 쓸 필요가 없습니다. 그 문제는 나중에 다루겠습니다._
-
-## 완성할 코드
-
-```mojo
-{{#include ../../../../../problems/p12/p12.mojo:dot_product}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p12/p12.mojo" class="filename">전체 파일 보기: problems/p12/p12.mojo</a>
-
-<details>
-<summary><strong>팁</strong></summary>
-
-<div class="solution-tips">
-
-1. `shared[local_i]`에 `a[global_i] * b[global_i]`를 저장
-2. `barrier()`를 호출하여 동기화
-3. 스레드 0이 공유 메모리의 모든 곱을 합산
-4. 최종 합계를 `output[0]`에 기록
-
-</div>
-</details>
-
-## 코드 실행
-
-솔루션을 테스트하려면 터미널에서 다음 명령어를 실행하세요:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p12
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p12
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p12
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p12
-```
-
-  </div>
-</div>
-
-퍼즐을 아직 풀지 않았다면 출력은 다음과 같습니다:
-
-```txt
-out: HostBuffer([0.0])
-expected: HostBuffer([140.0])
-```
-
-## 솔루션
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../../../solutions/p12/p12.mojo:dot_product_solution}}
-```
-
-<div class="solution-explanation">
-
-공유 메모리를 활용한 병렬 리덕션 알고리즘으로 내적을 계산하는 솔루션입니다. 단계별로 살펴보겠습니다:
-
-### 1단계: 요소별 곱셈
-
-각 스레드가 곱셈 하나를 수행합니다:
-
-```txt
-Thread i: shared[i] = a[i] * b[i]
-```
-
-### 2단계: 병렬 리덕션
-
-활성 스레드를 매 단계마다 절반으로 줄이는 트리 기반 방식입니다:
-
-```txt
-초기값:    [0*0  1*1  2*2  3*3  4*4  5*5  6*6  7*7]
-        = [0    1    4    9    16   25   36   49]
-
-Step 1:   [0+16 1+25 4+36 9+49  16   25   36   49]
-        = [16   26   40   58   16   25   36   49]
-
-Step 2:   [16+40 26+58 40   58   16   25   36   49]
-        = [56   84   40   58   16   25   36   49]
-
-Step 3:   [56+84  84   40   58   16   25   36   49]
-        = [140   84   40   58   16   25   36   49]
-```
-
-### 구현의 핵심 특징
-
-1. **메모리 접근 패턴**:
-   - 각 스레드가 전역 메모리에서 정확히 두 값을 로드 (`a[i]`, `b[i]`)
-   - 중간 결과에 공유 메모리 사용
-   - 최종 결과는 전역 메모리에 1회 기록
-
-2. **스레드 동기화**:
-   - 초기 곱셈 후 `barrier()`
-   - 각 리덕션 단계 후 `barrier()`
-   - 리덕션 단계 간 경쟁 상태 방지
-
-3. **리덕션 로직**:
-
-   ```mojo
-   stride = TPB // 2
-   while stride > 0:
-       if local_i < stride:
-           shared[local_i] += shared[local_i + stride]
-       barrier()
-       stride //= 2
-   ```
-
-   - 매 단계마다 stride를 절반으로
-   - 활성 스레드만 덧셈 수행
-   - 작업 효율성 유지
-
-4. **성능 고려 사항**:
-   - \\(n\\)개 요소에 대해 \\(\log_2(n)\\) 단계
-   - 병합 메모리 접근 패턴
-   - 최소한의 스레드 분기
-   - 공유 메모리의 효율적 활용
-
-이 구현은 순차 실행의 \\(O(n)\\)에 비해 \\(O(\log n)\\) 시간 복잡도를 달성하며, 병렬 리덕션 알고리즘의 위력을 보여줍니다.
-
-### 배리어 동기화의 중요성
-
-리덕션 단계 사이의 `barrier()`는 정확한 결과를 위해 반드시 필요합니다. 그 이유를 살펴보겠습니다:
-
-`barrier()`가 없으면 경쟁 상태가 발생합니다:
-
-```text
-초기 공유 메모리: [0 1 4 9 16 25 36 49]
-
-Step 1 (stride = 4):
-Thread 0 읽기: shared[0] = 0, shared[4] = 16
-Thread 1 읽기: shared[1] = 1, shared[5] = 25
-Thread 2 읽기: shared[2] = 4, shared[6] = 36
-Thread 3 읽기: shared[3] = 9, shared[7] = 49
-
-barrier 없이:
-- Thread 0 쓰기: shared[0] = 0 + 16 = 16
-- Thread 1이 Thread 0보다 먼저 다음 단계(stride = 2)로 넘어가서
-  16이 아닌 이전 값 shared[0] = 0을 읽어버립니다!
-```
-
-`barrier()`가 있으면:
-
-```text
-Step 1 (stride = 4):
-모든 스레드가 합을 기록:
-[16 26 40 58 16 25 36 49]
-barrier()가 모든 스레드에게 이 값들이 보이도록 보장
-
-Step 2 (stride = 2):
-이제 업데이트된 값을 안전하게 읽을 수 있음:
-Thread 0: shared[0] = 16 + 40 = 56
-Thread 1: shared[1] = 26 + 58 = 84
-```
-
-`barrier()`는 다음을 보장합니다:
-
-1. 현재 단계의 모든 쓰기가 끝난 뒤에야 다음으로 넘어감
-2. 모든 스레드가 최신 값을 볼 수 있음
-3. 어떤 스레드도 앞서 나가지 않음
-4. 공유 메모리가 항상 일관된 상태를 유지
-
-이런 동기화 지점이 없으면:
-
-- 경쟁 상태가 발생하고
-- 스레드가 이미 지난 값을 읽게 되며
-- 실행할 때마다 결과가 달라지고
-- 최종 합계가 틀어질 수 있습니다
-
-</div>
-</details>
diff --git a/book/i18n/ko/src/puzzle_13/block_boundary.md b/book/i18n/ko/src/puzzle_13/block_boundary.md
index 6ab3d2db..4ed215ce 100644
--- a/book/i18n/ko/src/puzzle_13/block_boundary.md
+++ b/book/i18n/ko/src/puzzle_13/block_boundary.md
@@ -2,7 +2,7 @@
 
 # 블록 경계 버전
 
-1D LayoutTensor `a`와 1D LayoutTensor `b`의 1D 합성곱을 계산하여 1D LayoutTensor `output`에 저장하는 커널을 구현하세요.
+1D TileTensor `a`와 1D TileTensor `b`의 1D 합성곱을 계산하여 1D TileTensor `output`에 저장하는 커널을 구현하세요.
 
 **참고:** _일반적인 경우를 처리해야 합니다. 스레드당 전역 읽기 2회, 전역 쓰기 1회만 필요합니다._
 
@@ -34,7 +34,7 @@
 
 <div class="solution-tips">
 
-1. `LayoutTensor[dtype, Layout.row_major(TPB + CONV_2 - 1), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()`으로 공유 메모리 할당
+1. `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB + CONV_2 - 1]())`으로 공유 메모리 할당
 2. 메인 데이터 로드: `shared_a[local_i] = a[global_i]`
 3. 경계 데이터 로드: `if local_i < CONV_2 - 1`일 때 다음 블록의 데이터 처리
 4. 커널 로드: `shared_b[local_i] = b[local_i]`
@@ -127,8 +127,8 @@ Block 1 공유 메모리:  [8 9 10 11 12 13 14 0|0 0 0]  // 두 번째 블록. 
 
    ```mojo
    # 합성곱 윈도우에 필요한 패딩을 먼저 고려
-   shared_a = LayoutTensor[dtype, Layout.row_major(TPB + CONV_2 - 1), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
-   shared_b = LayoutTensor[dtype, Layout.row_major(CONV_2), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
+   shared_a = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB + CONV_2 - 1]())
+   shared_b = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[CONV_2]())
    ```
 
    이렇게 하면 블록 데이터와 겹침 영역을 모두 담기에 충분한 공간이 확보됩니다.
@@ -242,7 +242,7 @@ Thread 4부터는 `global_i + j < SIZE_2`가 `False`가 되어 해당 반복을
 
 - 적절한 경계 검사를 통한 메모리 안전성
 - 최적화된 메모리 접근을 통한 높은 성능
-- LayoutTensor 추상화를 활용한 깔끔한 코드 구조
+- TileTensor 추상화를 활용한 깔끔한 코드 구조
 - 최소한의 동기화 오버헤드
 - 수학적으로 건전한 경계 처리
 
diff --git a/book/i18n/ko/src/puzzle_13/puzzle_13.md b/book/i18n/ko/src/puzzle_13/puzzle_13.md
index 9f74646c..34f50da0 100644
--- a/book/i18n/ko/src/puzzle_13/puzzle_13.md
+++ b/book/i18n/ko/src/puzzle_13/puzzle_13.md
@@ -2,14 +2,14 @@
 
 # Puzzle 13: 1D 합성곱
 
-> ## LayoutTensor로 전환하기
+> ## TileTensor로 전환하기
 >
 > 지금까지 GPU 퍼즐 여정에서 GPU 메모리 관리에 대한 두 가지 접근 방식을 함께 살펴보았습니다:
 >
 > 1. [UnsafePointer](https://docs.modular.com/mojo/std/memory/unsafe_pointer/UnsafePointer/)를 사용한 포인터 직접 조작 방식의 raw 메모리 관리
-> 2. 강력한 `address_space` 파라미터로 메모리를 할당하는, 보다 구조화된 [LayoutTensor](https://docs.modular.com/mojo/kernels/layout/layout_tensor/LayoutTensor/)
+> 2. 강력한 `address_space` 파라미터로 메모리를 할당하는, 보다 구조화된 [TileTensor](https://docs.modular.com/mojo/kernels/layout/tile_tensor/TileTensor/)
 >
-> 이 퍼즐부터는 `LayoutTensor`로 완전히 전환합니다. 이 추상화는 다음과 같은 이점을 제공합니다:
+> 이 퍼즐부터는 `TileTensor`로 완전히 전환합니다. 이 추상화는 다음과 같은 이점을 제공합니다:
 >
 > - 타입 안전한 메모리 접근 패턴
 > - 데이터 레이아웃의 명확한 표현
@@ -24,7 +24,7 @@
 
 신호 처리와 이미지 분석에서 합성곱(convolution)은 두 시퀀스를 결합해 새로운 시퀀스를 만들어내는 핵심 연산입니다. 이 퍼즐에서는 입력 배열 위로 커널을 슬라이딩하면서 각 출력 원소를 계산하는 1D 합성곱을 GPU에서 구현해 봅니다.
 
-`LayoutTensor` 추상화를 사용하여 벡터 `a`와 벡터 `b`의 1D 합성곱을 계산하고, 결과를 `output`에 저장하는 커널을 구현하세요.
+`TileTensor` 추상화를 사용하여 벡터 `a`와 벡터 `b`의 1D 합성곱을 계산하고, 결과를 `output`에 저장하는 커널을 구현하세요.
 
 **참고:** _일반적인 경우를 처리해야 합니다. 스레드당 전역 읽기 2회, 전역 쓰기 1회만 필요합니다._
 
@@ -47,9 +47,9 @@ for i in range(SIZE):
 이 퍼즐은 단계적으로 이해를 쌓아갈 수 있도록 두 파트로 나뉩니다:
 
 - [🔰 기본 버전](./simple.md)
-  여기서부터 시작하세요. 단일 블록에서 LayoutTensor와 공유 메모리를 활용한 합성곱 구현의 기초를 익힙니다.
+  여기서부터 시작하세요. 단일 블록에서 TileTensor와 공유 메모리를 활용한 합성곱 구현의 기초를 익힙니다.
 
 - [⭐ 블록 경계 버전](./block_boundary.md)
-  이어서 블록 경계를 넘어 데이터를 공유해야 하는 더 까다로운 경우에 도전합니다. LayoutTensor의 기능을 본격적으로 활용합니다.
+  이어서 블록 경계를 넘어 데이터를 공유해야 하는 더 까다로운 경우에 도전합니다. TileTensor의 기능을 본격적으로 활용합니다.
 
 각 버전은 메모리 접근 패턴과 스레드 간 협력 측면에서 서로 다른 도전 과제를 제시합니다. 기본 버전에서 합성곱 연산의 원리를 익힌 다음, 블록 경계 버전에서는 실제 GPU 프로그래밍에서 마주치는 복잡한 상황을 다루는 능력을 시험해 봅니다.
diff --git a/book/i18n/ko/src/puzzle_13/simple.md b/book/i18n/ko/src/puzzle_13/simple.md
index 0ef11d8d..d7b9303c 100644
--- a/book/i18n/ko/src/puzzle_13/simple.md
+++ b/book/i18n/ko/src/puzzle_13/simple.md
@@ -2,7 +2,7 @@
 
 # 단일 블록을 사용한 기본 버전
 
-1D LayoutTensor `a`와 1D LayoutTensor `b`의 1D 합성곱을 계산하여 1D LayoutTensor `output`에 저장하는 커널을 구현하세요.
+1D TileTensor `a`와 1D TileTensor `b`의 1D 합성곱을 계산하여 1D TileTensor `output`에 저장하는 커널을 구현하세요.
 
 **참고:** _일반적인 경우를 처리해야 합니다. 스레드당 전역 읽기 2회, 전역 쓰기 1회만 필요합니다._
 
@@ -43,7 +43,7 @@
 
 <div class="solution-tips">
 
-1. `LayoutTensor[dtype, Layout.row_major(SIZE), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()`으로 공유 메모리 할당
+1. `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[SIZE]())`으로 공유 메모리 할당
 2. 입력을 `shared_a[local_i]`에, 커널을 `shared_b[local_i]`에 로드
 3. 데이터 로드 후 `barrier()` 호출
 4. 경계 안에서 곱을 합산: `if local_i + j < SIZE`
@@ -179,7 +179,7 @@ expected: HostBuffer([5.0, 8.0, 11.0, 14.0, 5.0, 0.0])
    - `var`와 `output.element_type`으로 적절한 타입 추론
    - `@parameter` 데코레이터로 합성곱 루프를 컴파일 타임에 전개
    - 엄격한 경계 검사로 메모리 안전성 확보
-   - LayoutTensor의 타입 시스템으로 코드 안전성 향상
+   - TileTensor의 타입 시스템으로 코드 안전성 향상
 
 3. **메모리 관리**:
    - 입력 배열과 커널 모두 공유 메모리 사용
diff --git a/book/i18n/ko/src/puzzle_14/complete.md b/book/i18n/ko/src/puzzle_14/complete.md
index 773a0eee..64136f82 100644
--- a/book/i18n/ko/src/puzzle_14/complete.md
+++ b/book/i18n/ko/src/puzzle_14/complete.md
@@ -2,7 +2,7 @@
 
 # 완성 버전
 
-1D LayoutTensor `a`에 대해 누적 합을 계산하고 결과를 1D LayoutTensor `output`에 저장하는 커널을 구현하세요.
+1D TileTensor `a`에 대해 누적 합을 계산하고 결과를 1D TileTensor `output`에 저장하는 커널을 구현하세요.
 
 **참고:** _`a`의 크기가 블록 크기보다 큰 경우, 올바른 결과를 얻으려면 여러 블록 간 동기화가 필요합니다._
 
diff --git a/book/i18n/ko/src/puzzle_14/puzzle_14.md b/book/i18n/ko/src/puzzle_14/puzzle_14.md
index 23c2b1a3..cf13e437 100644
--- a/book/i18n/ko/src/puzzle_14/puzzle_14.md
+++ b/book/i18n/ko/src/puzzle_14/puzzle_14.md
@@ -6,7 +6,7 @@
 
 누적 합(prefix sum, _scan_ 이라고도 합니다)은 시퀀스의 값을 차례로 더해 나가는 기본적인 병렬 알고리즘입니다. 정렬 알고리즘부터 과학 시뮬레이션까지 수많은 병렬 응용의 핵심에 자리하고 있으며, 숫자 시퀀스를 누적 합계로 변환하는 역할을 합니다. 순차적으로 계산하기는 간단하지만, GPU에서 효율적으로 만들려면 기발한 병렬적 사고가 필요합니다!
 
-1D LayoutTensor `a`에 대해 누적 합을 계산하고 결과를 1D LayoutTensor `output`에 저장하는 커널을 구현하세요.
+1D TileTensor `a`에 대해 누적 합을 계산하고 결과를 1D TileTensor `output`에 저장하는 커널을 구현하세요.
 
 **참고:** _`a`의 크기가 블록 크기보다 큰 경우, 각 블록의 합계만 저장합니다._
 
diff --git a/book/i18n/ko/src/puzzle_14/simple.md b/book/i18n/ko/src/puzzle_14/simple.md
index 8dce3df9..9d67eba9 100644
--- a/book/i18n/ko/src/puzzle_14/simple.md
+++ b/book/i18n/ko/src/puzzle_14/simple.md
@@ -2,7 +2,7 @@
 
 # 기본 버전
 
-1D LayoutTensor `a`에 대해 누적 합을 계산하고 결과를 1D LayoutTensor `output`에 저장하는 커널을 구현하세요.
+1D TileTensor `a`에 대해 누적 합을 계산하고 결과를 1D TileTensor `output`에 저장하는 커널을 구현하세요.
 
 **참고:** _`a`의 크기가 블록 크기보다 큰 경우, 각 블록의 합계만 저장합니다._
 
@@ -15,11 +15,11 @@
 
 참고:
 
-- **데이터 로딩**: 각 스레드가 LayoutTensor 접근을 통해 원소 하나를 로드
-- **메모리 패턴**: address_space를 지정한 LayoutTensor로 중간 결과를 공유 메모리에 저장
+- **데이터 로딩**: 각 스레드가 TileTensor 접근을 통해 원소 하나를 로드
+- **메모리 패턴**: address_space를 지정한 TileTensor로 중간 결과를 공유 메모리에 저장
 - **스레드 동기화**: 연산 단계 간 조율
 - **접근 패턴**: 스트라이드 기반 병렬 연산
-- **타입 안전성**: LayoutTensor의 타입 시스템 활용
+- **타입 안전성**: TileTensor의 타입 시스템 활용
 
 ## 완성할 코드
 
diff --git a/book/i18n/ko/src/puzzle_15/puzzle_15.md b/book/i18n/ko/src/puzzle_15/puzzle_15.md
index 309b002d..4420577f 100644
--- a/book/i18n/ko/src/puzzle_15/puzzle_15.md
+++ b/book/i18n/ko/src/puzzle_15/puzzle_15.md
@@ -4,7 +4,7 @@
 
 ## 개요
 
-2D 행렬 `a`의 각 행에 대해 합계를 계산하여 LayoutTensor를 사용해 `output`에 저장하는 커널을 구현하세요.
+2D 행렬 `a`의 각 행에 대해 합계를 계산하여 TileTensor를 사용해 `output`에 저장하는 커널을 구현하세요.
 
 <img src="/puzzle_15/media/15-w.png" alt="축 합계 시각화" class="light-mode-img">
 <img src="/puzzle_15/media/15-b.png" alt="축 합계 시각화" class="dark-mode-img">
@@ -13,12 +13,12 @@
 
 이 퍼즐에서 다루는 내용:
 
-- LayoutTensor를 활용한 행렬 차원 방향의 병렬 리덕션
+- TileTensor를 활용한 행렬 차원 방향의 병렬 리덕션
 - 블록 좌표를 이용한 데이터 분할
 - 효율적인 공유 메모리 리덕션 패턴
 - 다차원 텐서 레이아웃 다루기
 
-핵심은 스레드 블록을 행렬의 행에 매핑하고, LayoutTensor의 차원별 인덱싱을 활용하면서 각 블록 내에서 효율적인 병렬 리덕션을 수행하는 방법을 이해하는 것입니다.
+핵심은 스레드 블록을 행렬의 행에 매핑하고, TileTensor의 차원별 인덱싱을 활용하면서 각 블록 내에서 효율적인 병렬 리덕션을 수행하는 방법을 이해하는 것입니다.
 
 ## 구성
 
@@ -26,8 +26,8 @@
 - 블록당 스레드 수: \\(\\text{TPB} = 8\\)
 - 그리드 크기: \\(1 \\times \\text{BATCH}\\)
 - 공유 메모리: 블록당 \\(\\text{TPB}\\)개 원소
-- 입력 레이아웃: `Layout.row_major(BATCH, SIZE)`
-- 출력 레이아웃: `Layout.row_major(BATCH, 1)`
+- 입력 레이아웃: `row_major[BATCH, SIZE]()`
+- 출력 레이아웃: `row_major[BATCH, 1]()`
 
 행렬 시각화:
 
@@ -118,12 +118,12 @@ expected: HostBuffer([15.0, 51.0, 87.0, 123.0])
 
 <div class="solution-explanation">
 
-LayoutTensor를 활용해 2D 행렬의 행 방향 합계를 병렬로 구하는 리덕션 구현입니다. 단계별로 살펴보겠습니다:
+TileTensor를 활용해 2D 행렬의 행 방향 합계를 병렬로 구하는 리덕션 구현입니다. 단계별로 살펴보겠습니다:
 
 ### 행렬 레이아웃과 블록 매핑
 
 ```txt
-Input Matrix (4×6) with LayoutTensor:                Block Assignment:
+Input Matrix (4×6) with TileTensor:                Block Assignment:
 [[ a[0,0]  a[0,1]  a[0,2]  a[0,3]  a[0,4]  a[0,5] ] → Block(0,0)
  [ a[1,0]  a[1,1]  a[1,2]  a[1,3]  a[1,4]  a[1,5] ] → Block(0,1)
  [ a[2,0]  a[2,1]  a[2,2]  a[2,3]  a[2,4]  a[2,5] ] → Block(0,2)
@@ -158,9 +158,9 @@ Input Matrix (4×6) with LayoutTensor:                Block Assignment:
    - 각 블록이 하나의 행 전체를 처리
 
 2. **메모리 접근 패턴**:
-   - 입력에 LayoutTensor 2D 인덱싱 사용: `a[batch, local_i]`
+   - 입력에 TileTensor 2D 인덱싱 사용: `a[batch, local_i]`
    - 효율적인 리덕션을 위한 공유 메모리 활용
-   - 출력에 LayoutTensor 2D 인덱싱 사용: `output[batch, 0]`
+   - 출력에 TileTensor 2D 인덱싱 사용: `output[batch, 0]`
 
 3. **병렬 리덕션 로직**:
 
@@ -198,7 +198,7 @@ Input Matrix (4×6) with LayoutTensor:                Block Assignment:
 ### 성능 최적화
 
 1. **메모리 효율성**:
-   - LayoutTensor를 통한 병합 메모리 접근
+   - TileTensor를 통한 병합 메모리 접근
    - 빠른 리덕션을 위한 공유 메모리 활용
    - 행 결과당 한 번의 쓰기
 
diff --git "a/book/i18n/ko/src/puzzle_16/na\303\257ve.md" "b/book/i18n/ko/src/puzzle_16/na\303\257ve.md"
index 57be8804..6b16a048 100644
--- "a/book/i18n/ko/src/puzzle_16/na\303\257ve.md"
+++ "b/book/i18n/ko/src/puzzle_16/na\303\257ve.md"
@@ -26,9 +26,9 @@
 
 레이아웃 구성:
 
-- 입력 A: `Layout.row_major(SIZE, SIZE)`
-- 입력 B: `Layout.row_major(SIZE, SIZE)`
-- 출력: `Layout.row_major(SIZE, SIZE)`
+- 입력 A: `row_major[SIZE, SIZE]()`
+- 입력 B: `row_major[SIZE, SIZE]()`
+- 출력: `row_major[SIZE, SIZE]()`
 
 ## 완성할 코드
 
@@ -110,7 +110,7 @@ expected: HostBuffer([4.0, 6.0, 12.0, 22.0])
 
 <div class="solution-explanation">
 
-LayoutTensor를 활용한 기본 행렬 곱셈은 다음과 같은 접근 방식을 따릅니다:
+TileTensor를 활용한 기본 행렬 곱셈은 다음과 같은 접근 방식을 따릅니다:
 
 ### 행렬 레이아웃 (2×2 예시)
 
diff --git a/book/i18n/ko/src/puzzle_16/shared_memory.md b/book/i18n/ko/src/puzzle_16/shared_memory.md
index ae76bb3f..4fd595b6 100644
--- a/book/i18n/ko/src/puzzle_16/shared_memory.md
+++ b/book/i18n/ko/src/puzzle_16/shared_memory.md
@@ -10,13 +10,13 @@
 
 이 퍼즐에서 다루는 내용:
 
-- LayoutTensor를 사용한 블록 로컬 메모리 관리
+- TileTensor를 사용한 블록 로컬 메모리 관리
 - 스레드 동기화 패턴
 - 공유 메모리를 활용한 메모리 접근 최적화
 - 2D 인덱싱을 사용한 협력적 데이터 로딩
-- 행렬 연산에 LayoutTensor를 효율적으로 활용하기
+- 행렬 연산에 TileTensor를 효율적으로 활용하기
 
-핵심은 LayoutTensor를 통해 빠른 공유 메모리를 활용하여 비용이 큰 전역 메모리 접근을 최소화하는 것입니다.
+핵심은 TileTensor를 통해 빠른 공유 메모리를 활용하여 비용이 큰 전역 메모리 접근을 최소화하는 것입니다.
 
 ## 구성
 
@@ -26,15 +26,15 @@
 
 레이아웃 구성:
 
-- 입력 A: `Layout.row_major(SIZE, SIZE)`
-- 입력 B: `Layout.row_major(SIZE, SIZE)`
-- 출력: `Layout.row_major(SIZE, SIZE)`
-- 공유 메모리: `TPB × TPB` 크기의 LayoutTensor 2개
+- 입력 A: `row_major[SIZE, SIZE]()`
+- 입력 B: `row_major[SIZE, SIZE]()`
+- 출력: `row_major[SIZE, SIZE]()`
+- 공유 메모리: `TPB × TPB` 크기의 TileTensor 2개
 
 메모리 구성:
 
 ```txt
-Global Memory (LayoutTensor):          Shared Memory (LayoutTensor):
+Global Memory (TileTensor):          Shared Memory (TileTensor):
 A[i,j]: Direct access                  a_shared[local_row, local_col]
 B[i,j]: Direct access                  b_shared[local_row, local_col]
 ```
@@ -119,7 +119,7 @@ expected: HostBuffer([4.0, 6.0, 12.0, 22.0])
 
 <div class="solution-explanation">
 
-LayoutTensor를 활용한 공유 메모리 구현은 효율적인 메모리 접근 패턴을 통해 성능을 향상시킵니다:
+TileTensor를 활용한 공유 메모리 구현은 효율적인 메모리 접근 패턴을 통해 성능을 향상시킵니다:
 
 ### 메모리 구성
 
@@ -140,9 +140,9 @@ Matrix B:                           b_shared: (비슷한 레이아웃)
 1. **공유 메모리 설정**:
 
    ```mojo
-   # address_space를 지정한 LayoutTensor로 2D 공유 메모리 텐서 생성
-   a_shared = LayoutTensor[dtype, Layout.row_major(TPB, TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
-   b_shared = LayoutTensor[dtype, Layout.row_major(TPB, TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
+   # address_space를 지정한 TileTensor로 2D 공유 메모리 텐서 생성
+   a_shared = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB, TPB]())
+   b_shared = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB, TPB]())
    ```
 
 2. **스레드 인덱싱**:
@@ -160,7 +160,7 @@ Matrix B:                           b_shared: (비슷한 레이아웃)
 3. **데이터 로딩**:
 
    ```mojo
-   # LayoutTensor 인덱싱으로 데이터를 공유 메모리에 로드
+   # TileTensor 인덱싱으로 데이터를 공유 메모리에 로드
    if row < size and col < size:
        a_shared[local_row, local_col] = a[row, col]
        b_shared[local_row, local_col] = b[row, col]
@@ -219,13 +219,13 @@ Matrix B:                           b_shared: (비슷한 레이아웃)
 
 ### 주요 언어 기능
 
-1. **LayoutTensor의 장점**:
+1. **TileTensor의 장점**:
    - 직접 2D 인덱싱으로 코드 단순화
    - `element_type`을 통한 타입 안전성
    - 효율적인 메모리 레이아웃 처리
 
 2. **공유 메모리 할당**:
-   - address_space를 지정한 LayoutTensor로 구조화된 할당
+   - address_space를 지정한 TileTensor로 구조화된 할당
    - 입력 텐서와 동일한 행 우선 레이아웃
    - 효율적 접근을 위한 적절한 메모리 정렬
 
@@ -255,7 +255,7 @@ Matrix B:                           b_shared: (비슷한 레이아웃)
 
 - 전역 메모리 접근 횟수 감소
 - 공유 메모리를 통한 데이터 재사용
-- LayoutTensor의 효율적인 2D 인덱싱 활용
+- TileTensor의 효율적인 2D 인덱싱 활용
 - 적절한 스레드 동기화 유지
 
 </div>
diff --git a/book/i18n/ko/src/puzzle_16/tiled.md b/book/i18n/ko/src/puzzle_16/tiled.md
index ec297bfc..88158781 100644
--- a/book/i18n/ko/src/puzzle_16/tiled.md
+++ b/book/i18n/ko/src/puzzle_16/tiled.md
@@ -4,28 +4,28 @@
 
 ## 개요
 
-LayoutTensor를 사용한 타일링 행렬 곱셈으로 정방 행렬 \\(A\\) 와 \\(B\\) 를 곱하는 커널을 구현하세요. 큰 행렬을 작은 조각(타일)으로 나누어 처리하는 방식입니다.
+TileTensor를 사용한 타일링 행렬 곱셈으로 정방 행렬 \\(A\\) 와 \\(B\\) 를 곱하는 커널을 구현하세요. 큰 행렬을 작은 조각(타일)으로 나누어 처리하는 방식입니다.
 
 ## 핵심 개념
 
-- LayoutTensor를 사용한 행렬 타일링으로 효율적인 연산
+- TileTensor를 사용한 행렬 타일링으로 효율적인 연산
 - 적절한 레이아웃을 사용한 멀티 블록 조율
 - TensorBuilder를 통한 효율적인 공유 메모리 활용
-- LayoutTensor 인덱싱을 사용한 타일 경계 처리
+- TileTensor 인덱싱을 사용한 타일 경계 처리
 
 ## 구성
 
 - 행렬 크기: \\(\\text{SIZE\_TILED} = 9\\)
 - 블록당 스레드 수: \\(\\text{TPB} \times \\text{TPB} = 3 \times 3\\)
 - 그리드 차원: \\(3 \times 3\\) 블록
-- 공유 메모리: 블록당 \\(\\text{TPB} \times \\text{TPB}\\) LayoutTensor 2개
+- 공유 메모리: 블록당 \\(\\text{TPB} \times \\text{TPB}\\) TileTensor 2개
 
 레이아웃 구성:
 
-- 입력 A: `Layout.row_major(SIZE_TILED, SIZE_TILED)`
-- 입력 B: `Layout.row_major(SIZE_TILED, SIZE_TILED)`
-- 출력: `Layout.row_major(SIZE_TILED, SIZE_TILED)`
-- 공유 메모리: TensorBuilder를 사용한 `TPB × TPB` LayoutTensor 2개
+- 입력 A: `row_major[SIZE_TILED, SIZE_TILED]()`
+- 입력 B: `row_major[SIZE_TILED, SIZE_TILED]()`
+- 출력: `row_major[SIZE_TILED, SIZE_TILED]()`
+- 공유 메모리: TensorBuilder를 사용한 `TPB × TPB` TileTensor 2개
 
 ## 타일링 전략
 
@@ -37,7 +37,7 @@ Grid Layout (3×3):           Thread Layout per Block (3×3):
 [B10][B11][B12]               [T10 T11 T12]
 [B20][B21][B22]               [T20 T21 T22]
 
-각 블록은 LayoutTensor 인덱싱을 사용하여 하나의 타일을 처리
+각 블록은 TileTensor 인덱싱을 사용하여 하나의 타일을 처리
 ```
 
 ### 타일 처리 단계
@@ -318,7 +318,7 @@ expected: HostBuffer([3672.0, 3744.0, 3816.0, 3888.0, 3960.0, 4032.0, 4104.0, 41
 
 이 구현은 다음을 통해 높은 성능을 달성합니다:
 
-- LayoutTensor를 활용한 효율적인 메모리 접근
+- TileTensor를 활용한 효율적인 메모리 접근
 - 최적의 타일링 전략
 - 적절한 스레드 동기화
 - 세심한 경계 처리
@@ -326,7 +326,7 @@ expected: HostBuffer([3672.0, 3744.0, 3816.0, 3888.0, 3960.0, 4032.0, 4104.0, 41
 </div>
 </details>
 
-## 솔루션: 관용적 LayoutTensor 타일링
+## 솔루션: 관용적 TileTensor 타일링
 
 <details class="solution-details">
 <summary></summary>
@@ -337,14 +337,14 @@ expected: HostBuffer([3672.0, 3744.0, 3816.0, 3888.0, 3960.0, 4032.0, 4104.0, 41
 
 <div class="solution-explanation">
 
-관용적 타일링 행렬 곱셈은 Mojo의 LayoutTensor API와 비동기 메모리 연산을 활용하여 깔끔한 구현을 제공합니다.
+관용적 타일링 행렬 곱셈은 Mojo의 TileTensor API와 비동기 메모리 연산을 활용하여 깔끔한 구현을 제공합니다.
 
 **핵심 포인트: 이 구현은 두 행렬 모두 병합 로딩을 사용하여 표준 A × B 행렬 곱셈을 수행합니다.**
 
 **이 구현이 하는 것:**
 
 - **행렬 연산**: 표준 \\(A \times B\\) 곱셈 (\\(A \times B^T\\) 가 아님)
-- **로딩 패턴**: 두 행렬 모두 `Layout.row_major(1, TPB)`로 병합 접근
+- **로딩 패턴**: 두 행렬 모두 `row_major[1, TPB]()`로 병합 접근
 - **연산**: `acc += a_shared[local_row, k] * b_shared[k, local_col]`
 - **데이터 레이아웃**: 로딩 시 전치 없음 - 두 행렬을 같은 방향으로 로드
 
@@ -356,7 +356,7 @@ expected: HostBuffer([3672.0, 3744.0, 3816.0, 3888.0, 3960.0, 4032.0, 4104.0, 41
 
 \\((9 \times 9)\\) 행렬 크기에서는 완벽한 타일링이 이루어져 모든 경계 검사가 불필요합니다:
 
-1. **LayoutTensor 타일 API**
+1. **TileTensor 타일 API**
 
    ```mojo
    out_tile = output.tile[TPB, TPB](block_idx.y, block_idx.x)
@@ -364,7 +364,7 @@ expected: HostBuffer([3672.0, 3744.0, 3816.0, 3888.0, 3960.0, 4032.0, 4104.0, 41
    b_tile = b.tile[TPB, TPB](idx, block_idx.x)
    ```
 
-   수동 좌표 계산 없이 "(block_idx.y, block_idx.x) 위치의 타일을 가져온다"를 직접 표현합니다. 자세한 내용은 [문서](https://docs.modular.com/mojo/kernels/layout/layout_tensor/LayoutTensor/#tile)를 참고하세요.
+   수동 좌표 계산 없이 "(block_idx.y, block_idx.x) 위치의 타일을 가져온다"를 직접 표현합니다. 자세한 내용은 [문서](https://docs.modular.com/mojo/kernels/layout/tile_tensor/TileTensor/#tile)를 참고하세요.
 
 2. **비동기 메모리 연산**
 
@@ -395,14 +395,14 @@ expected: HostBuffer([3672.0, 3744.0, 3816.0, 3888.0, 3960.0, 4032.0, 4104.0, 41
 3. **최적화된 메모리 접근 레이아웃**
 
    ```mojo
-   comptime load_a_layout = Layout.row_major(1, TPB)    # 병합 로딩
-   comptime load_b_layout = Layout.row_major(1, TPB)    # 병합 로딩
+   comptime load_a_layout = row_major[1, TPB]()    # 병합 로딩
+   comptime load_b_layout = row_major[1, TPB]()    # 병합 로딩
    # 참고: 표준 A × B 곱셈에서 두 행렬 모두 같은 레이아웃을 사용
    ```
 
    **현재 구현의 메모리 접근 분석:**
 
-   두 행렬 모두 전역 메모리에서 병합 로딩을 위해 `Layout.row_major(1, TPB)`를 사용합니다:
+   두 행렬 모두 전역 메모리에서 병합 로딩을 위해 `row_major[1, TPB]()`를 사용합니다:
    - `load_a_layout`: 스레드들이 협력하여 행렬 A 행의 연속 원소를 로드
    - `load_b_layout`: 스레드들이 협력하여 행렬 B 행의 연속 원소를 로드
    - **핵심**: 스레드 레이아웃은 복사 시 스레드 간 협력 방식을 결정하며, 최종 데이터 레이아웃과는 별개입니다
@@ -424,11 +424,11 @@ expected: HostBuffer([3672.0, 3744.0, 3816.0, 3888.0, 3960.0, 4032.0, 4104.0, 41
    - Matrix A 타일: 스레드들이 A[block_row, k], A[block_row, k+1], A[block_row, k+2]... 로드 (연속)
    - Matrix B 타일: 스레드들이 B[k, block_col], B[k, block_col+1], B[k, block_col+2]... 로드 (연속)
 
-   Layout.row_major(1, TPB)로 두 패턴 모두 병합
+   row_major[1, TPB]()로 두 패턴 모두 병합
    ```
 
    **세 가지 별개의 메모리 고려사항:**
-   1. **전역→공유 병합**: `Layout.row_major(1, TPB)`로 병합 전역 메모리 접근 보장
+   1. **전역→공유 병합**: `row_major[1, TPB]()`로 병합 전역 메모리 접근 보장
    2. **공유 메모리 연산**: `a_shared[local_row, k] * b_shared[k, local_col]`로 뱅크 충돌 회피
    3. **행렬 연산**: 연산 패턴이 A × B를 결정 (A × B^T가 아님)
 
@@ -467,7 +467,7 @@ expected: HostBuffer([3672.0, 3744.0, 3816.0, 3888.0, 3960.0, 4032.0, 4104.0, 41
 
 | 기능 | 수동 Tiling | 관용적 Tiling |
 |---------|--------------|------------------|
-| 메모리 접근 | 경계 검사가 있는 직접 인덱싱 | LayoutTensor 타일 API |
+| 메모리 접근 | 경계 검사가 있는 직접 인덱싱 | TileTensor 타일 API |
 | 타일 로딩 | 원소별 명시적 복사 | 전용 복사 엔진의 벌크 전송 |
 | 공유 메모리 | 수동 초기화 (방어적) | 복사 함수가 관리 |
 | 코드 복잡도 | 명시적 인덱싱으로 다소 장황 | 고수준 API로 더 간결 |
@@ -483,7 +483,7 @@ expected: HostBuffer([3672.0, 3744.0, 3816.0, 3888.0, 3960.0, 4032.0, 4104.0, 41
 
 **현재 구현 요약:**
 
-- 두 행렬 모두 `Layout.row_major(1, TPB)` 사용
+- 두 행렬 모두 `row_major[1, TPB]()` 사용
 - 표준 A × B 곱셈 수행
 - 복사 중 데이터 전치 없음
 
@@ -494,8 +494,8 @@ expected: HostBuffer([3672.0, 3744.0, 3816.0, 3888.0, 3960.0, 4032.0, 4104.0, 41
 ```mojo
 # 예시: A × B를 계산하기 위해 사전 전치된 행렬 B^T를 로드
 # (현재 구현에서는 이렇게 하지 않음)
-comptime load_b_layout = Layout.row_major(TPB, 1)   # B^T를 병합 접근으로 로드
-comptime store_b_layout = Layout.row_major(1, TPB)  # 공유 메모리에 B로 저장
+comptime load_b_layout = row_major[TPB, 1]()   # B^T를 병합 접근으로 로드
+comptime store_b_layout = row_major[1, TPB]()  # 공유 메모리에 B로 저장
 copy_dram_to_sram_async[src_thread_layout=load_b_layout, dst_thread_layout=store_b_layout](b_shared, b_tile)
 ```
 
@@ -508,7 +508,7 @@ copy_dram_to_sram_async[src_thread_layout=load_b_layout, dst_thread_layout=store
 
 **핵심 구분:**
 
-- **현재 구현**: 두 행렬 모두 표준 \\(A \times B\\) 곱셈에 `Layout.row_major(1, TPB)` 사용
+- **현재 구현**: 두 행렬 모두 표준 \\(A \times B\\) 곱셈에 `row_major[1, TPB]()` 사용
 - **전치 로딩 예시**: 이미 전치된 데이터나 다른 행렬 연산을 처리할 때 다른 레이아웃 사용
 
 이것은 Mojo의 철학을 보여줍니다: 일반적인 경우에 고수준 추상화를 유지하면서도, 필요할 때 저수준 제어를 제공합니다.
@@ -520,13 +520,13 @@ copy_dram_to_sram_async[src_thread_layout=load_b_layout, dst_thread_layout=store
 **관용적 타일링 구현이 실제로 하는 것:**
 
 1. **행렬 연산**: 표준 A × B 곱셈
-2. **메모리 로딩**: 두 행렬 모두 `Layout.row_major(1, TPB)`로 병합 접근
+2. **메모리 로딩**: 두 행렬 모두 `row_major[1, TPB]()`로 병합 접근
 3. **연산 패턴**: `acc += a_shared[local_row, k] * b_shared[k, local_col]`
 4. **데이터 레이아웃**: 로딩 시 전치 없음
 
 **이것이 최적인 이유:**
 
-- **병합 전역 메모리 접근**: `Layout.row_major(1, TPB)`로 효율적인 로딩 보장
+- **병합 전역 메모리 접근**: `row_major[1, TPB]()`로 효율적인 로딩 보장
 - **뱅크 충돌 회피**: 공유 메모리 접근 패턴이 충돌을 방지
 - **표준 알고리즘**: 가장 일반적인 행렬 곱셈 패턴을 구현
 
diff --git a/book/i18n/ko/src/puzzle_17/puzzle_17.md b/book/i18n/ko/src/puzzle_17/puzzle_17.md
index 6095c119..d3d6b0cd 100644
--- a/book/i18n/ko/src/puzzle_17/puzzle_17.md
+++ b/book/i18n/ko/src/puzzle_17/puzzle_17.md
@@ -143,7 +143,7 @@ Verification passed: Custom kernel results match NumPy calculation
 3. **커스텀 op 등록**:
    - `@compiler.register("conv1d")` 데코레이터가 연산을 MAX 그래프에 노출. [@compiler.register](https://docs.modular.com/mojo/manual/decorators/compiler-register/) 참고
    - `execute` 메서드의 파라미터가 인터페이스(입력, 출력, 컨텍스트) 정의
-   - 입출력 텐서가 커널에서 사용할 수 있도록 LayoutTensor로 변환
+   - 입출력 텐서가 커널에서 사용할 수 있도록 TileTensor로 변환
    - Device context가 GPU 메모리 할당과 커널 실행 관리
 
 4. **커널 실행**:
@@ -182,7 +182,7 @@ Verification passed: Custom kernel results match NumPy calculation
    kernel_tensor = kernel.to_layout_tensor()
    ```
 
-   - MAX 그래프 텐서를 Mojo LayoutTensor로 변환
+   - MAX 그래프 텐서를 Mojo TileTensor로 변환
    - 커널이 텐서를 직접 다룰 수 있게 해줌
    - 컴파일 타임 최적화를 위해 레이아웃 추출
 
diff --git a/book/i18n/ko/src/puzzle_18/puzzle_18.md b/book/i18n/ko/src/puzzle_18/puzzle_18.md
index 3e5d71f3..4b9fa15b 100644
--- a/book/i18n/ko/src/puzzle_18/puzzle_18.md
+++ b/book/i18n/ko/src/puzzle_18/puzzle_18.md
@@ -44,8 +44,8 @@ GPU 구현에서는 최댓값 찾기와 지수 합 계산 모두에 병렬 리
 
 레이아웃 설정:
 
-- 입력 텐서: `Layout.row_major(SIZE)`
-- 출력 텐서: `Layout.row_major(SIZE)`
+- 입력 텐서: `row_major[SIZE]()`
+- 출력 텐서: `row_major[SIZE]()`
 - 커스텀 op 파라미터: `{"input_size": input_tensor.shape[0]}`
 
 이 퍼즐의 핵심 요소는 다음과 같습니다:
@@ -259,8 +259,8 @@ def softmax_gpu_kernel[
     input_size: Int,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[mut=True, dtype, layout],
-    input: LayoutTensor[mut=False, dtype, layout],
+    output: TileTensor[mut=True, dtype, layout],
+    input: TileTensor[mut=False, dtype, layout],
 )
 ```
 
@@ -275,8 +275,8 @@ def softmax_gpu_kernel[
 #### 공유 메모리 할당
 
 ```mojo
-shared_max = LayoutTensor[dtype, Layout.row_major(BLOCK_DIM_X), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
-shared_sum = LayoutTensor[dtype, Layout.row_major(BLOCK_DIM_X), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
+shared_max = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[BLOCK_DIM_X]())
+shared_sum = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[BLOCK_DIM_X]())
 ```
 
 커널은 두 개의 공유 메모리 버퍼를 할당합니다:
diff --git a/book/i18n/ko/src/puzzle_19/puzzle_19.md b/book/i18n/ko/src/puzzle_19/puzzle_19.md
index 9957a39c..1673b32e 100644
--- a/book/i18n/ko/src/puzzle_19/puzzle_19.md
+++ b/book/i18n/ko/src/puzzle_19/puzzle_19.md
@@ -83,10 +83,10 @@ GPU 구현은 **이전 퍼즐에서 최적화된 커널들을 재사용하고 
 
 레이아웃 설정:
 
-- 쿼리 텐서: `Layout.row_major(d)`
-- 키 텐서: `Layout.row_major(seq_len, d)`
-- 값 텐서: `Layout.row_major(seq_len, d)`
-- 출력 텐서: `Layout.row_major(d)`
+- 쿼리 텐서: `row_major[d]()`
+- 키 텐서: `row_major[seq_len, d]()`
+- 값 텐서: `row_major[seq_len, d]()`
+- 출력 텐서: `row_major[d]()`
 - 커스텀 op 파라미터: `{"seq_len": seq_len, "d": d, "dtype": dtype}`
 
 이 퍼즐의 핵심 요소는 다음과 같습니다:
@@ -123,7 +123,7 @@ GPU 구현은 **이전 퍼즐에서 최적화된 커널들을 재사용하고 
 
 **전치 커널 구현 가이드:**
 
-1. **공유 메모리 설정**: `LayoutTensor[dtype, Layout.row_major(TRANSPOSE_BLOCK_DIM_XY, TRANSPOSE_BLOCK_DIM_XY), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()`을 사용하여 `TRANSPOSE_BLOCK_DIM_XY` × `TRANSPOSE_BLOCK_DIM_XY` 크기의 정사각형 공유 메모리 타일을 생성합니다. 이를 통해 스레드 간 효율적인 데이터 교환이 가능합니다.
+1. **공유 메모리 설정**: `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TRANSPOSE_BLOCK_DIM_XY, TRANSPOSE_BLOCK_DIM_XY]())`을 사용하여 `TRANSPOSE_BLOCK_DIM_XY` × `TRANSPOSE_BLOCK_DIM_XY` 크기의 정사각형 공유 메모리 타일을 생성합니다. 이를 통해 스레드 간 효율적인 데이터 교환이 가능합니다.
 
 2. **스레드 인덱싱**: 스레드를 행렬 요소에 매핑합니다:
    - `local_row = thread_idx.y`, `local_col = thread_idx.x` (블록 내 위치)
diff --git a/book/i18n/ko/src/puzzle_23/elementwise.md b/book/i18n/ko/src/puzzle_23/elementwise.md
index 14c88253..ec223236 100644
--- a/book/i18n/ko/src/puzzle_23/elementwise.md
+++ b/book/i18n/ko/src/puzzle_23/elementwise.md
@@ -12,7 +12,7 @@
 
 - `elementwise`를 활용한 **함수형 GPU 프로그래밍**
 - GPU 스레드 내의 **자동 SIMD 벡터화**
-- 안전한 메모리 접근을 위한 **LayoutTensor 연산**
+- 안전한 메모리 접근을 위한 **TileTensor 연산**
 - **GPU 스레드 계층 구조** vs SIMD 연산
 - 중첩 함수에서의 **캡처 의미론**
 
@@ -26,7 +26,7 @@
 - 벡터 크기: `SIZE = 1024`
 - 데이터 타입: `DType.float32`
 - SIMD 폭: 타겟 의존적 (GPU 아키텍처와 데이터 타입에 따라 결정)
-- 레이아웃: `Layout.row_major(SIZE)` (1D 행 우선)
+- 레이아웃: `row_major[SIZE]()` (1D 행 우선)
 
 ## 완성할 코드
 
diff --git a/book/i18n/ko/src/puzzle_23/puzzle_23.md b/book/i18n/ko/src/puzzle_23/puzzle_23.md
index e2764486..4a57fb24 100644
--- a/book/i18n/ko/src/puzzle_23/puzzle_23.md
+++ b/book/i18n/ko/src/puzzle_23/puzzle_23.md
@@ -73,7 +73,7 @@ vectorized:         13.38ms  ← 자동 최적화 오버헤드
 
 - **기본 GPU 개념**: 메모리 계층 구조, 스레드 실행, SIMD 연산
 - **Mojo 기초**: 파라미터 함수, 컴파일 타임 특수화, 캡처 의미론
-- **LayoutTensor 연산**: 로드, 저장, 텐서 조작
+- **TileTensor 연산**: 로드, 저장, 텐서 조작
 - **GPU 메모리 관리**: 버퍼 할당, 호스트-디바이스 동기화
 
 ## 학습 경로
@@ -88,7 +88,7 @@ vectorized:         13.38ms  ← 자동 최적화 오버헤드
 
 - `elementwise`를 활용한 함수형 GPU 프로그래밍
 - GPU 스레드 내의 자동 SIMD 벡터화
-- 안전한 메모리 접근을 위한 LayoutTensor 연산
+- 안전한 메모리 접근을 위한 TileTensor 연산
 - 중첩 함수에서의 캡처 의미론
 
 **핵심 패턴:**
diff --git a/book/i18n/ko/src/puzzle_23/tile.md b/book/i18n/ko/src/puzzle_23/tile.md
index 3f828604..ad7cc70d 100644
--- a/book/i18n/ko/src/puzzle_23/tile.md
+++ b/book/i18n/ko/src/puzzle_23/tile.md
@@ -33,7 +33,7 @@ Mojo의 타일링 방식을 사용하여 동일한 벡터 덧셈 연산을 구
 - 타일 크기: `TILE_SIZE = 32`
 - 데이터 타입: `DType.float32`
 - SIMD 폭: GPU 의존적 (타일 내 연산용)
-- 레이아웃: `Layout.row_major(SIZE)` (1D 행 우선)
+- 레이아웃: `row_major[SIZE]()` (1D 행 우선)
 
 ## 완성할 코드
 
@@ -60,7 +60,7 @@ num_tiles = (size + tile_size - 1) // tile_size  # 올림 나눗셈
 
 ### 2. **타일 추출 패턴**
 
-[LayoutTensor `.tile` 문서](https://docs.modular.com/mojo/kernels/layout/layout_tensor/LayoutTensor/#tile)를 참고하세요.
+[TileTensor `.tile` 문서](https://docs.modular.com/mojo/kernels/layout/tile_tensor/TileTensor/#tile)를 참고하세요.
 
 ```mojo
 tile_id = indices[0]  # 각 스레드가 처리할 타일 하나를 받음
diff --git a/book/i18n/ko/src/puzzle_23/vectorize.md b/book/i18n/ko/src/puzzle_23/vectorize.md
index f0d6d19c..f80957dc 100644
--- a/book/i18n/ko/src/puzzle_23/vectorize.md
+++ b/book/i18n/ko/src/puzzle_23/vectorize.md
@@ -34,7 +34,7 @@
 - 타일 크기: `TILE_SIZE = 32`
 - 데이터 타입: `DType.float32`
 - SIMD 폭: GPU 의존적
-- 레이아웃: `Layout.row_major(SIZE)` (1D 행 우선)
+- 레이아웃: `row_major[SIZE]()` (1D 행 우선)
 
 ## 1. 수동 벡터화 방식
 
diff --git a/book/i18n/ko/src/puzzle_24/puzzle_24.md b/book/i18n/ko/src/puzzle_24/puzzle_24.md
index d68652ec..2ae13f47 100644
--- a/book/i18n/ko/src/puzzle_24/puzzle_24.md
+++ b/book/i18n/ko/src/puzzle_24/puzzle_24.md
@@ -51,9 +51,9 @@ GPU 블록 (예: 256 스레드)
 ```mojo
 # 1. 공유 메모리를 통한 리덕션
 # 앞서 살펴본 복잡한 패턴 (p12.mojo):
-shared = LayoutTensor[
+shared = TileTensor[
     dtype,
-    Layout.row_major(WARP_SIZE),
+    row_major[WARP_SIZE](),
     MutAnyOrigin,
     address_space = AddressSpace.SHARED,
 ].stack_allocation()
@@ -95,7 +95,7 @@ total = sum(partial_product)  # 내부적으로 배리어도, 경쟁 상태도 
 
 - **Part VI 함수형 패턴**: elementwise, tiled, vectorize 접근 방식
 - **GPU 스레드 계층 구조**: 블록, 워프, 스레드에 대한 이해
-- **LayoutTensor 연산**: 로드, 저장, 텐서 조작
+- **TileTensor 연산**: 로드, 저장, 텐서 조작
 - **공유 메모리 개념**: 배리어와 트리 리덕션이 왜 복잡한지
 
 ## 학습 경로
diff --git a/book/i18n/ko/src/puzzle_24/warp_sum.md b/book/i18n/ko/src/puzzle_24/warp_sum.md
index b0e5cac1..b635fa95 100644
--- a/book/i18n/ko/src/puzzle_24/warp_sum.md
+++ b/book/i18n/ko/src/puzzle_24/warp_sum.md
@@ -27,7 +27,7 @@
 - 데이터 타입: `DType.float32`
 - 블록 구성: `(WARP_SIZE, 1)` 블록당 스레드 수
 - 그리드 구성: `(1, 1)` 그리드당 블록 수
-- 레이아웃: `Layout.row_major(SIZE)` (1D 행 우선)
+- 레이아웃: `row_major[SIZE]()` (1D 행 우선)
 
 ## 기존 방식의 복잡성 (Puzzle 12에서)
 
diff --git a/book/i18n/ko/src/puzzle_25/puzzle_25.md b/book/i18n/ko/src/puzzle_25/puzzle_25.md
index c5c4f397..b57819da 100644
--- a/book/i18n/ko/src/puzzle_25/puzzle_25.md
+++ b/book/i18n/ko/src/puzzle_25/puzzle_25.md
@@ -50,9 +50,9 @@ GPU 워프 (32 스레드, SIMT 록스텝 실행)
 
 ```mojo
 # 복잡한 이웃 접근 패턴 (기존 방식):
-shared = LayoutTensor[
+shared = TileTensor[
     dtype,
-    Layout.row_major(WARP_SIZE),
+    row_major[WARP_SIZE](),
     MutAnyOrigin,
     address_space = AddressSpace.SHARED,
 ].stack_allocation()
@@ -91,7 +91,7 @@ else:
 
 - **Part VII 워프 기초**: SIMT 실행과 기본 워프 연산에 대한 이해 ([Puzzle 24: 워프 기초](../puzzle_24/puzzle_24.md) 참고)
 - **GPU 스레드 계층 구조**: 블록, 워프, 레인 번호 매기기
-- **LayoutTensor 연산**: 로드, 저장, 텐서 조작
+- **TileTensor 연산**: 로드, 저장, 텐서 조작
 - **경계 조건 처리**: 병렬 알고리즘의 가장자리 케이스 관리
 
 ## 학습 경로
diff --git a/book/i18n/ko/src/puzzle_25/warp_broadcast.md b/book/i18n/ko/src/puzzle_25/warp_broadcast.md
index 17386452..49672ad2 100644
--- a/book/i18n/ko/src/puzzle_25/warp_broadcast.md
+++ b/book/i18n/ko/src/puzzle_25/warp_broadcast.md
@@ -82,7 +82,7 @@ result = use_collective_value(collective_value)
 - 그리드 구성: `(1, 1)` 그리드당 블록 수
 - 블록 구성: `(WARP_SIZE, 1)` 블록당 스레드 수
 - 데이터 타입: `DType.float32`
-- 레이아웃: `Layout.row_major(SIZE)` (1D row-major)
+- 레이아웃: `row_major[SIZE]()` (1D row-major)
 
 ### 완성할 코드
 
diff --git a/book/i18n/ko/src/puzzle_25/warp_shuffle_down.md b/book/i18n/ko/src/puzzle_25/warp_shuffle_down.md
index b9f0e906..108f73ee 100644
--- a/book/i18n/ko/src/puzzle_25/warp_shuffle_down.md
+++ b/book/i18n/ko/src/puzzle_25/warp_shuffle_down.md
@@ -31,7 +31,7 @@
 - 그리드 구성: `(1, 1)` 그리드당 블록 수
 - 블록 구성: `(WARP_SIZE, 1)` 블록당 스레드 수
 - 데이터 타입: `DType.float32`
-- 레이아웃: `Layout.row_major(SIZE)` (1D row-major)
+- 레이아웃: `row_major[SIZE]()` (1D row-major)
 
 ### shuffle_down 개념
 
diff --git a/book/i18n/ko/src/puzzle_26/puzzle_26.md b/book/i18n/ko/src/puzzle_26/puzzle_26.md
index 0f79af92..e44d00e7 100644
--- a/book/i18n/ko/src/puzzle_26/puzzle_26.md
+++ b/book/i18n/ko/src/puzzle_26/puzzle_26.md
@@ -50,9 +50,9 @@ Offset 1:  Lane 0 ↔ Lane 1,  Lane 2 ↔ Lane 3,  ..., Lane 30 ↔ Lane 31
 
 ```mojo
 # 복잡한 병렬 리덕션 (기존 방식 - Puzzle 14 참고):
-shared = LayoutTensor[
+shared = TileTensor[
     dtype,
-    Layout.row_major(WARP_SIZE),
+    row_major[WARP_SIZE](),
     MutAnyOrigin,
     address_space = AddressSpace.SHARED,
 ].stack_allocation()
diff --git a/book/i18n/ko/src/puzzle_26/warp_prefix_sum.md b/book/i18n/ko/src/puzzle_26/warp_prefix_sum.md
index 0eb81776..961b50a4 100644
--- a/book/i18n/ko/src/puzzle_26/warp_prefix_sum.md
+++ b/book/i18n/ko/src/puzzle_26/warp_prefix_sum.md
@@ -28,7 +28,7 @@
 - 그리드 구성: `(1, 1)` 그리드당 블록 수
 - 블록 구성: `(WARP_SIZE, 1)` 블록당 스레드 수
 - 데이터 타입: `DType.float32`
-- 레이아웃: `Layout.row_major(SIZE)` (1D row-major)
+- 레이아웃: `row_major[SIZE]()` (1D row-major)
 
 ### prefix_sum의 이점
 
diff --git a/book/i18n/ko/src/puzzle_26/warp_shuffle_xor.md b/book/i18n/ko/src/puzzle_26/warp_shuffle_xor.md
index 7aa21e6c..638f8966 100644
--- a/book/i18n/ko/src/puzzle_26/warp_shuffle_xor.md
+++ b/book/i18n/ko/src/puzzle_26/warp_shuffle_xor.md
@@ -31,7 +31,7 @@
 - 그리드 구성: `(1, 1)` 그리드당 블록 수
 - 블록 구성: `(WARP_SIZE, 1)` 블록당 스레드 수
 - 데이터 타입: `DType.float32`
-- 레이아웃: `Layout.row_major(SIZE)` (1D row-major)
+- 레이아웃: `row_major[SIZE]()` (1D row-major)
 
 ### shuffle_xor 개념
 
diff --git a/book/i18n/ko/src/puzzle_27/block_broadcast.md b/book/i18n/ko/src/puzzle_27/block_broadcast.md
index 8f0fbffe..31474e02 100644
--- a/book/i18n/ko/src/puzzle_27/block_broadcast.md
+++ b/book/i18n/ko/src/puzzle_27/block_broadcast.md
@@ -27,7 +27,7 @@
 - 데이터 타입: `DType.float32`
 - 블록 구성: `(128, 1)` 블록당 스레드 수 (`TPB = 128`)
 - 그리드 구성: `(1, 1)` 그리드당 블록 수
-- 레이아웃: `Layout.row_major(SIZE)` (입력과 출력 모두 1D row-major)
+- 레이아웃: `row_major[SIZE]()` (입력과 출력 모두 1D row-major)
 - 테스트 데이터: 1-8 반복 값, 평균 = 4.5
 - 예상 출력: 평균이 1.0인 정규화된 벡터
 
@@ -102,7 +102,7 @@ output[global_i] = my_value / mean
 
 ### 2. **데이터 로딩과 합계 계산 (익숙한 패턴)**
 
-기존 LayoutTensor 패턴으로 요소를 로드합니다:
+기존 TileTensor 패턴으로 요소를 로드합니다:
 
 ```mojo
 var my_value: Scalar[dtype] = 0.0
@@ -257,7 +257,7 @@ Output mean: 1.0
   global_i = block_dim.x * block_idx.x + thread_idx.x  // 입력 배열 위치에 매핑
   local_i = thread_idx.x                              // 블록 내 위치 (0-127)
 
-LayoutTensor 패턴을 사용한 병렬 요소 로딩:
+TileTensor 패턴을 사용한 병렬 요소 로딩:
   스레드 0:   my_value = input_data[0][0] = 1.0    // 첫 번째 순환 값
   스레드 1:   my_value = input_data[1][0] = 2.0    // 두 번째 순환 값
   스레드 7:   my_value = input_data[7][0] = 8.0    // 마지막 순환 값
@@ -375,10 +375,10 @@ block.broadcast() 실행 후:
 알고리즘이 증명 가능하게 올바른 수학적 결과를 생성합니다.
 ```
 
-### **[Puzzle 12](../puzzle_12/layout_tensor.md) (기초 패턴)과의 연결:**
+### **[Puzzle 12](../puzzle_12/tile_tensor.md) (기초 패턴)과의 연결:**
 
 - **스레드 조율의 진화**: 동일한 `global_i`, `local_i` 패턴이지만 블록 기본 요소 사용
-- **메모리 접근 패턴**: 동일한 LayoutTensor SIMD 추출 `[0]`이지만 최적화된 워크플로우
+- **메모리 접근 패턴**: 동일한 TileTensor SIMD 추출 `[0]`이지만 최적화된 워크플로우
 - **복잡성 제거**: 20줄 이상의 수동 배리어를 2개의 블록 연산으로 대체
 - **교육적 진행**: 수동 → 자동, 복잡 → 단순, 오류 발생 가능 → 신뢰성
 
@@ -457,7 +457,7 @@ block.broadcast() 실행 후:
 
 **완전한 블록 연산 진행:**
 
-1. **수동 조율** ([Puzzle 12](../puzzle_12/layout_tensor.md)): 병렬 기초 이해
+1. **수동 조율** ([Puzzle 12](../puzzle_12/tile_tensor.md)): 병렬 기초 이해
 2. **워프 기본 요소** ([Puzzle 24](../puzzle_24/warp_sum.md)): 하드웨어 가속 패턴 학습
 3. **블록 리덕션** ([`block.sum()`](./block_sum.md)): 전체→하나 통신 학습
 4. **블록 스캔** ([`block.prefix_sum()`](./block_prefix_sum.md)): 전체→각각 통신 학습
diff --git a/book/i18n/ko/src/puzzle_27/block_prefix_sum.md b/book/i18n/ko/src/puzzle_27/block_prefix_sum.md
index b3b8c469..cbfcaceb 100644
--- a/book/i18n/ko/src/puzzle_27/block_prefix_sum.md
+++ b/book/i18n/ko/src/puzzle_27/block_prefix_sum.md
@@ -28,7 +28,7 @@
 - 블록 구성: `(128, 1)` 블록당 스레드 수 (`TPB = 128`)
 - 그리드 구성: `(1, 1)` 그리드당 블록 수
 - 구간 수: `NUM_BINS = 8` (범위 [0.0, 0.125), [0.125, 0.25) 등)
-- 레이아웃: `Layout.row_major(SIZE)` (1D row-major)
+- 레이아웃: `row_major[SIZE]()` (1D row-major)
 - 블록당 워프 수: `128 / WARP_SIZE` (GPU에 따라 2개 또는 4개)
 
 ## 도전 과제: 병렬 구간 추출
@@ -134,7 +134,7 @@ if belongs_to_target == 1:
     bin_output[Int(offset[0])] = my_value  # 인덱싱을 위해 SIMD를 Int로 변환
 ```
 
-이것은 [Puzzle 12](../puzzle_12/layout_tensor.md)의 경계 검사 패턴과 동일하지만, 조건이 "대상 구간에 속하는지"로 바뀌었습니다.
+이것은 [Puzzle 12](../puzzle_12/tile_tensor.md)의 경계 검사 패턴과 동일하지만, 조건이 "대상 구간에 속하는지"로 바뀌었습니다.
 
 ### 6. **최종 개수 계산**
 
@@ -152,7 +152,7 @@ if local_i == tpb - 1:  # 블록의 마지막 스레드
 
 이전 퍼즐의 패턴을 기억하세요:
 
-- `LayoutTensor` 인덱싱은 SIMD를 반환: `input_data[i][0]`
+- `TileTensor` 인덱싱은 SIMD를 반환: `input_data[i][0]`
 - `block.prefix_sum()`은 SIMD를 반환: `offset[0]`으로 추출
 - 배열 인덱싱은 `Int`가 필요: `bin_output[...]`에 `Int(offset[0])`
 
@@ -254,14 +254,14 @@ Bin 7 extracted elements:
 
 ## **단계별 알고리즘 분석:**
 
-### **1단계: 요소 처리 ([Puzzle 12](../puzzle_12/layout_tensor.md) 내적과 유사)**
+### **1단계: 요소 처리 ([Puzzle 12](../puzzle_12/tile_tensor.md) 내적과 유사)**
 
 ```
 스레드 인덱싱 (익숙한 패턴):
   global_i = block_dim.x * block_idx.x + thread_idx.x  // 전역 요소 인덱스
   local_i = thread_idx.x                               // 로컬 스레드 인덱스
 
-요소 로딩 (LayoutTensor 패턴과 동일):
+요소 로딩 (TileTensor 패턴과 동일):
   스레드 0:  my_value = input_data[0][0] = 0.00
   스레드 1:  my_value = input_data[1][0] = 0.01
   스레드 13: my_value = input_data[13][0] = 0.13
@@ -330,11 +330,11 @@ belongs_to_target=1인 스레드만 기록:
 
 ## **이 고급 알고리즘이 동작하는 이유:**
 
-### **[Puzzle 12](../puzzle_12/layout_tensor.md) (기존 내적)과의 연결:**
+### **[Puzzle 12](../puzzle_12/tile_tensor.md) (기존 내적)과의 연결:**
 
 - **동일한 스레드 인덱싱**: `global_i`와 `local_i` 패턴
 - **동일한 경계 검사**: `if global_i < size` 검증
-- **동일한 데이터 로딩**: `[0]`을 사용한 LayoutTensor SIMD 추출
+- **동일한 데이터 로딩**: `[0]`을 사용한 TileTensor SIMD 추출
 
 ### **[`block.sum()`](./block_sum.md) (이 퍼즐의 앞부분)과의 연결:**
 
diff --git a/book/i18n/ko/src/puzzle_27/block_sum.md b/book/i18n/ko/src/puzzle_27/block_sum.md
index d1da7eaf..da3c945d 100644
--- a/book/i18n/ko/src/puzzle_27/block_sum.md
+++ b/book/i18n/ko/src/puzzle_27/block_sum.md
@@ -27,12 +27,12 @@
 - 데이터 타입: `DType.float32`
 - 블록 구성: `(128, 1)` 블록당 스레드 수 (`TPB = 128`)
 - 그리드 구성: `(1, 1)` 그리드당 블록 수
-- 레이아웃: `Layout.row_major(SIZE)` (1D row-major)
+- 레이아웃: `row_major[SIZE]()` (1D row-major)
 - 블록당 워프 수: `128 / WARP_SIZE` (NVIDIA에서 4개, AMD에서 2개 또는 4개)
 
 ## 기존 방식의 복잡성 (Puzzle 12에서)
 
-[Puzzle 12](../puzzle_12/layout_tensor.md)의 복잡한 방식을 떠올려 봅시다. 공유 메모리, 배리어, 트리 리덕션이 필요했습니다:
+[Puzzle 12](../puzzle_12/tile_tensor.md)의 복잡한 방식을 떠올려 봅시다. 공유 메모리, 배리어, 트리 리덕션이 필요했습니다:
 
 ```mojo
 {{#include ../../../../../solutions/p27/p27.mojo:traditional_dot_product_solution}}
@@ -173,9 +173,9 @@ Just like warp.sum() but for the entire block
 
 각 스레드는 벡터 `a`와 `b`에서 하나의 요소 쌍을 처리해야 합니다. 이들을 스레드 간에 합산할 수 있는 "부분 결과"로 합치는 연산은 무엇일까요?
 
-### 3. **LayoutTensor 인덱싱 패턴**
+### 3. **TileTensor 인덱싱 패턴**
 
-`LayoutTensor` 요소에 접근할 때, 인덱싱이 SIMD 값을 반환한다는 점을 기억하세요. 산술 연산을 위해 스칼라 값을 추출해야 합니다.
+`TileTensor` 요소에 접근할 때, 인덱싱이 SIMD 값을 반환한다는 점을 기억하세요. 산술 연산을 위해 스칼라 값을 추출해야 합니다.
 
 ### 4. **[block.sum()](https://docs.modular.com/mojo/std/gpu/primitives/block/sum) API 개념**
 
diff --git a/book/i18n/ko/src/puzzle_28/puzzle_28.md b/book/i18n/ko/src/puzzle_28/puzzle_28.md
index 2be71f31..89021720 100644
--- a/book/i18n/ko/src/puzzle_28/puzzle_28.md
+++ b/book/i18n/ko/src/puzzle_28/puzzle_28.md
@@ -164,7 +164,7 @@ wait_and_compute()    # ← 나머지 ~400 사이클만 대기 후 연산
 - 그리드 구성: 그리드당 `(VECTOR_SIZE // CONV_TILE_SIZE, 1)` 블록 (64개 블록)
 - 커널 크기: `KERNEL_SIZE = 5` (Puzzle 13과 동일한 간단한 1D 합성곱)
 - 데이터 타입: `DType.float32`
-- 레이아웃: `Layout.row_major(VECTOR_SIZE)` (1D row-major)
+- 레이아웃: `row_major[VECTOR_SIZE]()` (1D row-major)
 
 ### 비동기 복사의 기회
 
@@ -327,13 +327,13 @@ uv run poe p28
 ```mojo
 # Phase 1: Launch async copy for input tile
 input_tile = input.tile[CONV_TILE_SIZE](block_idx.x)
-comptime load_layout = Layout.row_major(THREADS_PER_BLOCK_ASYNC)
+comptime load_layout = row_major[THREADS_PER_BLOCK_ASYNC]()
 copy_dram_to_sram_async[thread_layout=load_layout](input_shared, input_tile)
 ```
 
-- **타일 생성**: `input.tile[CONV_TILE_SIZE](block_idx.x)`는 `block_idx.x * 256`에서 시작하는 256개 요소의 입력 배열 뷰를 생성합니다. Mojo의 [`tile` 메서드](https://docs.modular.com/mojo/kernels/layout/layout_tensor/LayoutTensor/#tile)는 경계 검사나 제로 패딩을 **수행하지 않습니다**. 범위를 벗어난 인덱스 접근은 미정의 동작을 초래합니다. 구현에서 타일 크기와 offset이 유효한 배열 범위 내에 있는지 확인해야 합니다.
+- **타일 생성**: `input.tile[CONV_TILE_SIZE](block_idx.x)`는 `block_idx.x * 256`에서 시작하는 256개 요소의 입력 배열 뷰를 생성합니다. Mojo의 [`tile` 메서드](https://docs.modular.com/mojo/kernels/layout/tile_tensor/TileTensor/#tile)는 경계 검사나 제로 패딩을 **수행하지 않습니다**. 범위를 벗어난 인덱스 접근은 미정의 동작을 초래합니다. 구현에서 타일 크기와 offset이 유효한 배열 범위 내에 있는지 확인해야 합니다.
 
-- **스레드 레이아웃**: `Layout.row_major(THREADS_PER_BLOCK_ASYNC, 1)`는 블록 구성과 일치하는 `256 x 1` 레이아웃을 생성합니다. 이것은 **필수**입니다 - 최적의 병합된 메모리 접근을 위해 레이아웃이 물리적 스레드 배치와 일치해야 합니다. 레이아웃이 일치하지 않으면 스레드가 비연속적인 메모리 주소에 접근하여 병합이 깨지고 성능이 심각하게 저하됩니다.
+- **스레드 레이아웃**: `row_major[THREADS_PER_BLOCK_ASYNC, 1]()`는 블록 구성과 일치하는 `256 x 1` 레이아웃을 생성합니다. 이것은 **필수**입니다 - 최적의 병합된 메모리 접근을 위해 레이아웃이 물리적 스레드 배치와 일치해야 합니다. 레이아웃이 일치하지 않으면 스레드가 비연속적인 메모리 주소에 접근하여 병합이 깨지고 성능이 심각하게 저하됩니다.
 
 - **비동기 복사 시작**: `copy_dram_to_sram_async`는 DRAM에서 공유 메모리로의 백그라운드 전송을 시작합니다. 하드웨어가 256개의 float(1KB)를 복사하는 동안 블록은 계속 실행됩니다.
 
@@ -412,7 +412,7 @@ Total Time = MAX(Input_Transfer_Time, Kernel_Transfer_Time) + Compute_Time
 
 #### **핵심 기술적 통찰**
 
-1. **스레드 레이아웃 매칭**: `Layout.row_major(256, 1)` 레이아웃이 블록의 `(256, 1)` 스레드 구성과 정확히 일치하여 최적의 메모리 병합을 가능하게 합니다.
+1. **스레드 레이아웃 매칭**: `row_major[256, 1]()` 레이아웃이 블록의 `(256, 1)` 스레드 구성과 정확히 일치하여 최적의 메모리 병합을 가능하게 합니다.
 
 2. **경쟁 상태 방지**: 적절한 순서 지정(비동기 복사 → 커널 로드 → 대기 → 배리어 → 연산)으로 공유 메모리를 손상시킬 수 있는 모든 경쟁 상태를 제거합니다.
 
diff --git a/book/i18n/ko/src/puzzle_32/conflict_free_patterns.md b/book/i18n/ko/src/puzzle_32/conflict_free_patterns.md
index dc2972bd..5dc47afa 100644
--- a/book/i18n/ko/src/puzzle_32/conflict_free_patterns.md
+++ b/book/i18n/ko/src/puzzle_32/conflict_free_patterns.md
@@ -356,7 +356,7 @@ constant = shared[0]  # All threads read same address - hardware optimized
 **3. 패딩 기법:**
 
 ```mojo
-shared = LayoutTensor[dtype, Layout.row_major(TPB + 1), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()  # Shift access patterns
+shared = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB + 1]())  # Shift access patterns
 ```
 
 **4. 접근 패턴 분석:**
diff --git a/book/i18n/ko/src/puzzle_33/puzzle_33.md b/book/i18n/ko/src/puzzle_33/puzzle_33.md
index a730eb0b..4912e19e 100644
--- a/book/i18n/ko/src/puzzle_33/puzzle_33.md
+++ b/book/i18n/ko/src/puzzle_33/puzzle_33.md
@@ -178,9 +178,9 @@ Total: 4×2 = 8 warps, each handling 32×32 output region
 
 레이아웃 설정:
 
-- 입력 A: `Layout.row_major(SIZE, SIZE)`
-- 입력 B: `Layout.row_major(SIZE, SIZE)`
-- 출력 C: `Layout.row_major(SIZE, SIZE)`
+- 입력 A: `row_major[SIZE, SIZE]()`
+- 입력 B: `row_major[SIZE, SIZE]()`
+- 출력 C: `row_major[SIZE, SIZE]()`
 - 공유 메모리: 비동기 복사 연산을 사용하는 블록 크기 타일
 
 ## 도전 과제
diff --git a/book/i18n/ko/src/puzzle_34/advanced_cluster_patterns.md b/book/i18n/ko/src/puzzle_34/advanced_cluster_patterns.md
index bf675187..8fb33014 100644
--- a/book/i18n/ko/src/puzzle_34/advanced_cluster_patterns.md
+++ b/book/i18n/ko/src/puzzle_34/advanced_cluster_patterns.md
@@ -39,7 +39,7 @@
 - **워프 크기**: `WARP_SIZE = 32` 워프당 스레드 수 (NVIDIA 표준)
 - **블록당 워프 수**: `TPB / WARP_SIZE = 8` 워프
 - **데이터 타입**: `DType.float32`
-- **메모리 레이아웃**: 입력 `Layout.row_major(SIZE)`, 출력 `Layout.row_major(CLUSTER_SIZE)`
+- **메모리 레이아웃**: 입력 `row_major[SIZE]()`, 출력 `row_major[CLUSTER_SIZE]()`
 
 **처리 분배:**
 
diff --git a/book/i18n/ko/src/puzzle_34/cluster_collective_ops.md b/book/i18n/ko/src/puzzle_34/cluster_collective_ops.md
index 1016d94f..116140af 100644
--- a/book/i18n/ko/src/puzzle_34/cluster_collective_ops.md
+++ b/book/i18n/ko/src/puzzle_34/cluster_collective_ops.md
@@ -42,8 +42,8 @@
 - **블록 설정**: `TPB = 256` 블록당 스레드 수 `(256, 1)`
 - **그리드 설정**: `CLUSTER_SIZE = 4` 클러스터당 블록 수 `(4, 1)`
 - **데이터 타입**: `DType.float32`
-- **메모리 레이아웃**: 입력 `Layout.row_major(SIZE)`, 출력 `Layout.row_major(1)`
-- **임시 저장소**: 부분 결과를 위한 `Layout.row_major(CLUSTER_SIZE)`
+- **메모리 레이아웃**: 입력 `row_major[SIZE]()`, 출력 `row_major[1]()`
+- **임시 저장소**: 부분 결과를 위한 `row_major[CLUSTER_SIZE]()`
 
 **예상 결과**: 수열 `0, 0.01, 0.02, ..., 10.23`의 합 = **523,776**
 
diff --git a/book/i18n/ko/src/puzzle_34/cluster_coordination_basics.md b/book/i18n/ko/src/puzzle_34/cluster_coordination_basics.md
index d011d478..67d391ce 100644
--- a/book/i18n/ko/src/puzzle_34/cluster_coordination_basics.md
+++ b/book/i18n/ko/src/puzzle_34/cluster_coordination_basics.md
@@ -37,7 +37,7 @@
 - **블록 설정**: `TPB = 256` 블록당 스레드 수 `(256, 1)`
 - **그리드 설정**: `CLUSTER_SIZE = 4` 클러스터당 블록 수 `(4, 1)`
 - **데이터 타입**: `DType.float32`
-- **메모리 레이아웃**: 입력 `Layout.row_major(SIZE)`, 출력 `Layout.row_major(CLUSTER_SIZE)`
+- **메모리 레이아웃**: 입력 `row_major[SIZE]()`, 출력 `row_major[CLUSTER_SIZE]()`
 
 **스레드 블록 분배:**
 
@@ -67,7 +67,7 @@
 
 ### **공유 메모리 조정**
 
-- `LayoutTensor[dtype, Layout.row_major(tpb), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()`으로 공유 메모리를 할당합니다 ([Puzzle 8의 공유 메모리 기초](../puzzle_08/puzzle_08.md) 참고)
+- `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[tpb]())`으로 공유 메모리를 할당합니다 ([Puzzle 8의 공유 메모리 기초](../puzzle_08/puzzle_08.md) 참고)
 - `block_id + 1`로 스케일링하여 블록마다 고유한 스케일링을 적용합니다
 - 입력 데이터 접근 시 경계 검사를 사용합니다 ([Puzzle 3의 가드 패턴](../puzzle_03/puzzle_03.md))
 
@@ -155,7 +155,7 @@ block_id = Int(block_idx.x)                          # Block index for reliable
 
 **공유 메모리 할당 및 데이터 처리:**
 
-- 각 블록이 자체 공유 메모리 작업 공간을 할당합니다: `LayoutTensor[dtype, Layout.row_major(tpb), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()`
+- 각 블록이 자체 공유 메모리 작업 공간을 할당합니다: `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[tpb]())`
 - **스케일링 전략**: `data_scale = Float32(block_id + 1)`로 각 블록이 다르게 데이터를 처리하도록 합니다
   - Block 0: 1.0배, Block 1: 2.0배, Block 2: 3.0배, Block 3: 4.0배
 - **경계 검사**: `if global_i < size:`로 범위 밖 메모리 접근을 방지합니다
diff --git a/book/src/SUMMARY.md b/book/src/SUMMARY.md
index 7094598a..3714ce93 100644
--- a/book/src/SUMMARY.md
+++ b/book/src/SUMMARY.md
@@ -10,23 +10,17 @@
 
 - [Puzzle 1: Map](./puzzle_01/puzzle_01.md)
   - [🔰 Raw Memory Approach](./puzzle_01/raw.md)
-  - [💡 Preview: Modern Approach with LayoutTensor](./puzzle_01/layout_tensor_preview.md)
+  - [💡 Preview: Modern Approach with TileTensor](./puzzle_01/tile_tensor_preview.md)
 - [Puzzle 2: Zip](./puzzle_02/puzzle_02.md)
 - [Puzzle 3: Guards](./puzzle_03/puzzle_03.md)
 - [Puzzle 4: 2D Map](./puzzle_04/puzzle_04.md)
   - [🔰 Raw Memory Approach](./puzzle_04/raw.md)
-  - [📚 Learn about LayoutTensor](./puzzle_04/introduction_layout_tensor.md)
-  - [🚀 Modern 2D Operations](./puzzle_04/layout_tensor.md)
+  - [📚 Learn about TileTensor](./puzzle_04/introduction_tile_tensor.md)
+  - [🚀 Modern 2D Operations](./puzzle_04/tile_tensor.md)
 - [Puzzle 5: Broadcast](./puzzle_05/puzzle_05.md)
-  - [🔰 Raw Memory Approach](./puzzle_05/raw.md)
-  - [📐 LayoutTensor Version](./puzzle_05/layout_tensor.md)
 - [Puzzle 6: Blocks](./puzzle_06/puzzle_06.md)
 - [Puzzle 7: 2D Blocks](./puzzle_07/puzzle_07.md)
-  - [🔰 Raw Memory Approach](./puzzle_07/raw.md)
-  - [📐 LayoutTensor Version](./puzzle_07/layout_tensor.md)
 - [Puzzle 8: Shared Memory](./puzzle_08/puzzle_08.md)
-  - [🔰 Raw Memory Approach](./puzzle_08/raw.md)
-  - [📐 LayoutTensor Version](./puzzle_08/layout_tensor.md)
 
 # Part II: 🐞 Debugging GPU Programs
 
@@ -42,11 +36,7 @@
 # Part III: 🧮 GPU Algorithms
 
 - [Puzzle 11: Pooling](./puzzle_11/puzzle_11.md)
-  - [🔰 Raw Memory Approach](./puzzle_11/raw.md)
-  - [📐 LayoutTensor Version](./puzzle_11/layout_tensor.md)
 - [Puzzle 12: Dot Product](./puzzle_12/puzzle_12.md)
-  - [🔰 Raw Memory Approach](./puzzle_12/raw.md)
-  - [📐 LayoutTensor Version](./puzzle_12/layout_tensor.md)
 - [Puzzle 13: 1D Convolution](./puzzle_13/puzzle_13.md)
   - [🔰 Simple Version](./puzzle_13/simple.md)
   - [⭐ Block Boundary Version](./puzzle_13/block_boundary.md)
diff --git a/book/src/introduction.md b/book/src/introduction.md
index b7f6c99c..ba9f9fec 100644
--- a/book/src/introduction.md
+++ b/book/src/introduction.md
@@ -156,7 +156,7 @@ This book takes you on a journey from first principles to advanced GPU programmi
 
 - Learn thread indexing and block organization
 - Understand memory access patterns and guards
-- Work with both raw pointers and LayoutTensor abstractions
+- Work with both raw pointers and TileTensor abstractions
 - Learn shared memory basics for inter-thread communication
 
 **Part II: Debugging GPU programs (Puzzles 9-10) ✅**
@@ -226,7 +226,7 @@ This book takes you on a journey from first principles to advanced GPU programmi
 - Program tensor cores for AI workloads
 - Learn cluster programming in modern GPUs
 
-The book uniquely challenges the status quo approach by first building understanding with low-level memory manipulation, then gradually transitioning to Mojo's LayoutTensor abstractions. This provides both deep understanding of GPU memory patterns and practical knowledge of modern tensor-based approaches.
+The book uniquely challenges the status quo approach by first building understanding with low-level memory manipulation, then gradually transitioning to Mojo's TileTensor abstractions. This provides both deep understanding of GPU memory patterns and practical knowledge of modern tensor-based approaches.
 
 ## Ready to get started?
 
diff --git a/book/src/puzzle_01/puzzle_01.md b/book/src/puzzle_01/puzzle_01.md
index cc1f175d..8a47ee05 100644
--- a/book/src/puzzle_01/puzzle_01.md
+++ b/book/src/puzzle_01/puzzle_01.md
@@ -30,8 +30,8 @@ For each position \\(i\\):
 
 Start with direct memory manipulation to understand GPU fundamentals.
 
-### [💡 Preview: Modern Approach with LayoutTensor](./layout_tensor_preview.md)
+### [💡 Preview: Modern Approach with TileTensor](./tile_tensor_preview.md)
 
-See how LayoutTensor simplifies GPU programming with safer, cleaner code.
+See how TileTensor simplifies GPU programming with safer, cleaner code.
 
 💡 **Tip**: Understanding both approaches leads to better appreciation of modern GPU programming patterns.
diff --git a/book/src/puzzle_01/layout_tensor_preview.md b/book/src/puzzle_01/tile_tensor_preview.md
similarity index 76%
rename from book/src/puzzle_01/layout_tensor_preview.md
rename to book/src/puzzle_01/tile_tensor_preview.md
index 0c411e9d..62b971b8 100644
--- a/book/src/puzzle_01/layout_tensor_preview.md
+++ b/book/src/puzzle_01/tile_tensor_preview.md
@@ -1,4 +1,4 @@
-## Why consider LayoutTensor?
+## Why consider TileTensor?
 
 Looking at our traditional implementation below, you might notice some potential issues:
 
@@ -30,9 +30,9 @@ idx = (batch * HEIGHT + row) * WIDTH + col
 idx = (batch * padded_height + row) * padded_width + col
 ```
 
-### LayoutTensor preview
+### TileTensor preview
 
-[LayoutTensor](https://docs.modular.com/mojo/kernels/layout/layout_tensor/LayoutTensor/) will help us handle these cases more elegantly:
+[TileTensor](https://docs.modular.com/mojo/kernels/layout/tile_tensor/TileTensor/) will help us handle these cases more elegantly:
 
 ```mojo
 # Future preview - don't worry about this syntax yet!
@@ -40,7 +40,7 @@ output[i, j] = a[i, j] + 10.0  # 2D indexing
 output[b, i, j] = a[b, i, j] + 10.0  # 3D indexing
 ```
 
-We'll learn about LayoutTensor in detail in Puzzle 4, where these concepts become essential. For now, focus on understanding:
+We'll learn about TileTensor in detail in Puzzle 4, where these concepts become essential. For now, focus on understanding:
 
 - Basic thread indexing
 - Simple memory access patterns
diff --git a/book/src/puzzle_02/puzzle_02.md b/book/src/puzzle_02/puzzle_02.md
index 56f7e099..21d50cf5 100644
--- a/book/src/puzzle_02/puzzle_02.md
+++ b/book/src/puzzle_02/puzzle_02.md
@@ -130,4 +130,4 @@ While this direct indexing works for simple element-wise operations, consider:
 - What if we need to broadcast one array to another?
 - How to ensure coalesced access across multiple arrays?
 
-These questions will be addressed when we [introduce LayoutTensor in Puzzle 4](../puzzle_04/introduction_layout_tensor.md).
+These questions will be addressed when we [introduce TileTensor in Puzzle 4](../puzzle_04/introduction_tile_tensor.md).
diff --git a/book/src/puzzle_03/puzzle_03.md b/book/src/puzzle_03/puzzle_03.md
index d1081936..148034cf 100644
--- a/book/src/puzzle_03/puzzle_03.md
+++ b/book/src/puzzle_03/puzzle_03.md
@@ -159,4 +159,4 @@ if i < height and j < width and k < depth and
    i >= padding and j >= padding: ...
 ```
 
-These boundary handling patterns will become more elegant when we [learn about LayoutTensor in Puzzle 4](../puzzle_04/introduction_layout_tensor.md), which provides built-in shape management.
+These boundary handling patterns will become more elegant when we [learn about TileTensor in Puzzle 4](../puzzle_04/introduction_tile_tensor.md), which provides built-in shape management.
diff --git a/book/src/puzzle_04/intro.mojo b/book/src/puzzle_04/intro.mojo
index 49a66bde..10b248b9 100644
--- a/book/src/puzzle_04/intro.mojo
+++ b/book/src/puzzle_04/intro.mojo
@@ -1,15 +1,17 @@
 from std.gpu.host import DeviceContext
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
 
 comptime HEIGHT = 2
 comptime WIDTH = 3
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(HEIGHT, WIDTH)
+comptime layout = row_major[HEIGHT, WIDTH]()
+comptime LayoutType = type_of(layout)
 
 
-def kernel[
-    dtype: DType, layout: Layout
-](tensor: LayoutTensor[dtype, layout, MutAnyOrigin]):
+def kernel(
+    tensor: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+):
     print("Before:")
     print(tensor)
     tensor[0, 0] += 1
@@ -22,9 +24,9 @@ def main() raises:
 
     a = ctx.enqueue_create_buffer[dtype](HEIGHT * WIDTH)
     a.enqueue_fill(0)
-    tensor = LayoutTensor[dtype, layout, MutAnyOrigin](a)
+    tensor = TileTensor(a, layout)
     # Note: since `tensor` is a device tensor we can't print it without the kernel wrapper
-    ctx.enqueue_function[kernel[dtype, layout], kernel[dtype, layout]](
+    ctx.enqueue_function[kernel, kernel](
         tensor, grid_dim=1, block_dim=1
     )
 
diff --git a/book/src/puzzle_04/introduction_layout_tensor.md b/book/src/puzzle_04/introduction_tile_tensor.md
similarity index 67%
rename from book/src/puzzle_04/introduction_layout_tensor.md
rename to book/src/puzzle_04/introduction_tile_tensor.md
index 868a6fe0..c01a29d3 100644
--- a/book/src/puzzle_04/introduction_layout_tensor.md
+++ b/book/src/puzzle_04/introduction_tile_tensor.md
@@ -1,9 +1,9 @@
-# Introduction to LayoutTensor
+# Introduction to TileTensor
 
 Let's take a quick break from solving puzzles to preview a powerful abstraction that will make our GPU programming journey more enjoyable:
-🥁 ... the **[LayoutTensor](https://docs.modular.com/mojo/kernels/layout/layout_tensor/LayoutTensor/)**.
+🥁 ... the **[TileTensor](https://docs.modular.com/mojo/kernels/layout/tile_tensor/TileTensor/)**.
 
-> 💡 _This is a motivational overview of LayoutTensor's capabilities. Don't worry about understanding everything now - we'll explore each feature in depth as we progress through the puzzles_.
+> 💡 _This is a motivational overview of TileTensor's capabilities. Don't worry about understanding everything now - we'll explore each feature in depth as we progress through the puzzles_.
 
 ## The challenge: Growing complexity
 
@@ -30,9 +30,9 @@ if row < height and col < width:
     output[idx] = a[idx] + 10.0
 ```
 
-## The solution: A peek at LayoutTensor
+## The solution: A peek at TileTensor
 
-LayoutTensor will help us tackle these challenges with elegant solutions. Here's a glimpse of what's coming:
+TileTensor will help us tackle these challenges with elegant solutions. Here's a glimpse of what's coming:
 
 1. **Natural Indexing**: Use `tensor[i, j]` instead of manual offset calculations
 2. **Flexible Memory Layouts**: Support for row-major, column-major, and tiled organizations
@@ -40,34 +40,36 @@ LayoutTensor will help us tackle these challenges with elegant solutions. Here's
 
 ## A taste of what's ahead
 
-Let's look at a few examples of what LayoutTensor can do. Don't worry about understanding all the details now - we'll cover each feature thoroughly in upcoming puzzles.
+Let's look at a few examples of what TileTensor can do. Don't worry about understanding all the details now - we'll cover each feature thoroughly in upcoming puzzles.
 
 ### Basic usage example
 
 ```mojo
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
 
 # Define layout
 comptime HEIGHT = 2
 comptime WIDTH = 3
-comptime layout = Layout.row_major(HEIGHT, WIDTH)
+comptime layout = row_major[HEIGHT, WIDTH]()
+comptime LayoutType = type_of(layout)
 
 # Create tensor
-tensor = LayoutTensor[dtype, layout](buffer.unsafe_ptr())
+tensor = TileTensor(buffer, layout)
 
 # Access elements naturally
 tensor[0, 0] = 1.0  # First element
 tensor[1, 2] = 2.0  # Last element
 ```
 
-To learn more about `Layout` and `LayoutTensor`, see these guides from the [Mojo manual](https://docs.modular.com/mojo/manual/)
+To learn more about `Layout` and `TileTensor`, see these guides from the [Mojo manual](https://docs.modular.com/mojo/manual/)
 
 - [Introduction to layouts](https://docs.modular.com/mojo/manual/layout/layouts)
-- [Using LayoutTensor](https://docs.modular.com/mojo/manual/layout/tensors)
+- [Using TileTensor](https://docs.modular.com/mojo/manual/layout/tensors)
 
 ## Quick example
 
-Let's put everything together with a simple example that demonstrates the basics of LayoutTensor:
+Let's put everything together with a simple example that demonstrates the basics of TileTensor:
 
 ```mojo
 {{#include ./intro.mojo}}
@@ -85,28 +87,28 @@ When we run this code with:
   <div class="tab-content">
 
 ```bash
-pixi run layout_tensor_intro
+pixi run tile_tensor_intro
 ```
 
   </div>
   <div class="tab-content">
 
 ```bash
-pixi run -e amd layout_tensor_intro
+pixi run -e amd tile_tensor_intro
 ```
 
   </div>
   <div class="tab-content">
 
 ```bash
-pixi run -e apple layout_tensor_intro
+pixi run -e apple tile_tensor_intro
 ```
 
   </div>
   <div class="tab-content">
 
 ```bash
-uv run poe layout_tensor_intro
+uv run poe tile_tensor_intro
 ```
 
   </div>
@@ -128,7 +130,7 @@ Let's break down what's happening:
 3. Using natural indexing, we modify a single element
 4. The change is reflected in our output
 
-This simple example demonstrates key LayoutTensor benefits:
+This simple example demonstrates key TileTensor benefits:
 
 - Clean syntax for tensor creation and access
 - Automatic memory layout handling
@@ -141,6 +143,6 @@ While this example is straightforward, the same patterns will scale to complex G
 - Complex tiling strategies
 - Hardware-accelerated computations
 
-Ready to start your GPU programming journey with LayoutTensor? Let's dive into the puzzles!
+Ready to start your GPU programming journey with TileTensor? Let's dive into the puzzles!
 
 💡 **Tip**: Keep this example in mind as we progress - we'll build upon these fundamental concepts to create increasingly sophisticated GPU programs.
diff --git a/book/src/puzzle_04/puzzle_04.md b/book/src/puzzle_04/puzzle_04.md
index 58615d62..6acf7cf7 100644
--- a/book/src/puzzle_04/puzzle_04.md
+++ b/book/src/puzzle_04/puzzle_04.md
@@ -44,10 +44,10 @@ For each position \\((i,j)\\):
 ### [🔰 Raw memory approach](./raw.md)
 Learn how 2D indexing works with manual memory management.
 
-### [📚 Learn about LayoutTensor](./introduction_layout_tensor.md)
+### [📚 Learn about TileTensor](./introduction_tile_tensor.md)
 Discover a powerful abstraction that simplifies multi-dimensional array operations and memory management on GPU.
 
-### [🚀 Modern 2D operations](./layout_tensor.md)
-Put LayoutTensor into practice with natural 2D indexing and automatic bounds checking.
+### [🚀 Modern 2D operations](./tile_tensor.md)
+Put TileTensor into practice with natural 2D indexing and automatic bounds checking.
 
-💡 **Note**: From this puzzle onward, we'll primarily use LayoutTensor for cleaner, safer GPU code.
+💡 **Note**: From this puzzle onward, we'll primarily use TileTensor for cleaner, safer GPU code.
diff --git a/book/src/puzzle_04/layout_tensor.md b/book/src/puzzle_04/tile_tensor.md
similarity index 65%
rename from book/src/puzzle_04/layout_tensor.md
rename to book/src/puzzle_04/tile_tensor.md
index b6a2d431..7f7896e0 100644
--- a/book/src/puzzle_04/layout_tensor.md
+++ b/book/src/puzzle_04/tile_tensor.md
@@ -1,8 +1,8 @@
-# LayoutTensor Version
+# TileTensor Version
 
 ## Overview
 
-Implement a kernel that adds 10 to each position of 2D _LayoutTensor_ `a` and stores it in 2D _LayoutTensor_ `output`.
+Implement a kernel that adds 10 to each position of 2D _TileTensor_ `a` and stores it in 2D _TileTensor_ `output`.
 
 **Note:** _You have more threads than positions_.
 
@@ -10,13 +10,13 @@ Implement a kernel that adds 10 to each position of 2D _LayoutTensor_ `a` and st
 
 In this puzzle, you'll learn about:
 
-- Using `LayoutTensor` for 2D array access
+- Using `TileTensor` for 2D array access
 - Direct 2D indexing with `tensor[i, j]`
-- Handling bounds checking with `LayoutTensor`
+- Handling bounds checking with `TileTensor`
 
-The key insight is that `LayoutTensor` provides a natural 2D indexing interface, abstracting away the underlying memory layout while still requiring bounds checking.
+The key insight is that `TileTensor` provides a natural 2D indexing interface, abstracting away the underlying memory layout while still requiring bounds checking.
 
-- **2D access**: Natural \\((i,j)\\) indexing with `LayoutTensor`
+- **2D access**: Natural \\((i,j)\\) indexing with `TileTensor`
 - **Memory abstraction**: No manual row-major calculation needed
 - **Guard condition**: Still need bounds checking in both dimensions
 - **Thread bounds**: More threads \\((3 \times 3)\\) than tensor elements \\((2 \times 2)\\)
@@ -24,10 +24,10 @@ The key insight is that `LayoutTensor` provides a natural 2D indexing interface,
 ## Code to complete
 
 ```mojo
-{{#include ../../../problems/p04/p04_layout_tensor.mojo:add_10_2d_layout_tensor}}
+{{#include ../../../problems/p04/p04_tile_tensor.mojo:add_10_2d_tile_tensor}}
 ```
 
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p04/p04_layout_tensor.mojo" class="filename">View full file: problems/p04/p04_layout_tensor.mojo</a>
+<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p04/p04_tile_tensor.mojo" class="filename">View full file: problems/p04/p04_tile_tensor.mojo</a>
 
 <details>
 <summary><strong>Tips</strong></summary>
@@ -55,28 +55,28 @@ To test your solution, run the following command in your terminal:
   <div class="tab-content">
 
 ```bash
-pixi run p04_layout_tensor
+pixi run p04_tile_tensor
 ```
 
   </div>
   <div class="tab-content">
 
 ```bash
-pixi run -e amd p04_layout_tensor
+pixi run -e amd p04_tile_tensor
 ```
 
   </div>
   <div class="tab-content">
 
 ```bash
-pixi run -e apple p04_layout_tensor
+pixi run -e apple p04_tile_tensor
 ```
 
   </div>
   <div class="tab-content">
 
 ```bash
-uv run poe p04_layout_tensor
+uv run poe p04_tile_tensor
 ```
 
   </div>
@@ -95,7 +95,7 @@ expected: HostBuffer([10.0, 11.0, 12.0, 13.0])
 <summary></summary>
 
 ```mojo
-{{#include ../../../solutions/p04/p04_layout_tensor.mojo:add_10_2d_layout_tensor_solution}}
+{{#include ../../../solutions/p04/p04_tile_tensor.mojo:add_10_2d_tile_tensor_solution}}
 ```
 
 <div class="solution-explanation">
@@ -104,7 +104,7 @@ This solution:
 
 - Gets 2D thread indices with `row = thread_idx.y`, `col = thread_idx.x`
 - Guards against out-of-bounds with `if row < size and col < size`
-- Uses `LayoutTensor`'s 2D indexing: `output[row, col] = a[row, col] + 10.0`
+- Uses `TileTensor`'s 2D indexing: `output[row, col] = a[row, col] + 10.0`
 
 </div>
 </details>
diff --git a/book/src/puzzle_05/layout_tensor.md b/book/src/puzzle_05/layout_tensor.md
deleted file mode 100644
index 873be966..00000000
--- a/book/src/puzzle_05/layout_tensor.md
+++ /dev/null
@@ -1,128 +0,0 @@
-# LayoutTensor Version
-
-## Overview
-
-Implement a kernel that broadcast adds 1D LayoutTensor `a` and 1D LayoutTensor `b` and stores it in 2D LayoutTensor `output`.
-
-**Note:** _You have more threads than positions._
-
-## Key concepts
-
-In this puzzle, you'll learn about:
-
-- Using `LayoutTensor` for broadcast operations
-- Working with different tensor shapes
-- Handling 2D indexing with `LayoutTensor`
-
-The key insight is that `LayoutTensor` allows natural broadcasting through different tensor shapes: \\((1, n)\\) and \\((n, 1)\\) to \\((n,n)\\), while still requiring bounds checking.
-
-- **Tensor shapes**: Input vectors have shapes \\((1, n)\\) and \\((n, 1)\\)
-- **Broadcasting**: Output combines both dimensions to \\((n,n)\\)
-- **Guard condition**: Still need bounds checking for output size
-- **Thread bounds**: More threads \\((3 \times 3)\\) than tensor elements \\((2 \times 2)\\)
-
-## Code to complete
-
-```mojo
-{{#include ../../../problems/p05/p05_layout_tensor.mojo:broadcast_add_layout_tensor}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p05/p05_layout_tensor.mojo" class="filename">View full file: problems/p05/p05_layout_tensor.mojo</a>
-
-<details>
-<summary><strong>Tips</strong></summary>
-
-<div class="solution-tips">
-
-1. Get 2D indices: `row = thread_idx.y`, `col = thread_idx.x`
-2. Add guard: `if row < size and col < size`
-3. Inside guard: think about how to broadcast values of `a` and `b` as LayoutTensors
-
-</div>
-</details>
-
-## Running the code
-
-To test your solution, run the following command in your terminal:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p05_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p05_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p05_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p05_layout_tensor
-```
-
-  </div>
-</div>
-
-Your output will look like this if the puzzle isn't solved yet:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, 0.0])
-expected: HostBuffer([1.0, 2.0, 11.0, 12.0])
-```
-
-## Solution
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../solutions/p05/p05_layout_tensor.mojo:broadcast_add_layout_tensor_solution}}
-```
-
-<div class="solution-explanation">
-
-This solution demonstrates key concepts of LayoutTensor broadcasting and GPU thread mapping:
-
-1. **Thread to matrix mapping**
-
-   - Uses `thread_idx.y` for row access and `thread_idx.x` for column access
-   - Natural 2D indexing matches the output matrix structure
-   - Excess threads (3×3 grid) are handled by bounds checking
-
-2. **Broadcasting mechanics**
-   - Input `a` has shape `(1,n)`: `a[0,col]` broadcasts across rows
-   - Input `b` has shape `(n,1)`: `b[row,0]` broadcasts across columns
-   - Output has shape `(n,n)`: Each element is sum of corresponding broadcasts
-
-   ```txt
-   [ a0 a1 ]  +  [ b0 ]  =  [ a0+b0  a1+b0 ]
-                 [ b1 ]     [ a0+b1  a1+b1 ]
-   ```
-
-3. **Bounds Checking**
-   - Guard condition `row < size and col < size` prevents out-of-bounds access
-   - Handles both matrix bounds and excess threads efficiently
-   - No need for separate checks for `a` and `b` due to broadcasting
-
-This pattern forms the foundation for more complex tensor operations we'll explore in later puzzles.
-</div>
-</details>
diff --git a/book/src/puzzle_05/puzzle_05.md b/book/src/puzzle_05/puzzle_05.md
index 67f534b8..e3409ca9 100644
--- a/book/src/puzzle_05/puzzle_05.md
+++ b/book/src/puzzle_05/puzzle_05.md
@@ -2,7 +2,7 @@
 
 ## Overview
 
-Implement a kernel that broadcast adds vector `a` and vector `b` and stores it in 2D matrix `output`.
+Implement a kernel that broadcast adds 1D TileTensor `a` and 1D TileTensor `b` and stores it in 2D TileTensor `output`.
 
 **Broadcasting** in parallel programming refers to the operation where lower-dimensional arrays are automatically expanded to match the shape of higher-dimensional arrays during element-wise operations. Instead of physically replicating data in memory, values are logically repeated across the additional dimensions. For example, adding a 1D vector to each row (or column) of a 2D matrix applies the same vector elements repeatedly without creating multiple copies.
 
@@ -12,17 +12,124 @@ Implement a kernel that broadcast adds vector `a` and vector `b` and stores it i
 <img src="./media/05d.png" alt="Broadcast visualization" class="dark-mode-img">
 
 ## Key concepts
-- Broadcasting vectors to matrix
-- 2D thread management
-- Mixed dimension operations
-- Memory layout patterns
 
-## Implementation approaches
+In this puzzle, you'll learn about:
 
-### [🔰 Raw memory approach](./raw.md)
-Learn how to handle broadcasting with manual memory indexing.
+- Broadcasting 1D vectors across different dimensions with `TileTensor`
+- Using 2D thread indices to map GPU threads to a 2D output matrix
+- Working with different tensor shapes for mixed-dimension operations
+- Handling boundary conditions in broadcast patterns
 
-### [📐 LayoutTensor Version](./layout_tensor.md)
-Use LayoutTensor to handle mixed-dimension operations.
+The key insight is that `TileTensor` allows natural broadcasting through different tensor shapes: \\((1, n)\\) and \\((n, 1)\\) to \\((n,n)\\), while still requiring bounds checking.
 
-💡 **Note**: Notice how LayoutTensor simplifies broadcasting compared to manual indexing.
+- **Tensor shapes**: Input vectors have shapes \\((1, n)\\) and \\((n, 1)\\)
+- **Broadcasting**: Each element of `a` combines with each element of `b`; output expands both dimensions to \\((n,n)\\)
+- **Access patterns**: `a[0, col]` broadcasts horizontally across rows; `b[row, 0]` broadcasts vertically across columns
+- **Guard condition**: Still need bounds checking for output size
+- **Thread bounds**: More threads \\((3 \times 3)\\) than tensor elements \\((2 \times 2)\\)
+
+## Code to complete
+
+```mojo
+{{#include ../../../problems/p05/p05.mojo:broadcast_add}}
+```
+
+<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p05/p05.mojo" class="filename">View full file: problems/p05/p05.mojo</a>
+
+<details>
+<summary><strong>Tips</strong></summary>
+
+<div class="solution-tips">
+
+1. Get 2D indices: `row = thread_idx.y`, `col = thread_idx.x`
+2. Add guard: `if row < size and col < size`
+3. Inside guard: think about how to broadcast values of `a` and `b` as TileTensors
+
+</div>
+</details>
+
+## Running the code
+
+To test your solution, run the following command in your terminal:
+
+<div class="code-tabs" data-tab-group="package-manager">
+  <div class="tab-buttons">
+    <button class="tab-button">pixi NVIDIA (default)</button>
+    <button class="tab-button">pixi AMD</button>
+    <button class="tab-button">pixi Apple</button>
+    <button class="tab-button">uv</button>
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run p05
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e amd p05
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e apple p05
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+uv run poe p05
+```
+
+  </div>
+</div>
+
+Your output will look like this if the puzzle isn't solved yet:
+
+```txt
+out: HostBuffer([0.0, 0.0, 0.0, 0.0])
+expected: HostBuffer([1.0, 2.0, 11.0, 12.0])
+```
+
+## Solution
+
+<details class="solution-details">
+<summary></summary>
+
+```mojo
+{{#include ../../../solutions/p05/p05.mojo:broadcast_add_solution}}
+```
+
+<div class="solution-explanation">
+
+This solution demonstrates key concepts of TileTensor broadcasting and GPU thread mapping:
+
+1. **Thread to matrix mapping**
+
+   - Uses `thread_idx.y` for row access and `thread_idx.x` for column access
+   - Natural 2D indexing matches the output matrix structure
+   - Excess threads (3×3 grid) are handled by bounds checking
+
+2. **Broadcasting mechanics**
+   - Input `a` has shape `(1,n)`: `a[0,col]` broadcasts across rows
+   - Input `b` has shape `(n,1)`: `b[row,0]` broadcasts across columns
+   - Output has shape `(n,n)`: Each element is sum of corresponding broadcasts
+
+   ```txt
+   [ a0 a1 ]  +  [ b0 ]  =  [ a0+b0  a1+b0 ]
+                 [ b1 ]     [ a0+b1  a1+b1 ]
+   ```
+
+3. **Bounds Checking**
+   - Guard condition `row < size and col < size` prevents out-of-bounds access
+   - Handles both matrix bounds and excess threads efficiently
+   - No need for separate checks for `a` and `b` due to broadcasting
+
+This pattern forms the foundation for more complex tensor operations we'll explore in later puzzles.
+</div>
+</details>
diff --git a/book/src/puzzle_05/raw.md b/book/src/puzzle_05/raw.md
deleted file mode 100644
index 9ddb7d22..00000000
--- a/book/src/puzzle_05/raw.md
+++ /dev/null
@@ -1,125 +0,0 @@
-## Overview
-
-Implement a kernel that broadcast adds vector `a` and vector `b` and stores it in 2D matrix `output`.
-
-**Note:** _You have more threads than positions._
-
-## Key concepts
-
-In this puzzle, you'll learn about:
-
-- Broadcasting 1D vectors across different dimensions
-- Using 2D thread indices for broadcast operations
-- Handling boundary conditions in broadcast patterns
-
-The key insight is understanding how to map elements from two 1D vectors to create a 2D output matrix through broadcasting, while handling thread bounds correctly.
-
-- **Broadcasting**: Each element of `a` combines with each element of `b`
-- **Thread mapping**: 2D thread grid \\((3 \times 3)\\) for \\(2 \times 2\\) output
-- **Vector access**: Different access patterns for `a` and `b`
-- **Bounds checking**: Guard against threads outside matrix dimensions
-
-## Code to complete
-
-```mojo
-{{#include ../../../problems/p05/p05.mojo:broadcast_add}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p05/p05.mojo" class="filename">View full file: problems/p05/p05.mojo</a>
-
-<details>
-<summary><strong>Tips</strong></summary>
-
-<div class="solution-tips">
-
-1. Get 2D indices: `row = thread_idx.y`, `col = thread_idx.x`
-2. Add guard: `if row < size and col < size`
-3. Inside guard: think about how to broadcast values of `a` and `b`
-
-</div>
-</details>
-
-## Running the code
-
-To test your solution, run the following command in your terminal:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p05
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p05
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p05
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p05
-```
-
-  </div>
-</div>
-
-Your output will look like this if the puzzle isn't solved yet:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, 0.0])
-expected: HostBuffer([1.0, 2.0, 11.0, 12.0])
-```
-
-## Solution
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../solutions/p05/p05.mojo:broadcast_add_solution}}
-```
-
-<div class="solution-explanation">
-
-This solution demonstrates fundamental GPU broadcasting concepts without LayoutTensor abstraction:
-
-1. **Thread to matrix mapping**
-   - Uses `thread_idx.y` for row access and `thread_idx.x` for column access
-   - Direct mapping from 2D thread grid to output matrix elements
-   - Handles excess threads (3×3 grid) for 2×2 output matrix
-
-2. **Broadcasting mechanics**
-   - Vector `a` broadcasts horizontally: same `a[col]` used across each row
-   - Vector `b` broadcasts vertically: same `b[row]` used across each column
-   - Output combines both vectors through addition
-
-   ```txt
-   [ a0 a1 ]  +  [ b0 ]  =  [ a0+b0  a1+b0 ]
-                 [ b1 ]     [ a0+b1  a1+b1 ]
-   ```
-
-3. **Bounds checking**
-   - Single guard condition `row < size and col < size` handles both dimensions
-   - Prevents out-of-bounds access for both input vectors and output matrix
-   - Required due to 3×3 thread grid being larger than 2×2 data
-
-Compare this with the LayoutTensor version to see how the abstraction simplifies broadcasting operations while maintaining the same underlying concepts.
-</div>
-</details>
diff --git a/book/src/puzzle_06/puzzle_06.md b/book/src/puzzle_06/puzzle_06.md
index 61566ebf..7b528a6c 100644
--- a/book/src/puzzle_06/puzzle_06.md
+++ b/book/src/puzzle_06/puzzle_06.md
@@ -4,6 +4,8 @@
 
 Implement a kernel that adds 10 to each position of vector `a` and stores it in `output`.
 
+A **thread block** (or just **block**) is a group of threads that execute together on a single GPU multiprocessor. All threads in a block share the same shared memory and can synchronize with each other. When data is larger than one block can handle, the GPU schedules multiple blocks — each block independently processes its portion of the data. The global position of a thread is computed from both its position within the block (`thread_idx.x`) and which block it belongs to (`block_idx.x`): `global_i = block_dim.x * block_idx.x + thread_idx.x`.
+
 **Note:** _You have fewer threads per block than the size of a._
 
 <img src="./media/06.png" alt="Blocks visualization" class="light-mode-img">
@@ -27,7 +29,7 @@ The key insight is understanding how blocks of threads work together to process
 
 <a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p06/p06.mojo" class="filename">View full file: problems/p06/p06.mojo</a>
 
-> Note: The `LayoutTensor` variant of this puzzle is very similar so we leave it to the reader.
+> Note: The `TileTensor` variant of this puzzle is very similar so we leave it to the reader.
 
 <details>
 <summary><strong>Tips</strong></summary>
diff --git a/book/src/puzzle_07/layout_tensor.md b/book/src/puzzle_07/layout_tensor.md
deleted file mode 100644
index 95d6e30a..00000000
--- a/book/src/puzzle_07/layout_tensor.md
+++ /dev/null
@@ -1,158 +0,0 @@
-# LayoutTensor Version
-
-## Overview
-
-Implement a kernel that adds 10 to each position of 2D LayoutTensor `a` and stores it in 2D LayoutTensor `output`.
-
-**Note:** _You have fewer threads per block than the size of `a` in both directions._
-
-## Key concepts
-
-In this puzzle, you'll learn about:
-
-- Using `LayoutTensor` with multiple blocks
-- Handling large matrices with 2D block organization
-- Combining block indexing with `LayoutTensor` access
-
-The key insight is that `LayoutTensor` simplifies 2D indexing while still requiring proper block coordination for large matrices.
-
-## Configuration
-
-- **Matrix size**: \\(5 \times 5\\) elements
-- **Layout handling**: `LayoutTensor` manages row-major organization
-- **Block coordination**: Multiple blocks cover the full matrix
-- **2D indexing**: Natural \\((i,j)\\) access with bounds checking
-- **Total threads**: \\(36\\) for \\(25\\) elements
-- **Thread mapping**: Each thread processes one matrix element
-
-## Code to complete
-
-```mojo
-{{#include ../../../problems/p07/p07_layout_tensor.mojo:add_10_blocks_2d_layout_tensor}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p07/p07_layout_tensor.mojo" class="filename">View full file: problems/p07/p07_layout_tensor.mojo</a>
-
-<details>
-<summary><strong>Tips</strong></summary>
-
-<div class="solution-tips">
-
-1. Calculate global indices: `row = block_dim.y * block_idx.y + thread_idx.y`, `col = block_dim.x * block_idx.x + thread_idx.x`
-2. Add guard: `if row < size and col < size`
-3. Inside guard: think about how to add 10 to 2D LayoutTensor
-
-</div>
-</details>
-
-## Running the code
-
-To test your solution, run the following command in your terminal:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p07_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p07_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p07_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p07_layout_tensor
-```
-
-  </div>
-</div>
-
-Your output will look like this if the puzzle isn't solved yet:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, ... , 0.0])
-expected: HostBuffer([10.0, 11.0, 12.0, ... , 34.0])
-```
-
-## Solution
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../solutions/p07/p07_layout_tensor.mojo:add_10_blocks_2d_layout_tensor_solution}}
-```
-
-<div class="solution-explanation">
-
-This solution demonstrates how LayoutTensor simplifies 2D block-based processing:
-
-1. **2D thread indexing**
-   - Global row: `block_dim.y * block_idx.y + thread_idx.y`
-   - Global col: `block_dim.x * block_idx.x + thread_idx.x`
-   - Maps thread grid to tensor elements:
-
-     ```txt
-     5×5 tensor with 3×3 blocks:
-
-     Block (0,0)         Block (1,0)
-     [(0,0) (0,1) (0,2)] [(0,3) (0,4)    *  ]
-     [(1,0) (1,1) (1,2)] [(1,3) (1,4)    *  ]
-     [(2,0) (2,1) (2,2)] [(2,3) (2,4)    *  ]
-
-     Block (0,1)         Block (1,1)
-     [(3,0) (3,1) (3,2)] [(3,3) (3,4)    *  ]
-     [(4,0) (4,1) (4,2)] [(4,3) (4,4)    *  ]
-     [  *     *     *  ] [  *     *      *  ]
-     ```
-
-     (* = thread exists but outside tensor bounds)
-
-2. **LayoutTensor benefits**
-   - Natural 2D indexing: `tensor[row, col]` instead of manual offset calculation
-   - Automatic memory layout optimization
-   - Example access pattern:
-
-     ```txt
-     Raw memory:         LayoutTensor:
-     row * size + col    tensor[row, col]
-     (2,1) -> 11        (2,1) -> same element
-     ```
-
-3. **Bounds checking**
-   - Guard `row < size and col < size` handles:
-     - Excess threads in partial blocks
-     - Edge cases at tensor boundaries
-     - Automatic memory layout handling by LayoutTensor
-     - 36 threads (2×2 blocks of 3×3) for 25 elements
-
-4. **Block coordination**
-   - Each 3×3 block processes part of 5×5 tensor
-   - LayoutTensor handles:
-     - Memory layout optimization
-     - Efficient access patterns
-     - Block boundary coordination
-     - Cache-friendly data access
-
-This pattern shows how LayoutTensor simplifies 2D block processing while maintaining optimal memory access patterns and thread coordination.
-</div>
-</details>
diff --git a/book/src/puzzle_07/puzzle_07.md b/book/src/puzzle_07/puzzle_07.md
index 4a35aef0..ffea68dc 100644
--- a/book/src/puzzle_07/puzzle_07.md
+++ b/book/src/puzzle_07/puzzle_07.md
@@ -2,7 +2,7 @@
 
 ## Overview
 
-Implement a kernel that adds 10 to each position of matrix `a` and stores it in `output`.
+Implement a kernel that adds 10 to each position of 2D TileTensor `a` and stores it in 2D TileTensor `output`.
 
 **Note:** _You have fewer threads per block than the size of `a` in both directions._
 
@@ -11,10 +11,13 @@ Implement a kernel that adds 10 to each position of matrix `a` and stores it in
 
 ## Key concepts
 
-- Block-based processing
-- Grid-block coordination
-- Multi-block indexing
-- Memory access patterns
+In this puzzle, you'll learn about:
+
+- Using `TileTensor` with multiple blocks
+- Handling large matrices with 2D block organization
+- Combining block indexing with `TileTensor` access
+
+The key insight is that `TileTensor` simplifies 2D indexing while still requiring proper block coordination for large matrices.
 
 > 🔑 **2D thread indexing convention**
 >
@@ -43,12 +46,143 @@ Implement a kernel that adds 10 to each position of matrix `a` and stores it in
 > - No overlap between blocks
 > - Efficient memory access patterns
 
-## Implementation approaches
+## Configuration
+
+- **Matrix size**: \\(5 \times 5\\) elements
+- **Layout handling**: `TileTensor` manages row-major organization
+- **Block coordination**: Multiple blocks cover the full matrix
+- **2D indexing**: Natural \\((i,j)\\) access with bounds checking
+- **Total threads**: \\(36\\) for \\(25\\) elements
+- **Thread mapping**: Each thread processes one matrix element
+
+## Code to complete
+
+```mojo
+{{#include ../../../problems/p07/p07.mojo:add_10_blocks_2d}}
+```
+
+<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p07/p07.mojo" class="filename">View full file: problems/p07/p07.mojo</a>
+
+<details>
+<summary><strong>Tips</strong></summary>
+
+<div class="solution-tips">
+
+1. Calculate global indices: `row = block_dim.y * block_idx.y + thread_idx.y`, `col = block_dim.x * block_idx.x + thread_idx.x`
+2. Add guard: `if row < size and col < size`
+3. Inside guard: think about how to add 10 to 2D TileTensor
+
+</div>
+</details>
+
+## Running the code
+
+To test your solution, run the following command in your terminal:
+
+<div class="code-tabs" data-tab-group="package-manager">
+  <div class="tab-buttons">
+    <button class="tab-button">pixi NVIDIA (default)</button>
+    <button class="tab-button">pixi AMD</button>
+    <button class="tab-button">pixi Apple</button>
+    <button class="tab-button">uv</button>
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run p07
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e amd p07
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e apple p07
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+uv run poe p07
+```
+
+  </div>
+</div>
+
+Your output will look like this if the puzzle isn't solved yet:
+
+```txt
+out: HostBuffer([0.0, 0.0, 0.0, ... , 0.0])
+expected: HostBuffer([10.0, 11.0, 12.0, ... , 34.0])
+```
+
+## Solution
+
+<details class="solution-details">
+<summary></summary>
+
+```mojo
+{{#include ../../../solutions/p07/p07.mojo:add_10_blocks_2d_solution}}
+```
+
+<div class="solution-explanation">
+
+This solution demonstrates how TileTensor simplifies 2D block-based processing:
+
+1. **2D thread indexing**
+   - Global row: `block_dim.y * block_idx.y + thread_idx.y`
+   - Global col: `block_dim.x * block_idx.x + thread_idx.x`
+   - Maps thread grid to tensor elements:
+
+     ```txt
+     5×5 tensor with 3×3 blocks:
+
+     Block (0,0)         Block (1,0)
+     [(0,0) (0,1) (0,2)] [(0,3) (0,4)    *  ]
+     [(1,0) (1,1) (1,2)] [(1,3) (1,4)    *  ]
+     [(2,0) (2,1) (2,2)] [(2,3) (2,4)    *  ]
+
+     Block (0,1)         Block (1,1)
+     [(3,0) (3,1) (3,2)] [(3,3) (3,4)    *  ]
+     [(4,0) (4,1) (4,2)] [(4,3) (4,4)    *  ]
+     [  *     *     *  ] [  *     *      *  ]
+     ```
+
+     (* = thread exists but outside tensor bounds)
+
+2. **TileTensor benefits**
+   - Natural 2D indexing: `tensor[row, col]` instead of manual offset calculation
+   - Automatic memory layout optimization
+   - Example access pattern:
+
+     ```txt
+     Raw memory:         TileTensor:
+     row * size + col    tensor[row, col]
+     (2,1) -> 11        (2,1) -> same element
+     ```
 
-### [🔰 Raw memory approach](./raw.md)
-Learn how to handle multi-block operations with manual indexing.
+3. **Bounds checking**
+   - Guard `row < size and col < size` handles:
+     - Excess threads in partial blocks
+     - Edge cases at tensor boundaries
+     - Automatic memory layout handling by TileTensor
+     - 36 threads (2×2 blocks of 3×3) for 25 elements
 
-### [📐 LayoutTensor Version](./layout_tensor.md)
-Use LayoutTensor features to elegantly handle block-based processing.
+4. **Block coordination**
+   - Each 3×3 block processes part of 5×5 tensor
+   - TileTensor handles:
+     - Memory layout optimization
+     - Efficient access patterns
+     - Block boundary coordination
+     - Cache-friendly data access
 
-💡 **Note**: See how LayoutTensor simplifies block coordination and memory access patterns.
+This pattern shows how TileTensor simplifies 2D block processing while maintaining optimal memory access patterns and thread coordination.
+</div>
+</details>
diff --git a/book/src/puzzle_07/raw.md b/book/src/puzzle_07/raw.md
deleted file mode 100644
index 006e5842..00000000
--- a/book/src/puzzle_07/raw.md
+++ /dev/null
@@ -1,155 +0,0 @@
-## Overview
-
-Implement a kernel that adds 10 to each position of matrix `a` and stores it in `output`.
-
-**Note:** _You have fewer threads per block than the size of `a` in both directions._
-
-## Key concepts
-
-In this puzzle, you'll learn about:
-
-- Working with 2D block and thread arrangements
-- Handling matrix data larger than block size
-- Converting between 2D and linear memory access
-
-The key insight is understanding how to coordinate multiple blocks of threads to process a 2D matrix that's larger than a single block's dimensions.
-
-## Configuration
-
-- **Matrix size**: \\(5 \times 5\\) elements
-- **2D blocks**: Each block processes a \\(3 \times 3\\) region
-- **Grid layout**: Blocks arranged in \\(2 \times 2\\) grid
-- **Total threads**: \\(36\\) for \\(25\\) elements
-- **Memory pattern**: Row-major storage for 2D data
-- **Coverage**: Ensuring all matrix elements are processed
-
-## Code to complete
-
-```mojo
-{{#include ../../../problems/p07/p07.mojo:add_10_blocks_2d}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p07/p07.mojo" class="filename">View full file: problems/p07/p07.mojo</a>
-
-<details>
-<summary><strong>Tips</strong></summary>
-
-<div class="solution-tips">
-
-1. Calculate global indices: `row = block_dim.y * block_idx.y + thread_idx.y`, `col = block_dim.x * block_idx.x + thread_idx.x`
-2. Add guard: `if row < size and col < size`
-3. Inside guard: think about how to add 10 in row-major way!
-
-</div>
-</details>
-
-## Running the code
-
-To test your solution, run the following command in your terminal:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p07
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p07
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p07
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p07
-```
-
-  </div>
-</div>
-
-Your output will look like this if the puzzle isn't solved yet:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, ... , 0.0])
-expected: HostBuffer([10.0, 11.0, 12.0, ... , 34.0])
-```
-
-## Solution
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../solutions/p07/p07.mojo:add_10_blocks_2d_solution}}
-```
-
-<div class="solution-explanation">
-
-This solution demonstrates key concepts of 2D block-based processing with raw memory:
-
-1. **2D thread indexing**
-   - Global row: `block_dim.y * block_idx.y + thread_idx.y`
-   - Global col: `block_dim.x * block_idx.x + thread_idx.x`
-   - Maps thread grid to matrix elements:
-
-     ```txt
-     5×5 matrix with 3×3 blocks:
-
-     Block (0,0)         Block (1,0)
-     [(0,0) (0,1) (0,2)] [(0,3) (0,4)    *  ]
-     [(1,0) (1,1) (1,2)] [(1,3) (1,4)    *  ]
-     [(2,0) (2,1) (2,2)] [(2,3) (2,4)    *  ]
-
-     Block (0,1)         Block (1,1)
-     [(3,0) (3,1) (3,2)] [(3,3) (3,4)    *  ]
-     [(4,0) (4,1) (4,2)] [(4,3) (4,4)    *  ]
-     [  *     *     *  ] [  *     *      *  ]
-     ```
-
-     (* = thread exists but outside matrix bounds)
-
-2. **Memory layout**
-   - Row-major linear memory: `index = row * size + col`
-   - Example for 5×5 matrix:
-
-     ```txt
-     2D indices:    Linear memory:
-     (2,1) -> 11   [00 01 02 03 04]
-                   [05 06 07 08 09]
-                   [10 11 12 13 14]
-                   [15 16 17 18 19]
-                   [20 21 22 23 24]
-     ```
-
-3. **Bounds checking**
-   - Guard `row < size and col < size` handles:
-     - Excess threads in partial blocks
-     - Edge cases at matrix boundaries
-     - 2×2 block grid with 3×3 threads each = 36 threads for 25 elements
-
-4. **Block coordination**
-   - Each 3×3 block processes part of 5×5 matrix
-   - 2×2 grid of blocks ensures full coverage
-   - Overlapping threads handled by bounds check
-   - Efficient parallel processing across blocks
-
-This pattern shows how to handle 2D data larger than block size while maintaining efficient memory access and thread coordination.
-</div>
-</details>
diff --git a/book/src/puzzle_08/layout_tensor.md b/book/src/puzzle_08/layout_tensor.md
deleted file mode 100644
index e85ec4a7..00000000
--- a/book/src/puzzle_08/layout_tensor.md
+++ /dev/null
@@ -1,191 +0,0 @@
-## Overview
-
-Implement a kernel that adds 10 to each position of a 1D LayoutTensor `a` and stores it in 1D LayoutTensor `output`.
-
-**Note:** _You have fewer threads per block than the size of `a`._
-
-## Key concepts
-
-In this puzzle, you'll learn about:
-
-- Using LayoutTensor's shared memory features with address_space
-- Thread synchronization with shared memory
-- Block-local data management with LayoutTensor
-
-The key insight is how LayoutTensor simplifies shared memory management while maintaining the performance benefits of block-local storage.
-
-## Configuration
-
-- Array size: `SIZE = 8` elements
-- Threads per block: `TPB = 4`
-- Number of blocks: 2
-- Shared memory: `TPB` elements per block
-
-## Key differences from raw approach
-
-1. **Memory allocation**: We will use [LayoutTensor](https://docs.modular.com/mojo/kernels/layout/layout_tensor/LayoutTensor) with address_space instead of [stack_allocation](https://docs.modular.com/mojo/std/memory/memory/stack_allocation/)
-
-   ```mojo
-   # Raw approach
-   shared = stack_allocation[TPB, Scalar[dtype]]()
-
-   # LayoutTensor approach
-   shared = LayoutTensor[dtype, Layout.row_major(TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
-   ```
-
-2. **Memory access**: Same syntax
-
-   ```mojo
-   # Raw approach
-   shared[local_i] = a[global_i]
-
-   # LayoutTensor approach
-   shared[local_i] = a[global_i]
-   ```
-
-3. **Safety features**:
-
-   - Type safety
-   - Layout management
-   - Memory alignment handling
-
-> **Note**: LayoutTensor handles memory layout, but you still need to manage thread synchronization with `barrier()` when using shared memory.
-
-**Educational Note**: In this specific puzzle, the `barrier()` isn't strictly necessary since each thread only accesses its own shared memory location. However, it's included to teach proper shared memory synchronization patterns for more complex scenarios where threads need to coordinate access to shared data.
-
-## Code to complete
-
-```mojo
-{{#include ../../../problems/p08/p08_layout_tensor.mojo:add_10_shared_layout_tensor}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p08/p08_layout_tensor.mojo" class="filename">View full file: problems/p08/p08_layout_tensor.mojo</a>
-
-<details>
-<summary><strong>Tips</strong></summary>
-
-<div class="solution-tips">
-
-1. Create shared memory with LayoutTensor using address_space parameter
-2. Load data with natural indexing: `shared[local_i] = a[global_i]`
-3. Synchronize with `barrier()` (educational - not strictly needed here)
-4. Process data using shared memory indices
-5. Guard against out-of-bounds access
-
-</div>
-</details>
-
-## Running the code
-
-To test your solution, run the following command in your terminal:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p08_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p08_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p08_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p08_layout_tensor
-```
-
-  </div>
-</div>
-
-Your output will look like this if the puzzle isn't solved yet:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
-expected: HostBuffer([11.0, 11.0, 11.0, 11.0, 11.0, 11.0, 11.0, 11.0])
-```
-
-## Solution
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../solutions/p08/p08_layout_tensor.mojo:add_10_shared_layout_tensor_solution}}
-```
-
-<div class="solution-explanation">
-
-This solution demonstrates how LayoutTensor simplifies shared memory usage while maintaining performance:
-
-1. **Memory hierarchy with LayoutTensor**
-   - Global tensors: `a` and `output` (slow, visible to all blocks)
-   - Shared tensor: `shared` (fast, thread-block local)
-   - Example for 8 elements with 4 threads per block:
-
-     ```txt
-     Global tensor a: [1 1 1 1 | 1 1 1 1]  # Input: all ones
-
-     Block (0):         Block (1):
-     shared[0..3]       shared[0..3]
-     [1 1 1 1]          [1 1 1 1]
-     ```
-
-2. **Thread coordination**
-   - Load phase with natural indexing:
-
-     ```txt
-     Thread 0: shared[0] = a[0]=1    Thread 2: shared[2] = a[2]=1
-     Thread 1: shared[1] = a[1]=1    Thread 3: shared[3] = a[3]=1
-     barrier()    ↓         ↓        ↓         ↓   # Wait for all loads
-     ```
-
-   - Process phase: Each thread adds 10 to its shared tensor value
-   - Result: `output[global_i] = shared[local_i] + 10 = 11`
-
-   **Note**: In this specific case, the `barrier()` isn't strictly necessary since each thread only writes to and reads from its own shared memory location (`shared[local_i]`). However, it's included for educational purposes to demonstrate proper shared memory synchronization patterns that are essential when threads need to access each other's data.
-
-3. **LayoutTensor benefits**
-   - Shared memory allocation:
-
-     ```txt
-     # Clean LayoutTensor API with address_space
-     shared = LayoutTensor[dtype, Layout.row_major(TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
-     ```
-
-   - Natural indexing for both global and shared:
-
-     ```txt
-     Block 0 output: [11 11 11 11]
-     Block 1 output: [11 11 11 11]
-     ```
-
-   - Built-in layout management and type safety
-
-4. **Memory access pattern**
-   - Load: Global tensor → Shared tensor (optimized)
-   - Sync: Same `barrier()` requirement as raw version
-   - Process: Add 10 to shared values
-   - Store: Write 11s back to global tensor
-
-This pattern shows how LayoutTensor maintains the performance benefits of shared memory while providing a more ergonomic API and built-in features.
-</div>
-</details>
diff --git a/book/src/puzzle_08/puzzle_08.md b/book/src/puzzle_08/puzzle_08.md
index 2b8ced1e..15081cad 100644
--- a/book/src/puzzle_08/puzzle_08.md
+++ b/book/src/puzzle_08/puzzle_08.md
@@ -2,19 +2,169 @@
 
 ## Overview
 
-Implement a kernel that adds 10 to each position of a vector `a` and stores it in vector `output`.
+Implement a kernel that adds 10 to each position of a 1D TileTensor `a` and stores it in 1D TileTensor `output`.
+
+**Shared memory** is fast, on-chip storage that is visible to all threads within the same block. Unlike global memory (which all blocks can access but is slow), shared memory has latency similar to a CPU register cache. Each block gets its own private shared memory region — threads in one block cannot see the shared memory of another block. Because threads can read and write to the same shared memory locations, coordination via `barrier()` is required to prevent one thread from reading a value before another thread has finished writing it.
 
 **Note:** _You have fewer threads per block than the size of `a`._
 
 <img src="./media/08.png" alt="Shared memory visualization" class="light-mode-img">
 <img src="./media/08d.png" alt="Shared memory visualization" class="dark-mode-img">
 
-## Implementation approaches
+## Key concepts
+
+In this puzzle, you'll learn about:
+
+- Using TileTensor's shared memory features with address_space
+- Thread synchronization with shared memory
+- Block-local data management with TileTensor
+
+The key insight is how TileTensor simplifies shared memory management while maintaining the performance benefits of block-local storage.
+
+## Configuration
+
+- Array size: `SIZE = 8` elements
+- Threads per block: `TPB = 4`
+- Number of blocks: 2
+- Shared memory: `TPB` elements per block
+
+> **Warning**: Each block can only have a _constant_ amount of shared memory that threads in that block can read and write to. This needs to be a literal python constant, not a variable. After writing to shared memory you need to call [barrier](https://docs.modular.com/mojo/std/gpu/sync/sync/barrier/) to ensure that threads do not cross.
+
+**Educational Note**: In this specific puzzle, the `barrier()` isn't strictly necessary since each thread only accesses its own shared memory location. However, it's included to teach proper shared memory synchronization patterns for more complex scenarios where threads need to coordinate access to shared data.
+
+## Code to complete
+
+```mojo
+{{#include ../../../problems/p08/p08.mojo:add_10_shared}}
+```
+
+<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p08/p08.mojo" class="filename">View full file: problems/p08/p08.mojo</a>
+
+<details>
+<summary><strong>Tips</strong></summary>
+
+<div class="solution-tips">
+
+1. Create shared memory with TileTensor using address_space parameter
+2. Load data with natural indexing: `shared[local_i] = a[global_i]`
+3. Synchronize with `barrier()` (educational - not strictly needed here)
+4. Process data using shared memory indices
+5. Guard against out-of-bounds access
+
+</div>
+</details>
+
+## Running the code
+
+To test your solution, run the following command in your terminal:
+
+<div class="code-tabs" data-tab-group="package-manager">
+  <div class="tab-buttons">
+    <button class="tab-button">pixi NVIDIA (default)</button>
+    <button class="tab-button">pixi AMD</button>
+    <button class="tab-button">pixi Apple</button>
+    <button class="tab-button">uv</button>
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run p08
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e amd p08
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e apple p08
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+uv run poe p08
+```
+
+  </div>
+</div>
+
+Your output will look like this if the puzzle isn't solved yet:
+
+```txt
+out: HostBuffer([0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
+expected: HostBuffer([11.0, 11.0, 11.0, 11.0, 11.0, 11.0, 11.0, 11.0])
+```
+
+## Solution
+
+<details class="solution-details">
+<summary></summary>
+
+```mojo
+{{#include ../../../solutions/p08/p08.mojo:add_10_shared_solution}}
+```
+
+<div class="solution-explanation">
+
+This solution demonstrates how TileTensor simplifies shared memory usage while maintaining performance:
+
+1. **Memory hierarchy with TileTensor**
+   - Global tensors: `a` and `output` (slow, visible to all blocks)
+   - Shared tensor: `shared` (fast, thread-block local)
+   - Example for 8 elements with 4 threads per block:
+
+     ```txt
+     Global tensor a: [1 1 1 1 | 1 1 1 1]  # Input: all ones
+
+     Block (0):         Block (1):
+     shared[0..3]       shared[0..3]
+     [1 1 1 1]          [1 1 1 1]
+     ```
+
+2. **Thread coordination**
+   - Load phase with natural indexing:
+
+     ```txt
+     Thread 0: shared[0] = a[0]=1    Thread 2: shared[2] = a[2]=1
+     Thread 1: shared[1] = a[1]=1    Thread 3: shared[3] = a[3]=1
+     barrier()    ↓         ↓        ↓         ↓   # Wait for all loads
+     ```
+
+   - Process phase: Each thread adds 10 to its shared tensor value
+   - Result: `output[global_i] = shared[local_i] + 10 = 11`
+
+   **Note**: In this specific case, the `barrier()` isn't strictly necessary since each thread only writes to and reads from its own shared memory location (`shared[local_i]`). However, it's included for educational purposes to demonstrate proper shared memory synchronization patterns that are essential when threads need to access each other's data.
+
+3. **TileTensor benefits**
+   - Shared memory allocation:
+
+     ```txt
+     # Clean TileTensor API with address_space
+     shared = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB]())
+     ```
+
+   - Natural indexing for both global and shared:
+
+     ```txt
+     Block 0 output: [11 11 11 11]
+     Block 1 output: [11 11 11 11]
+     ```
 
-### [🔰 Raw memory approach](./raw.md)
-Learn how to manually manage shared memory and synchronization.
+   - Built-in layout management and type safety
 
-### [📐 LayoutTensor Version](./layout_tensor.md)
-Use LayoutTensor's built-in shared memory management features.
+4. **Memory access pattern**
+   - Load: Global tensor → Shared tensor (optimized)
+   - Sync: Same `barrier()` requirement as raw version
+   - Process: Add 10 to shared values
+   - Store: Write 11s back to global tensor
 
-💡 **Note**: Experience how LayoutTensor simplifies shared memory operations while maintaining performance.
+This pattern shows how TileTensor maintains the performance benefits of shared memory while providing a more ergonomic API and built-in features.
+</div>
+</details>
diff --git a/book/src/puzzle_08/raw.md b/book/src/puzzle_08/raw.md
deleted file mode 100644
index 7729bf8a..00000000
--- a/book/src/puzzle_08/raw.md
+++ /dev/null
@@ -1,166 +0,0 @@
-## Overview
-
-Implement a kernel that adds 10 to each position of a vector `a` and stores it in `output`.
-
-**Note:** _You have fewer threads per block than the size of `a`._
-
-## Key concepts
-
-In this puzzle, you'll learn about:
-
-- Using shared memory within thread blocks
-- Synchronizing threads with barriers
-- Managing block-local data storage
-
-The key insight is understanding how shared memory provides fast, block-local storage that all threads in a block can access, requiring careful coordination between threads.
-
-## Configuration
-
-- Array size: `SIZE = 8` elements
-- Threads per block: `TPB = 4`
-- Number of blocks: 2
-- Shared memory: `TPB` elements per block
-
-Notes:
-
-- **Shared memory**: Fast storage shared by threads in a block
-- **Thread sync**: Coordination using `barrier()`
-- **Memory scope**: Shared memory only visible within block
-- **Access pattern**: Local vs global indexing
-
-> **Warning**: Each block can only have a _constant_ amount of shared memory that threads in that block can read and write to. This needs to be a literal python constant, not a variable. After writing to shared memory you need to call [barrier](https://docs.modular.com/mojo/std/gpu/sync/sync/barrier/) to ensure that threads do not cross.
-
-**Educational Note**: In this specific puzzle, the `barrier()` isn't strictly necessary since each thread only accesses its own shared memory location. However, it's included to teach proper shared memory synchronization patterns for more complex scenarios where threads need to coordinate access to shared data.
-
-## Code to complete
-
-```mojo
-{{#include ../../../problems/p08/p08.mojo:add_10_shared}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p08/p08.mojo" class="filename">View full file: problems/p08/p08.mojo</a>
-
-<details>
-<summary><strong>Tips</strong></summary>
-
-<div class="solution-tips">
-
-1. Wait for shared memory load with `barrier()` (educational - not strictly needed here)
-2. Use `local_i` to access shared memory: `shared[local_i]`
-3. Use `global_i` for output: `output[global_i]`
-4. Add guard: `if global_i < size`
-
-</div>
-</details>
-
-## Running the code
-
-To test your solution, run the following command in your terminal:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p08
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p08
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p08
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p08
-```
-
-  </div>
-</div>
-
-Your output will look like this if the puzzle isn't solved yet:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
-expected: HostBuffer([11.0, 11.0, 11.0, 11.0, 11.0, 11.0, 11.0, 11.0])
-```
-
-## Solution
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../solutions/p08/p08.mojo:add_10_shared_solution}}
-```
-
-<div class="solution-explanation">
-
-This solution demonstrates key concepts of shared memory usage in GPU programming:
-
-1. **Memory hierarchy**
-   - Global memory: `a` and `output` arrays (slow, visible to all blocks)
-   - Shared memory: `shared` array (fast, thread-block local)
-   - Example for 8 elements with 4 threads per block:
-
-     ```txt
-     Global array a: [1 1 1 1 | 1 1 1 1]  # Input: all ones
-
-     Block (0):      Block (1):
-     shared[0..3]    shared[0..3]
-     [1 1 1 1]       [1 1 1 1]
-     ```
-
-2. **Thread coordination**
-   - Load phase:
-
-     ```txt
-     Thread 0: shared[0] = a[0]=1    Thread 2: shared[2] = a[2]=1
-     Thread 1: shared[1] = a[1]=1    Thread 3: shared[3] = a[3]=1
-     barrier()    ↓         ↓        ↓         ↓   # Wait for all loads
-     ```
-
-   - Process phase: Each thread adds 10 to its shared memory value
-   - Result: `output[i] = shared[local_i] + 10 = 11`
-
-   **Note**: In this specific case, the `barrier()` isn't strictly necessary since each thread only writes to and reads from its own shared memory location (`shared[local_i]`). However, it's included for educational purposes to demonstrate proper shared memory synchronization patterns that are essential when threads need to access each other's data.
-
-3. **Index mapping**
-   - Global index: `block_dim.x * block_idx.x + thread_idx.x`
-
-     ```txt
-     Block 0 output: [11 11 11 11]
-     Block 1 output: [11 11 11 11]
-     ```
-
-   - Local index: `thread_idx.x` for shared memory access
-
-     ```txt
-     Both blocks process: 1 + 10 = 11
-     ```
-
-4. **Memory access pattern**
-   - Load: Global → Shared (coalesced reads of 1s)
-   - Sync: `barrier()` ensures all loads complete
-   - Process: Add 10 to shared values
-   - Store: Write 11s back to global memory
-
-This pattern shows how to use shared memory to optimize data access while maintaining thread coordination within blocks.
-</div>
-</details>
diff --git a/book/src/puzzle_09/puzzle_09.md b/book/src/puzzle_09/puzzle_09.md
index 805aee36..6715ba58 100644
--- a/book/src/puzzle_09/puzzle_09.md
+++ b/book/src/puzzle_09/puzzle_09.md
@@ -78,7 +78,7 @@ This puzzle takes you through a carefully designed progression from basic debugg
 
 **Logic bug investigation** - Debug a program with wrong results
 
-- Investigate LayoutTensor-based algorithmic errors
+- Investigate TileTensor-based algorithmic errors
 - Learn execution flow analysis when variables are optimized out
 - Learn loop boundary analysis and iteration counting
 - Practice pattern recognition in incorrect results
diff --git a/book/src/puzzle_09/second_case.md b/book/src/puzzle_09/second_case.md
index 5827e8e6..eaf7d2e0 100644
--- a/book/src/puzzle_09/second_case.md
+++ b/book/src/puzzle_09/second_case.md
@@ -8,7 +8,7 @@ Building on your [crash debugging skills from the First Case](./first_case.md),
 - **[First Case](./first_case.md)**: Clear crash signals (`CUDA_ERROR_ILLEGAL_ADDRESS`) guided your investigation
 - **Second Case**: No crashes, no error messages - just subtly wrong results that require detective work
 
-This intermediate-level debugging challenge covers investigating **algorithmic errors** using `LayoutTensor` operations, where the program runs successfully but produces wrong output - a much more common (and trickier) real-world debugging scenario.
+This intermediate-level debugging challenge covers investigating **algorithmic errors** using `TileTensor` operations, where the program runs successfully but produces wrong output - a much more common (and trickier) real-world debugging scenario.
 
 **Prerequisites**: Complete [Mojo GPU Debugging Essentials](./essentials.md) and [Detective Work: First Case](./first_case.md) to understand CUDA-GDB workflow and systematic debugging techniques. Make sure you run the setup:
 
@@ -20,7 +20,7 @@ pixi run -e nvidia setup-cuda-gdb
 
 In this debugging challenge, you'll learn about:
 
-- **LayoutTensor debugging**: Investigating structured data access patterns
+- **TileTensor debugging**: Investigating structured data access patterns
 - **Logic bug detection**: Finding algorithmic errors that don't crash
 - **Loop boundary analysis**: Understanding iteration count problems
 - **Result pattern analysis**: Using output data to trace back to root causes
@@ -155,14 +155,14 @@ Each position should sum its neighbors: [left + center + right]
 CUDA thread hit application kernel entry function breakpoint, p09_process_sliding_window_...
    <<<(1,1,1),(4,1,1)>>> (output=..., input=...)
     at /home/ubuntu/workspace/mojo-gpu-puzzles/problems/p09/p09.mojo:30
-30          input: LayoutTensor[mut=False, dtype, vector_layout],
+30          input: TileTensor[mut=False, dtype, vector_layout],
 ```
 
 #### Step 4: Navigate to the main logic
 
 ```bash
 (cuda-gdb) n
-29          output: LayoutTensor[mut=True, dtype, vector_layout],
+29          output: TileTensor[mut=True, dtype, vector_layout],
 (cuda-gdb) n
 32          thread_id = thread_idx.x
 (cuda-gdb) n
@@ -190,7 +190,7 @@ Cannot access memory at address 0x0
 Attempt to take address of value not located in memory.
 ```
 
-**❌ Problem**: Direct LayoutTensor indexing doesn't work.
+**❌ Problem**: Direct TileTensor indexing doesn't work.
 
 ```bash
 (cuda-gdb) p a.ptr[0]
@@ -199,7 +199,7 @@ $2 = {0}
 $3 = {{0}, {1}, {2}, {3}}
 ```
 
-**🎯 BREAKTHROUGH**: `a.ptr[0]@4` shows the full input array! This is how we can inspect LayoutTensor data.
+**🎯 BREAKTHROUGH**: `a.ptr[0]@4` shows the full input array! This is how we can inspect TileTensor data.
 
 ### Phase 3: The critical loop investigation
 
@@ -353,9 +353,9 @@ for offset in range(ITER):           # ← Only 2 iterations: [0, 1]
 - **Host output patterns** provide crucial debugging clues
 - **Source code reasoning** complements limited debugger capabilities
 
-**LayoutTensor Debugging**:
+**TileTensor Debugging**:
 
-- Even with LayoutTensor abstractions, underlying algorithmic bugs still manifest
+- Even with TileTensor abstractions, underlying algorithmic bugs still manifest
 - Focus on the algorithm logic rather than trying to inspect tensor contents
 - Use systematic reasoning to trace what each thread should vs actually accesses
 
diff --git a/book/src/puzzle_09/third_case.md b/book/src/puzzle_09/third_case.md
index ff6ce70d..94b87aa2 100644
--- a/book/src/puzzle_09/third_case.md
+++ b/book/src/puzzle_09/third_case.md
@@ -9,7 +9,7 @@ You've learned debugging [memory crashes](./first_case.md) and [logic bugs](./se
 - **[Second Case](./second_case.md)**: Program produces wrong results → Analyze patterns → Find logic bugs
 - **Third Case**: Program hangs forever → Investigate thread states → Find coordination bugs
 
-This advanced-level debugging challenge teaches you to investigate **thread coordination failures** using shared memory, LayoutTensor operations, and barrier synchronization - combining all the systematic investigation skills from the previous cases.
+This advanced-level debugging challenge teaches you to investigate **thread coordination failures** using shared memory, TileTensor operations, and barrier synchronization - combining all the systematic investigation skills from the previous cases.
 
 **Prerequisites**: Complete [Mojo GPU Debugging Essentials](./essentials.md), [Detective Work: First Case](./first_case.md), and [Detective Work: Second Case](./second_case.md) to understand CUDA-GDB workflow, variable inspection limitations, and systematic debugging approaches. Make sure you run the setup:
 
@@ -21,7 +21,7 @@ pixi run -e nvidia setup-cuda-gdb
 
 In this debugging challenge, you'll learn about:
 - **Barrier deadlock detection**: Identifying when threads wait forever at synchronization points
-- **Shared memory coordination**: Understanding thread cooperation patterns with LayoutTensor
+- **Shared memory coordination**: Understanding thread cooperation patterns with TileTensor
 - **Conditional execution analysis**: Debugging when some threads take different code paths
 - **Thread coordination debugging**: Using CUDA-GDB to analyze multi-thread synchronization failures
 
@@ -146,7 +146,7 @@ Waiting for GPU computation to complete...
 CUDA thread hit application kernel entry function breakpoint, p09_collaborative_filter_Orig6A6AcB6A6A_1882ca334fc2d34b2b9c4fa338df6c07<<<(1,1,1),(4,1,1)>>> (
     output=..., a=...)
     at /home/ubuntu/workspace/mojo-gpu-puzzles/problems/p09/p09.mojo:56
-56          a: LayoutTensor[mut=False, dtype, vector_layout],
+56          a: TileTensor[mut=False, dtype, vector_layout],
 ```
 
 **🔍 Key Observations**:
@@ -158,7 +158,7 @@ CUDA thread hit application kernel entry function breakpoint, p09_collaborative_
 #### Step 4: navigate through initialization
 ```bash
 (cuda-gdb) n
-55          output: LayoutTensor[mut=True, dtype, vector_layout],
+55          output: TileTensor[mut=True, dtype, vector_layout],
 (cuda-gdb) n
 58          thread_id = thread_idx.x
 (cuda-gdb) n
@@ -289,13 +289,13 @@ if thread_id < SIZE - 1:    # Not all threads enter
 **The Fix**: Move the barrier outside the conditional block:
 ```mojo
 def collaborative_filter(
-    output: LayoutTensor[mut=True, dtype, vector_layout],
-    a: LayoutTensor[mut=False, dtype, vector_layout],
+    output: TileTensor[mut=True, dtype, vector_layout],
+    a: TileTensor[mut=False, dtype, vector_layout],
 ):
     thread_id = thread_idx.x
-    shared_workspace = LayoutTensor[
+    shared_workspace = TileTensor[
         dtype,
-        Layout.row_major(SIZE-1),
+        row_major[SIZE-1](),
         MutAnyOrigin,
         address_space = AddressSpace.SHARED,
     ].stack_allocation()
@@ -339,7 +339,7 @@ def collaborative_filter(
 - **Barrier rule**: ALL threads in a block must reach the SAME barrier
 - **Conditional execution pitfalls**: Any if-statement can cause thread divergence
 - **Shared memory coordination**: Requires careful barrier placement for correct synchronization
-- **LayoutTensor doesn't prevent deadlocks**: Higher-level abstractions still need correct synchronization
+- **TileTensor doesn't prevent deadlocks**: Higher-level abstractions still need correct synchronization
 
 **💡 Key Insight**: Barrier deadlocks are among the hardest GPU bugs to debug because:
 - **No visible error** - just infinite waiting
diff --git a/book/src/puzzle_10/memcheck.md b/book/src/puzzle_10/memcheck.md
index 697825f6..7ccf050a 100644
--- a/book/src/puzzle_10/memcheck.md
+++ b/book/src/puzzle_10/memcheck.md
@@ -6,13 +6,13 @@ Learn how to detect memory violations that can silently corrupt GPU programs, ev
 
 **Key insight**: A GPU program can produce "correct" results while simultaneously performing illegal memory accesses.
 
-**Prerequisites**: Understanding of [Puzzle 4 LayoutTensor](../puzzle_04/introduction_layout_tensor.md) and basic GPU memory concepts.
+**Prerequisites**: Understanding of [Puzzle 4 TileTensor](../puzzle_04/introduction_tile_tensor.md) and basic GPU memory concepts.
 
 ## The silent memory bug discovery
 
 ### Test passes, but is my code actually correct?
 
-Let's start with a seemingly innocent program that appears to work perfectly (this is [Puzzle 04](../puzzle_04/layout_tensor.md) without guards):
+Let's start with a seemingly innocent program that appears to work perfectly (this is [Puzzle 04](../puzzle_04/tile_tensor.md) without guards):
 
 ```mojo
 {{#include ../../../problems/p10/p10.mojo:add_10_2d_no_guard}}
@@ -151,10 +151,10 @@ The program has **7 total errors** despite passing all tests:
 
 ### The solution
 
-As we saw in [Puzzle 04](../puzzle_04/layout_tensor.md), we need to bound-check as follows:
+As we saw in [Puzzle 04](../puzzle_04/tile_tensor.md), we need to bound-check as follows:
 
 ```mojo
-{{#include ../../../solutions/p04/p04_layout_tensor.mojo:add_10_2d_layout_tensor_solution}}
+{{#include ../../../solutions/p04/p04_tile_tensor.mojo:add_10_2d_tile_tensor_solution}}
 ```
 
 The fix is simple: **always validate thread indices against data dimensions** before accessing memory.
diff --git a/book/src/puzzle_10/puzzle_10.md b/book/src/puzzle_10/puzzle_10.md
index 19822550..5d990c61 100644
--- a/book/src/puzzle_10/puzzle_10.md
+++ b/book/src/puzzle_10/puzzle_10.md
@@ -123,7 +123,7 @@ But like any good detective, you'll learn to:
 - GPU programming concepts from Puzzles 1-8 (memory management, thread coordination, barriers)
 - **[Compatible NVIDIA GPU hardware](https://docs.modular.com/max/faq#gpu-requirements)**
 - Environment setup with `pixi` package manager for accessing `compute-sanitizer`
-- **Prior puzzles**: Familiarity with [Puzzle 4](../puzzle_04/introduction_layout_tensor.md) and [Puzzle 8](../puzzle_08/layout_tensor.md) are recommended
+- **Prior puzzles**: Familiarity with [Puzzle 4](../puzzle_04/introduction_tile_tensor.md) and [Puzzle 8](../puzzle_08/tile_tensor.md) are recommended
 
 **What you'll gain**:
 
diff --git a/book/src/puzzle_11/layout_tensor.md b/book/src/puzzle_11/layout_tensor.md
deleted file mode 100644
index a97dceea..00000000
--- a/book/src/puzzle_11/layout_tensor.md
+++ /dev/null
@@ -1,184 +0,0 @@
-## Overview
-
-Implement a kernel that compute the running sum of the last 3 positions of 1D LayoutTensor `a` and stores it in 1D LayoutTensor `output`.
-
-**Note:** _You have 1 thread per position. You only need 1 global read and 1 global write per thread._
-
-## Key concepts
-
-In this puzzle, you'll learn about:
-
-- Using LayoutTensor for sliding window operations
-- Managing shared memory with LayoutTensor address_space that we saw in [puzzle_08](../puzzle_08/layout_tensor.md)
-- Efficient neighbor access patterns
-- Boundary condition handling
-
-The key insight is how LayoutTensor simplifies shared memory management while maintaining efficient window-based operations.
-
-## Configuration
-
-- Array size: `SIZE = 8` elements
-- Threads per block: `TPB = 8`
-- Window size: 3 elements
-- Shared memory: `TPB` elements
-
-Notes:
-
-- **LayoutTensor allocation**: Use `LayoutTensor[dtype, Layout.row_major(TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()`
-- **Window access**: Natural indexing for 3-element windows
-- **Edge handling**: Special cases for first two positions
-- **Memory pattern**: One shared memory load per thread
-
-## Code to complete
-
-```mojo
-{{#include ../../../problems/p11/p11_layout_tensor.mojo:pooling_layout_tensor}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p11/p11_layout_tensor.mojo" class="filename">View full file: problems/p11/p11_layout_tensor.mojo</a>
-
-<details>
-<summary><strong>Tips</strong></summary>
-
-<div class="solution-tips">
-
-1. Create shared memory with LayoutTensor using address_space
-2. Load data with natural indexing: `shared[local_i] = a[global_i]`
-3. Handle special cases for first two elements
-4. Use shared memory for window operations
-5. Guard against out-of-bounds access
-
-</div>
-</details>
-
-## Running the code
-
-To test your solution, run the following command in your terminal:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p11_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p11_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p11_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p11_layout_tensor
-```
-
-  </div>
-</div>
-
-Your output will look like this if the puzzle isn't solved yet:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
-expected: HostBuffer([0.0, 1.0, 3.0, 6.0, 9.0, 12.0, 15.0, 18.0])
-```
-
-## Solution
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../solutions/p11/p11_layout_tensor.mojo:pooling_layout_tensor_solution}}
-```
-
-<div class="solution-explanation">
-
-The solution implements a sliding window sum using LayoutTensor with these key steps:
-
-1. **Shared memory setup**
-   - LayoutTensor creates block-local storage with address_space:
-
-     ```txt
-     shared = LayoutTensor[dtype, Layout.row_major(TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
-     ```
-
-   - Each thread loads one element:
-
-     ```txt
-     Input array:  [0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0]
-     Block shared: [0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0]
-     ```
-
-   - `barrier()` ensures all data is loaded
-
-2. **Boundary cases**
-   - Position 0: Single element
-
-     ```txt
-     output[0] = shared[0] = 0.0
-     ```
-
-   - Position 1: Sum of first two elements
-
-     ```txt
-     output[1] = shared[0] + shared[1] = 0.0 + 1.0 = 1.0
-     ```
-
-3. **Main window operation**
-   - For positions 2 and beyond:
-
-     ```txt
-     Position 2: shared[0] + shared[1] + shared[2] = 0.0 + 1.0 + 2.0 = 3.0
-     Position 3: shared[1] + shared[2] + shared[3] = 1.0 + 2.0 + 3.0 = 6.0
-     Position 4: shared[2] + shared[3] + shared[4] = 2.0 + 3.0 + 4.0 = 9.0
-     ...
-     ```
-
-   - Natural indexing with LayoutTensor:
-
-     ```txt
-     # Sliding window of 3 elements
-     window_sum = shared[i-2] + shared[i-1] + shared[i]
-     ```
-
-4. **Memory access pattern**
-   - One global read per thread into shared tensor
-   - Efficient neighbor access through shared memory
-   - LayoutTensor benefits:
-     - Automatic bounds checking
-     - Natural window indexing
-     - Layout-aware memory access
-     - Type safety throughout
-
-This approach combines the performance of shared memory with LayoutTensor's safety and ergonomics:
-
-- Minimizes global memory access
-- Simplifies window operations
-- Handles boundaries cleanly
-- Maintains coalesced access patterns
-
-The final output shows the cumulative window sums:
-
-```txt
-[0.0, 1.0, 3.0, 6.0, 9.0, 12.0, 15.0, 18.0]
-```
-
-</div>
-</details>
diff --git a/book/src/puzzle_11/puzzle_11.md b/book/src/puzzle_11/puzzle_11.md
index 4d82b43d..ff52a3ad 100644
--- a/book/src/puzzle_11/puzzle_11.md
+++ b/book/src/puzzle_11/puzzle_11.md
@@ -2,19 +2,190 @@
 
 ## Overview
 
-Implement a kernel that computes the running sum of the last 3 positions of vector `a` and stores it in vector `output`.
+Implement a kernel that compute the running sum of the last 3 positions of 1D TileTensor `a` and stores it in 1D TileTensor `output`.
+
+**Pooling** is an operation that condenses a region of values into a single summary value — for example, their sum, maximum, or average. A **sliding window** applies this condensation repeatedly by moving a fixed-size window one step at a time across the input, producing one output value per window position. Here the window is 3 elements wide and the summary function is a sum, so each output element equals the sum of the current element and the two preceding it (with special cases at the boundaries where fewer than 3 elements are available).
 
 **Note:** _You have 1 thread per position. You only need 1 global read and 1 global write per thread._
 
 <img src="./media/11-w.png" alt="Pooling visualization" class="light-mode-img">
 <img src="./media/11-b.png" alt="Pooling visualization" class="dark-mode-img">
 
-## Implementation approaches
+## Key concepts
+
+In this puzzle, you'll learn about:
+
+- Using TileTensor for sliding window operations
+- Managing shared memory with TileTensor address_space that we saw in [puzzle 8](../puzzle_08/puzzle_08.md)
+- Efficient neighbor access patterns
+- Boundary condition handling
+
+The key insight is how TileTensor simplifies shared memory management while maintaining efficient window-based operations.
+
+## Configuration
+
+- Array size: `SIZE = 8` elements
+- Threads per block: `TPB = 8`
+- Window size: 3 elements
+- Shared memory: `TPB` elements
+
+Notes:
+
+- **TileTensor allocation**: Use `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB]())`
+- **Window access**: Natural indexing for 3-element windows
+- **Edge handling**: Special cases for first two positions
+- **Memory pattern**: One shared memory load per thread
+
+## Code to complete
+
+```mojo
+{{#include ../../../problems/p11/p11.mojo:pooling}}
+```
+
+<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p11/p11.mojo" class="filename">View full file: problems/p11/p11.mojo</a>
+
+<details>
+<summary><strong>Tips</strong></summary>
+
+<div class="solution-tips">
+
+1. Create shared memory with TileTensor using address_space
+2. Load data with natural indexing: `shared[local_i] = a[global_i]`
+3. Handle special cases for first two elements
+4. Use shared memory for window operations
+5. Guard against out-of-bounds access
+
+</div>
+</details>
+
+## Running the code
+
+To test your solution, run the following command in your terminal:
+
+<div class="code-tabs" data-tab-group="package-manager">
+  <div class="tab-buttons">
+    <button class="tab-button">pixi NVIDIA (default)</button>
+    <button class="tab-button">pixi AMD</button>
+    <button class="tab-button">pixi Apple</button>
+    <button class="tab-button">uv</button>
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run p11
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e amd p11
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e apple p11
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+uv run poe p11
+```
+
+  </div>
+</div>
+
+Your output will look like this if the puzzle isn't solved yet:
+
+```txt
+out: HostBuffer([0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
+expected: HostBuffer([0.0, 1.0, 3.0, 6.0, 9.0, 12.0, 15.0, 18.0])
+```
+
+## Solution
+
+<details class="solution-details">
+<summary></summary>
+
+```mojo
+{{#include ../../../solutions/p11/p11.mojo:pooling_solution}}
+```
+
+<div class="solution-explanation">
+
+The solution implements a sliding window sum using TileTensor with these key steps:
+
+1. **Shared memory setup**
+   - TileTensor creates block-local storage with address_space:
+
+     ```txt
+     shared = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB]())
+     ```
+
+   - Each thread loads one element:
+
+     ```txt
+     Input array:  [0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0]
+     Block shared: [0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0]
+     ```
+
+   - `barrier()` ensures all data is loaded
+
+2. **Boundary cases**
+   - Position 0: Single element
+
+     ```txt
+     output[0] = shared[0] = 0.0
+     ```
+
+   - Position 1: Sum of first two elements
+
+     ```txt
+     output[1] = shared[0] + shared[1] = 0.0 + 1.0 = 1.0
+     ```
+
+3. **Main window operation**
+   - For positions 2 and beyond:
+
+     ```txt
+     Position 2: shared[0] + shared[1] + shared[2] = 0.0 + 1.0 + 2.0 = 3.0
+     Position 3: shared[1] + shared[2] + shared[3] = 1.0 + 2.0 + 3.0 = 6.0
+     Position 4: shared[2] + shared[3] + shared[4] = 2.0 + 3.0 + 4.0 = 9.0
+     ...
+     ```
+
+   - Natural indexing with TileTensor:
+
+     ```txt
+     # Sliding window of 3 elements
+     window_sum = shared[i-2] + shared[i-1] + shared[i]
+     ```
+
+4. **Memory access pattern**
+   - One global read per thread into shared tensor
+   - Efficient neighbor access through shared memory
+   - TileTensor benefits:
+     - Automatic bounds checking
+     - Natural window indexing
+     - Layout-aware memory access
+     - Type safety throughout
+
+This approach combines the performance of shared memory with TileTensor's safety and ergonomics:
+
+- Minimizes global memory access
+- Simplifies window operations
+- Handles boundaries cleanly
+- Maintains coalesced access patterns
 
-### [🔰 Raw memory approach](./raw.md)
-Learn how to implement sliding window operations with manual memory management and synchronization.
+The final output shows the cumulative window sums:
 
-### [📐 LayoutTensor Version](./layout_tensor.md)
-Use LayoutTensor's features for efficient window-based operations and shared memory management.
+```txt
+[0.0, 1.0, 3.0, 6.0, 9.0, 12.0, 15.0, 18.0]
+```
 
-💡 **Note**: See how LayoutTensor simplifies sliding window operations while maintaining efficient memory access patterns.
+</div>
+</details>
diff --git a/book/src/puzzle_11/raw.md b/book/src/puzzle_11/raw.md
deleted file mode 100644
index 1bf27ecd..00000000
--- a/book/src/puzzle_11/raw.md
+++ /dev/null
@@ -1,174 +0,0 @@
-## Overview
-
-Implement a kernel that compute the running sum of the last 3 positions of vector `a` and stores it in vector `output`.
-
-**Note:** _You have 1 thread per position. You only need 1 global read and 1 global write per thread._
-
-## Key concepts
-
-In this puzzle, you'll learn about:
-
-- Using shared memory for sliding window operations
-- Handling boundary conditions in pooling
-- Coordinating thread access to neighboring elements
-
-The key insight is understanding how to efficiently access a window of elements using shared memory, with special handling for the first elements in the sequence.
-
-## Configuration
-
-- Array size: `SIZE = 8` elements
-- Threads per block: `TPB = 8`
-- Window size: 3 elements
-- Shared memory: `TPB` elements
-
-Notes:
-
-- **Window access**: Each output depends on up to 3 previous elements
-- **Edge handling**: First two positions need special treatment
-- **Memory pattern**: One shared memory load per thread
-- **Thread sync**: Coordination before window operations
-
-## Code to complete
-
-```mojo
-{{#include ../../../problems/p11/p11.mojo:pooling}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p11/p11.mojo" class="filename">View full file: problems/p11/p11.mojo</a>
-
-<details>
-<summary><strong>Tips</strong></summary>
-
-<div class="solution-tips">
-
-1. Load data and call `barrier()`
-2. Special cases: `output[0] = shared[0]`, `output[1] = shared[0] + shared[1]`
-3. General case: `if 1 < global_i < size`
-4. Sum three elements: `shared[local_i - 2] + shared[local_i - 1] + shared[local_i]`
-
-</div>
-</details>
-
-## Running the code
-
-To test your solution, run the following command in your terminal:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p11
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p11
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p11
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p11
-```
-
-  </div>
-</div>
-
-Your output will look like this if the puzzle isn't solved yet:
-
-```txt
-out: HostBuffer([0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0])
-expected: HostBuffer([0.0, 1.0, 3.0, 6.0, 9.0, 12.0, 15.0, 18.0])
-```
-
-## Solution
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../solutions/p11/p11.mojo:pooling_solution}}
-```
-
-<div class="solution-explanation">
-
-The solution implements a sliding window sum using shared memory with these key steps:
-
-1. **Shared memory setup**
-   - Allocates `TPB` elements in shared memory:
-
-     ```txt
-     Input array:  [0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0]
-     Block shared: [0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0]
-     ```
-
-   - Each thread loads one element from global memory
-   - `barrier()` ensures all data is loaded
-
-2. **Boundary cases**
-   - Position 0: Single element
-
-     ```txt
-     output[0] = shared[0] = 0.0
-     ```
-
-   - Position 1: Sum of first two elements
-
-     ```txt
-     output[1] = shared[0] + shared[1] = 0.0 + 1.0 = 1.0
-     ```
-
-3. **Main window operation**
-   - For positions 2 and beyond:
-
-     ```txt
-     Position 2: shared[0] + shared[1] + shared[2] = 0.0 + 1.0 + 2.0 = 3.0
-     Position 3: shared[1] + shared[2] + shared[3] = 1.0 + 2.0 + 3.0 = 6.0
-     Position 4: shared[2] + shared[3] + shared[4] = 2.0 + 3.0 + 4.0 = 9.0
-     ...
-     ```
-
-   - Window calculation using local indices:
-
-     ```txt
-     # Sliding window of 3 elements
-     window_sum = shared[i-2] + shared[i-1] + shared[i]
-     ```
-
-4. **Memory access pattern**
-   - One global read per thread into shared memory
-   - One global write per thread from shared memory
-   - Uses shared memory for efficient neighbor access
-   - Maintains coalesced memory access pattern
-
-This approach optimizes performance through:
-
-- Minimal global memory access
-- Fast shared memory neighbor lookups
-- Clean boundary handling
-- Efficient memory coalescing
-
-The final output shows the cumulative window sums:
-
-```txt
-[0.0, 1.0, 3.0, 6.0, 9.0, 12.0, 15.0, 18.0]
-```
-
-</div>
-</details>
diff --git a/book/src/puzzle_12/layout_tensor.md b/book/src/puzzle_12/layout_tensor.md
deleted file mode 100644
index 3038bef7..00000000
--- a/book/src/puzzle_12/layout_tensor.md
+++ /dev/null
@@ -1,228 +0,0 @@
-## Overview
-
-Implement a kernel that computes the dot product of 1D LayoutTensor `a` and 1D LayoutTensor `b` and stores it in 1D LayoutTensor `output` (single number).
-
-**Note:** _You have 1 thread per position. You only need 2 global reads per thread and 1 global write per thread block._
-
-## Key concepts
-
-This puzzle covers:
-
-- Similar to the [puzzle 8](../puzzle_08/layout_tensor.md) and [puzzle 11](../puzzle_11/layout_tensor.md), implementing parallel reduction with LayoutTensor
-- Managing shared memory using LayoutTensor with address_space
-- Coordinating threads for collective operations
-- Using layout-aware tensor operations
-
-The key insight is how LayoutTensor simplifies memory management while maintaining efficient parallel reduction patterns.
-
-## Configuration
-
-- Vector size: `SIZE = 8` elements
-- Threads per block: `TPB = 8`
-- Number of blocks: 1
-- Output size: 1 element
-- Shared memory: `TPB` elements
-
-Notes:
-
-- **LayoutTensor allocation**: Use `LayoutTensor[dtype, Layout.row_major(TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()`
-- **Element access**: Natural indexing with bounds checking
-- **Layout handling**: Separate layouts for input and output
-- **Thread coordination**: Same synchronization patterns with `barrier()`
-
-## Code to complete
-
-```mojo
-{{#include ../../../problems/p12/p12_layout_tensor.mojo:dot_product_layout_tensor}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p12/p12_layout_tensor.mojo" class="filename">View full file: problems/p12/p12_layout_tensor.mojo</a>
-
-<details>
-<summary><strong>Tips</strong></summary>
-
-<div class="solution-tips">
-
-1. Create shared memory with LayoutTensor using address_space
-2. Store `a[global_i] * b[global_i]` in `shared[local_i]`
-3. Use parallel reduction pattern with `barrier()`
-4. Let thread 0 write final result to `output[0]`
-
-</div>
-</details>
-
-## Running the code
-
-To test your solution, run the following command in your terminal:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p12_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p12_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p12_layout_tensor
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p12_layout_tensor
-```
-
-  </div>
-</div>
-
-Your output will look like this if the puzzle isn't solved yet:
-
-```txt
-out: HostBuffer([0.0])
-expected: HostBuffer([140.0])
-```
-
-## Solution
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../solutions/p12/p12_layout_tensor.mojo:dot_product_layout_tensor_solution}}
-```
-
-<div class="solution-explanation">
-
-The solution implements a parallel reduction for dot product using LayoutTensor. Here's the detailed breakdown:
-
-### Phase 1: Element-wise Multiplication
-
-Each thread performs one multiplication with natural indexing:
-
-```mojo
-shared[local_i] = a[global_i] * b[global_i]
-```
-
-### Phase 2: Parallel Reduction
-
-Tree-based reduction with layout-aware operations:
-
-```txt
-Initial:  [0*0  1*1  2*2  3*3  4*4  5*5  6*6  7*7]
-        = [0    1    4    9    16   25   36   49]
-
-Step 1:   [0+16 1+25 4+36 9+49  16   25   36   49]
-        = [16   26   40   58   16   25   36   49]
-
-Step 2:   [16+40 26+58 40   58   16   25   36   49]
-        = [56   84   40   58   16   25   36   49]
-
-Step 3:   [56+84  84   40   58   16   25   36   49]
-        = [140   84   40   58   16   25   36   49]
-```
-
-### Key implementation features
-
-1. **Memory Management**:
-   - Clean shared memory allocation with LayoutTensor address_space parameter
-   - Type-safe operations with LayoutTensor
-   - Automatic bounds checking
-   - Layout-aware indexing
-
-2. **Thread Synchronization**:
-   - `barrier()` after initial multiplication
-   - `barrier()` between reduction steps
-   - Safe thread coordination
-
-3. **Reduction Logic**:
-
-   ```mojo
-   stride = TPB // 2
-   while stride > 0:
-       if local_i < stride:
-           shared[local_i] += shared[local_i + stride]
-       barrier()
-       stride //= 2
-   ```
-
-4. **Performance Benefits**:
-   - \\(O(\log n)\\) time complexity
-   - Coalesced memory access
-   - Minimal thread divergence
-   - Efficient shared memory usage
-
-The LayoutTensor version maintains the same efficient parallel reduction while providing:
-
-- Better type safety
-- Cleaner memory management
-- Layout awareness
-- Natural indexing syntax
-
-### Barrier synchronization importance
-
-The `barrier()` between reduction steps is critical for correctness. Here's why:
-
-Without `barrier()`, race conditions occur:
-
-```text
-Initial shared memory: [0 1 4 9 16 25 36 49]
-
-Step 1 (stride = 4):
-Thread 0 reads: shared[0] = 0, shared[4] = 16
-Thread 1 reads: shared[1] = 1, shared[5] = 25
-Thread 2 reads: shared[2] = 4, shared[6] = 36
-Thread 3 reads: shared[3] = 9, shared[7] = 49
-
-Without barrier:
-- Thread 0 writes: shared[0] = 0 + 16 = 16
-- Thread 1 starts next step (stride = 2) before Thread 0 finishes
-  and reads old value shared[0] = 0 instead of 16!
-```
-
-With `barrier()`:
-
-```text
-Step 1 (stride = 4):
-All threads write their sums:
-[16 26 40 58 16 25 36 49]
-barrier() ensures ALL threads see these values
-
-Step 2 (stride = 2):
-Now threads safely read the updated values:
-Thread 0: shared[0] = 16 + 40 = 56
-Thread 1: shared[1] = 26 + 58 = 84
-```
-
-The `barrier()` ensures:
-
-1. All writes from current step complete
-2. All threads see updated values
-3. No thread starts next iteration early
-4. Consistent shared memory state
-
-Without these synchronization points, we could get:
-
-- Memory race conditions
-- Threads reading stale values
-- Non-deterministic results
-- Incorrect final sum
-
-</div>
-</details>
diff --git a/book/src/puzzle_12/puzzle_12.md b/book/src/puzzle_12/puzzle_12.md
index 15937eac..88b390b9 100644
--- a/book/src/puzzle_12/puzzle_12.md
+++ b/book/src/puzzle_12/puzzle_12.md
@@ -2,7 +2,7 @@
 
 ## Overview
 
-Implement a kernel that computes the dot product of vector `a` and vector `b` and stores it in `output` (single number).  The dot product is an operation that takes two vectors of the same size and returns a single number (a scalar). It is calculated by multiplying corresponding elements from each vector and then summing those products.
+Implement a kernel that computes the dot product of 1D TileTensor `a` and 1D TileTensor `b` and stores it in 1D TileTensor `output` (single number).  The dot product is an operation that takes two vectors of the same size and returns a single number (a scalar). It is calculated by multiplying corresponding elements from each vector and then summing those products.
 
 For example, if you have two vectors:
 
@@ -17,12 +17,227 @@ For example, if you have two vectors:
 <img src="./media/12-w.png" alt="Dot product visualization" class="light-mode-img">
 <img src="./media/12-b.png" alt="Dot product visualization" class="dark-mode-img">
 
-## Implementation approaches
+## Key concepts
 
-### [🔰 Raw memory approach](./raw.md)
-Learn how to implement the reduction with manual memory management and synchronization.
+**Parallel reduction** is an algorithm that combines \\(n\\) values into one using a binary operation (here, addition) in \\(O(\log n)\\) steps instead of \\(O(n)\\) sequential steps. In each step, half the active threads each add one value into another, halving the number of remaining partial results. After \\(\log_2 n\\) steps, thread 0 holds the final sum. This tree-shaped computation requires a `barrier()` between steps so no thread reads a partially-updated value.
 
-### [📐 LayoutTensor Version](./layout_tensor.md)
-Use LayoutTensor's features for efficient reduction and shared memory management.
+This puzzle covers:
 
-💡 **Note**: See how LayoutTensor simplifies efficient memory access patterns.
+- Similar to [puzzle 8](../puzzle_08/puzzle_08.md) and [puzzle 11](../puzzle_11/puzzle_11.md), implementing parallel reduction with TileTensor
+- Managing shared memory using TileTensor with address_space
+- Coordinating threads for collective operations
+- Using layout-aware tensor operations
+
+The key insight is how TileTensor simplifies memory management while maintaining efficient parallel reduction patterns.
+
+## Configuration
+
+- Vector size: `SIZE = 8` elements
+- Threads per block: `TPB = 8`
+- Number of blocks: 1
+- Output size: 1 element
+- Shared memory: `TPB` elements
+
+Notes:
+
+- **TileTensor allocation**: Use `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB]())`
+- **Element access**: Natural indexing with bounds checking
+- **Layout handling**: Separate layouts for input and output
+- **Thread coordination**: Same synchronization patterns with `barrier()`
+
+## Code to complete
+
+```mojo
+{{#include ../../../problems/p12/p12.mojo:dot_product}}
+```
+
+<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p12/p12.mojo" class="filename">View full file: problems/p12/p12.mojo</a>
+
+<details>
+<summary><strong>Tips</strong></summary>
+
+<div class="solution-tips">
+
+1. Create shared memory with TileTensor using address_space
+2. Store `a[global_i] * b[global_i]` in `shared[local_i]`
+3. Use parallel reduction pattern with `barrier()`
+4. Let thread 0 write final result to `output[0]`
+
+</div>
+</details>
+
+## Running the code
+
+To test your solution, run the following command in your terminal:
+
+<div class="code-tabs" data-tab-group="package-manager">
+  <div class="tab-buttons">
+    <button class="tab-button">pixi NVIDIA (default)</button>
+    <button class="tab-button">pixi AMD</button>
+    <button class="tab-button">pixi Apple</button>
+    <button class="tab-button">uv</button>
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run p12
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e amd p12
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+pixi run -e apple p12
+```
+
+  </div>
+  <div class="tab-content">
+
+```bash
+uv run poe p12
+```
+
+  </div>
+</div>
+
+Your output will look like this if the puzzle isn't solved yet:
+
+```txt
+out: HostBuffer([0.0])
+expected: HostBuffer([140.0])
+```
+
+## Solution
+
+<details class="solution-details">
+<summary></summary>
+
+```mojo
+{{#include ../../../solutions/p12/p12.mojo:dot_product_solution}}
+```
+
+<div class="solution-explanation">
+
+The solution implements a parallel reduction for dot product using TileTensor. Here's the detailed breakdown:
+
+### Phase 1: Element-wise Multiplication
+
+Each thread performs one multiplication with natural indexing:
+
+```mojo
+shared[local_i] = a[global_i] * b[global_i]
+```
+
+### Phase 2: Parallel Reduction
+
+Tree-based reduction with layout-aware operations:
+
+```txt
+Initial:  [0*0  1*1  2*2  3*3  4*4  5*5  6*6  7*7]
+        = [0    1    4    9    16   25   36   49]
+
+Step 1:   [0+16 1+25 4+36 9+49  16   25   36   49]
+        = [16   26   40   58   16   25   36   49]
+
+Step 2:   [16+40 26+58 40   58   16   25   36   49]
+        = [56   84   40   58   16   25   36   49]
+
+Step 3:   [56+84  84   40   58   16   25   36   49]
+        = [140   84   40   58   16   25   36   49]
+```
+
+### Key implementation features
+
+1. **Memory Management**:
+   - Clean shared memory allocation with TileTensor address_space parameter
+   - Type-safe operations with TileTensor
+   - Automatic bounds checking
+   - Layout-aware indexing
+
+2. **Thread Synchronization**:
+   - `barrier()` after initial multiplication
+   - `barrier()` between reduction steps
+   - Safe thread coordination
+
+3. **Reduction Logic**:
+
+   ```mojo
+   stride = TPB // 2
+   while stride > 0:
+       if local_i < stride:
+           shared[local_i] += shared[local_i + stride]
+       barrier()
+       stride //= 2
+   ```
+
+4. **Performance Benefits**:
+   - \\(O(\log n)\\) time complexity
+   - Coalesced memory access
+   - Minimal thread divergence
+   - Efficient shared memory usage
+
+The TileTensor version maintains the same efficient parallel reduction while providing:
+
+- Better type safety
+- Cleaner memory management
+- Layout awareness
+- Natural indexing syntax
+
+### Barrier synchronization importance
+
+The `barrier()` between reduction steps is critical for correctness. Here's why:
+
+Without `barrier()`, race conditions occur:
+
+```text
+Initial shared memory: [0 1 4 9 16 25 36 49]
+
+Step 1 (stride = 4):
+Thread 0 reads: shared[0] = 0, shared[4] = 16
+Thread 1 reads: shared[1] = 1, shared[5] = 25
+Thread 2 reads: shared[2] = 4, shared[6] = 36
+Thread 3 reads: shared[3] = 9, shared[7] = 49
+
+Without barrier:
+- Thread 0 writes: shared[0] = 0 + 16 = 16
+- Thread 1 starts next step (stride = 2) before Thread 0 finishes
+  and reads old value shared[0] = 0 instead of 16!
+```
+
+With `barrier()`:
+
+```text
+Step 1 (stride = 4):
+All threads write their sums:
+[16 26 40 58 16 25 36 49]
+barrier() ensures ALL threads see these values
+
+Step 2 (stride = 2):
+Now threads safely read the updated values:
+Thread 0: shared[0] = 16 + 40 = 56
+Thread 1: shared[1] = 26 + 58 = 84
+```
+
+The `barrier()` ensures:
+
+1. All writes from current step complete
+2. All threads see updated values
+3. No thread starts next iteration early
+4. Consistent shared memory state
+
+Without these synchronization points, we could get:
+
+- Memory race conditions
+- Threads reading stale values
+- Non-deterministic results
+- Incorrect final sum
+
+</div>
+</details>
diff --git a/book/src/puzzle_12/raw.md b/book/src/puzzle_12/raw.md
deleted file mode 100644
index 1788f7e6..00000000
--- a/book/src/puzzle_12/raw.md
+++ /dev/null
@@ -1,228 +0,0 @@
-## Overview
-
-Implement a kernel that computes the dot product of vector `a` and vector `b` and stores it in `output` (single number).
-
-**Note:** _You have 1 thread per position. You only need 2 global reads per thread and 1 global write per thread block._
-
-## Key concepts
-
-This puzzle covers:
-
-- Implementing parallel reduction operations
-- Using shared memory for intermediate results
-- Coordinating threads for collective operations
-
-The key insight is understanding how to efficiently combine multiple values into a single result using parallel computation and shared memory.
-
-## Configuration
-
-- Vector size: `SIZE = 8` elements
-- Threads per block: `TPB = 8`
-- Number of blocks: 1
-- Output size: 1 element
-- Shared memory: `TPB` elements
-
-Notes:
-
-- **Element access**: Each thread reads corresponding elements from `a` and `b`
-- **Partial results**: Computing and storing intermediate values
-- **Thread coordination**: Synchronizing before combining results
-- **Final reduction**: Converting partial results to scalar output
-
-_Note: For this problem, you don't need to worry about number of shared reads. We will
-handle that challenge later._
-
-## Code to complete
-
-```mojo
-{{#include ../../../problems/p12/p12.mojo:dot_product}}
-```
-
-<a href="{{#include ../_includes/repo_url.md}}/blob/main/problems/p12/p12.mojo" class="filename">View full file: problems/p12/p12.mojo</a>
-
-<details>
-<summary><strong>Tips</strong></summary>
-
-<div class="solution-tips">
-
-1. Store `a[global_i] * b[global_i]` in `shared[local_i]`
-2. Call `barrier()` to synchronize
-3. Use thread 0 to sum all products in shared memory
-4. Write final sum to `output[0]`
-
-</div>
-</details>
-
-## Running the code
-
-To test your solution, run the following command in your terminal:
-
-<div class="code-tabs" data-tab-group="package-manager">
-  <div class="tab-buttons">
-    <button class="tab-button">pixi NVIDIA (default)</button>
-    <button class="tab-button">pixi AMD</button>
-    <button class="tab-button">pixi Apple</button>
-    <button class="tab-button">uv</button>
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run p12
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e amd p12
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-pixi run -e apple p12
-```
-
-  </div>
-  <div class="tab-content">
-
-```bash
-uv run poe p12
-```
-
-  </div>
-</div>
-
-Your output will look like this if the puzzle isn't solved yet:
-
-```txt
-out: HostBuffer([0.0])
-expected: HostBuffer([140.0])
-```
-
-## Solution
-
-<details class="solution-details">
-<summary></summary>
-
-```mojo
-{{#include ../../../solutions/p12/p12.mojo:dot_product_solution}}
-```
-
-<div class="solution-explanation">
-
-The solution implements a parallel reduction algorithm for dot product computation using shared memory. Here's a detailed breakdown:
-
-### Phase 1: Element-wise Multiplication
-
-Each thread performs one multiplication:
-
-```txt
-Thread i: shared[i] = a[i] * b[i]
-```
-
-### Phase 2: Parallel Reduction
-
-The reduction uses a tree-based approach that halves active threads in each step:
-
-```txt
-Initial:  [0*0  1*1  2*2  3*3  4*4  5*5  6*6  7*7]
-        = [0    1    4    9    16   25   36   49]
-
-Step 1:   [0+16 1+25 4+36 9+49  16   25   36   49]
-        = [16   26   40   58   16   25   36   49]
-
-Step 2:   [16+40 26+58 40   58   16   25   36   49]
-        = [56   84   40   58   16   25   36   49]
-
-Step 3:   [56+84  84   40   58   16   25   36   49]
-        = [140   84   40   58   16   25   36   49]
-```
-
-### Key implementation features
-
-1. **Memory Access Pattern**:
-   - Each thread loads exactly two values from global memory (`a[i]`, `b[i]`)
-   - Uses shared memory for intermediate results
-   - Final result written once to global memory
-
-2. **Thread Synchronization**:
-   - `barrier()` after initial multiplication
-   - `barrier()` after each reduction step
-   - Prevents race conditions between reduction steps
-
-3. **Reduction Logic**:
-
-   ```mojo
-   stride = TPB // 2
-   while stride > 0:
-       if local_i < stride:
-           shared[local_i] += shared[local_i + stride]
-       barrier()
-       stride //= 2
-   ```
-
-   - Halves stride in each step
-   - Only active threads perform additions
-   - Maintains work efficiency
-
-4. **Performance Considerations**:
-   - \\(\log_2(n)\\) steps for \\(n\\) elements
-   - Coalesced memory access pattern
-   - Minimal thread divergence
-   - Efficient use of shared memory
-
-This implementation achieves \\(O(\log n)\\) time complexity compared to \\(O(n)\\) in sequential execution, demonstrating the power of parallel reduction algorithms.
-
-### Barrier synchronization importance
-
-The `barrier()` between reduction steps is critical for correctness. Here's why:
-
-Without `barrier()`, race conditions occur:
-
-```text
-Initial shared memory: [0 1 4 9 16 25 36 49]
-
-Step 1 (stride = 4):
-Thread 0 reads: shared[0] = 0, shared[4] = 16
-Thread 1 reads: shared[1] = 1, shared[5] = 25
-Thread 2 reads: shared[2] = 4, shared[6] = 36
-Thread 3 reads: shared[3] = 9, shared[7] = 49
-
-Without barrier:
-- Thread 0 writes: shared[0] = 0 + 16 = 16
-- Thread 1 starts next step (stride = 2) before Thread 0 finishes
-  and reads old value shared[0] = 0 instead of 16!
-```
-
-With `barrier()`:
-
-```text
-Step 1 (stride = 4):
-All threads write their sums:
-[16 26 40 58 16 25 36 49]
-barrier() ensures ALL threads see these values
-
-Step 2 (stride = 2):
-Now threads safely read the updated values:
-Thread 0: shared[0] = 16 + 40 = 56
-Thread 1: shared[1] = 26 + 58 = 84
-```
-
-The `barrier()` ensures:
-
-1. All writes from current step complete
-2. All threads see updated values
-3. No thread starts next iteration early
-4. Consistent shared memory state
-
-Without these synchronization points, we could get:
-
-- Memory race conditions
-- Threads reading stale values
-- Non-deterministic results
-- Incorrect final sum
-
-</div>
-</details>
diff --git a/book/src/puzzle_13/block_boundary.md b/book/src/puzzle_13/block_boundary.md
index 66cac6a2..dfb570b4 100644
--- a/book/src/puzzle_13/block_boundary.md
+++ b/book/src/puzzle_13/block_boundary.md
@@ -1,6 +1,6 @@
 # Block Boundary Version
 
-Implement a kernel that computes a 1D convolution between 1D LayoutTensor `a` and 1D LayoutTensor `b` and stores it in 1D LayoutTensor `output`.
+Implement a kernel that computes a 1D convolution between 1D TileTensor `a` and 1D TileTensor `b` and stores it in 1D TileTensor `output`.
 
 **Note:** _You need to handle the general case. You only need 2 global reads and 1 global write per thread._
 
@@ -32,7 +32,7 @@ Notes:
 
 <div class="solution-tips">
 
-1. Use `LayoutTensor[dtype, Layout.row_major(TPB + CONV_2 - 1), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()` for shared memory
+1. Use `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB + CONV_2 - 1]())` for shared memory
 2. Load main data: `shared_a[local_i] = a[global_i]`
 3. Load boundary: `if local_i < CONV_2 - 1` handle next block data
 4. Load kernel: `shared_b[local_i] = b[local_i]`
@@ -125,8 +125,8 @@ Size calculation:
 
    ```mojo
    # First: account for padding needed for convolution window
-   shared_a = LayoutTensor[dtype, Layout.row_major(TPB + CONV_2 - 1), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
-   shared_b = LayoutTensor[dtype, Layout.row_major(CONV_2), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
+   shared_a = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB + CONV_2 - 1]())
+   shared_b = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[CONV_2]())
    ```
 
    This allocation pattern ensures we have enough space for both the block's data and the overlap region.
@@ -239,7 +239,7 @@ This implementation achieves efficient cross-block convolution while maintaining
 
 - Memory safety through proper bounds checking
 - High performance through optimized memory access
-- Clean code structure using LayoutTensor abstractions
+- Clean code structure using TileTensor abstractions
 - Minimal synchronization overhead
 - Mathematically sound boundary handling
 
diff --git a/book/src/puzzle_13/puzzle_13.md b/book/src/puzzle_13/puzzle_13.md
index b36a3d4b..28775394 100644
--- a/book/src/puzzle_13/puzzle_13.md
+++ b/book/src/puzzle_13/puzzle_13.md
@@ -1,13 +1,13 @@
 # Puzzle 13: 1D Convolution
 
-> ## Moving to LayoutTensor
+> ## Moving to TileTensor
 >
 > So far in our GPU puzzle journey, we've been exploring two parallel approaches to GPU memory management:
 >
 > 1. Raw memory management with direct pointer manipulation using [UnsafePointer](https://docs.modular.com/mojo/std/memory/unsafe_pointer/UnsafePointer/)
-> 2. The more structured [LayoutTensor](https://docs.modular.com/mojo/kernels/layout/layout_tensor/LayoutTensor/) with its powerful address_space parameter for memory allocation
+> 2. The more structured [TileTensor](https://docs.modular.com/mojo/kernels/layout/tile_tensor/TileTensor/) with its powerful address_space parameter for memory allocation
 >
-> Starting from this puzzle, we're transitioning exclusively to using `LayoutTensor`. This abstraction provides several benefits:
+> Starting from this puzzle, we're transitioning exclusively to using `TileTensor`. This abstraction provides several benefits:
 > - Type-safe memory access patterns
 > - Clear representation of data layouts
 > - Better code maintainability
@@ -23,7 +23,7 @@
 In signal processing and image analysis, convolution is a fundamental operation that combines two sequences to produce a third sequence. This puzzle challenges you to implement a 1D convolution on the GPU, where each output element is computed by sliding a kernel over an input array.
 
 
-Implement a kernel that computes a 1D convolution between vector `a` and vector `b` and stores it in `output` using the `LayoutTensor` abstraction.
+Implement a kernel that computes a 1D convolution between vector `a` and vector `b` and stores it in `output` using the `TileTensor` abstraction.
 
 **Note:** _You need to handle the general case. You only need 2 global reads and 1 global write per thread._
 
@@ -46,9 +46,9 @@ for i in range(SIZE):
 This puzzle is split into two parts to help you build understanding progressively:
 
 - [Simple Version with Single Block](./simple.md)
-  Start here to learn the basics of implementing convolution with shared memory in a single block using LayoutTensor.
+  Start here to learn the basics of implementing convolution with shared memory in a single block using TileTensor.
 
 - [Block Boundary Version](./block_boundary.md)
-  Then tackle the more challenging case where data needs to be shared across block boundaries, leveraging LayoutTensor's capabilities.
+  Then tackle the more challenging case where data needs to be shared across block boundaries, leveraging TileTensor's capabilities.
 
 Each version presents unique challenges in terms of memory access patterns and thread coordination. The simple version helps you understand the basic convolution operation, while the complete version tests your ability to handle more complex scenarios that arise in real-world GPU programming.
diff --git a/book/src/puzzle_13/simple.md b/book/src/puzzle_13/simple.md
index 9c427dd0..db98b6da 100644
--- a/book/src/puzzle_13/simple.md
+++ b/book/src/puzzle_13/simple.md
@@ -1,6 +1,6 @@
 # Simple Case with Single Block
 
-Implement a kernel that computes a 1D convolution between 1D LayoutTensor `a` and 1D LayoutTensor `b` and stores it in 1D LayoutTensor `output`.
+Implement a kernel that computes a 1D convolution between 1D TileTensor `a` and 1D TileTensor `b` and stores it in 1D TileTensor `output`.
 
 **Note:** _You need to handle the general case. You only need 2 global reads and 1 global write per thread._
 
@@ -41,7 +41,7 @@ Notes:
 
 <div class="solution-tips">
 
-1. Use `LayoutTensor[dtype, Layout.row_major(SIZE), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()` for shared memory allocation
+1. Use `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[SIZE]())` for shared memory allocation
 2. Load input to `shared_a[local_i]` and kernel to `shared_b[local_i]`
 3. Call `barrier()` after loading
 4. Sum products within bounds: `if local_i + j < SIZE`
@@ -177,7 +177,7 @@ Kernel b:        [0  1  2]
    - Uses `var` for proper type inference with `output.element_type`
    - Employs `@parameter` decorator to unroll the convolution loop at compile time
    - Maintains strict bounds checking for memory safety
-   - Leverages LayoutTensor's type system for better code safety
+   - Leverages TileTensor's type system for better code safety
 
 3. **Memory Management**:
    - Uses shared memory for both input array and kernel
diff --git a/book/src/puzzle_14/complete.md b/book/src/puzzle_14/complete.md
index 032b84ce..972b016a 100644
--- a/book/src/puzzle_14/complete.md
+++ b/book/src/puzzle_14/complete.md
@@ -1,6 +1,6 @@
 # Complete Version
 
-Implement a kernel that computes a prefix-sum over 1D LayoutTensor `a` and stores it in 1D LayoutTensor `output`.
+Implement a kernel that computes a prefix-sum over 1D TileTensor `a` and stores it in 1D TileTensor `output`.
 
 **Note:** _If the size of `a` is greater than the block size, we need to synchronize across multiple blocks to get the correct result._
 
diff --git a/book/src/puzzle_14/puzzle_14.md b/book/src/puzzle_14/puzzle_14.md
index 9b3bf220..226892cd 100644
--- a/book/src/puzzle_14/puzzle_14.md
+++ b/book/src/puzzle_14/puzzle_14.md
@@ -4,7 +4,7 @@
 
 Prefix sum (also known as _scan_) is a fundamental parallel algorithm that computes running totals of a sequence. Found at the heart of many parallel applications - from sorting algorithms to scientific simulations - it transforms a sequence of numbers into their running totals. While simple to compute sequentially, making this efficient on a GPU requires clever parallel thinking!
 
-Implement a kernel that computes a prefix-sum over 1D LayoutTensor `a` and stores it in 1D LayoutTensor `output`.
+Implement a kernel that computes a prefix-sum over 1D TileTensor `a` and stores it in 1D TileTensor `output`.
 
 **Note:** _If the size of `a` is greater than the block size, only store the sum of each block._
 
diff --git a/book/src/puzzle_14/simple.md b/book/src/puzzle_14/simple.md
index 46692d50..88513776 100644
--- a/book/src/puzzle_14/simple.md
+++ b/book/src/puzzle_14/simple.md
@@ -1,6 +1,6 @@
 # Simple Version
 
-Implement a kernel that computes a prefix-sum over 1D LayoutTensor `a` and stores it in 1D LayoutTensor `output`.
+Implement a kernel that computes a prefix-sum over 1D TileTensor `a` and stores it in 1D TileTensor `output`.
 
 **Note:** _If the size of `a` is greater than the block size, only store the sum of each block._
 
@@ -13,11 +13,11 @@ Implement a kernel that computes a prefix-sum over 1D LayoutTensor `a` and store
 
 Notes:
 
-- **Data loading**: Each thread loads one element using LayoutTensor access
-- **Memory pattern**: Shared memory for intermediate results using LayoutTensor with address_space
+- **Data loading**: Each thread loads one element using TileTensor access
+- **Memory pattern**: Shared memory for intermediate results using TileTensor with address_space
 - **Thread sync**: Coordination between computation phases
 - **Access pattern**: Stride-based parallel computation
-- **Type safety**: Leveraging LayoutTensor's type system
+- **Type safety**: Leveraging TileTensor's type system
 
 ## Code to complete
 
diff --git a/book/src/puzzle_15/puzzle_15.md b/book/src/puzzle_15/puzzle_15.md
index 1af82d8a..4880f3d1 100644
--- a/book/src/puzzle_15/puzzle_15.md
+++ b/book/src/puzzle_15/puzzle_15.md
@@ -2,7 +2,7 @@
 
 ## Overview
 
-Implement a kernel that computes a sum over each row of 2D matrix `a` and stores it in `output` using LayoutTensor.
+Implement a kernel that computes a sum over each row of 2D matrix `a` and stores it in `output` using TileTensor.
 
 <img src="./media/15-w.png" alt="Axis sum visualization" class="light-mode-img">
 <img src="./media/15-b.png" alt="Axis sum visualization" class="dark-mode-img">
@@ -11,12 +11,12 @@ Implement a kernel that computes a sum over each row of 2D matrix `a` and stores
 
 This puzzle covers:
 
-- Parallel reduction along matrix dimensions using LayoutTensor
+- Parallel reduction along matrix dimensions using TileTensor
 - Using block coordinates for data partitioning
 - Efficient shared memory reduction patterns
 - Working with multi-dimensional tensor layouts
 
-The key insight is understanding how to map thread blocks to matrix rows and perform efficient parallel reduction within each block while leveraging LayoutTensor's dimensional indexing.
+The key insight is understanding how to map thread blocks to matrix rows and perform efficient parallel reduction within each block while leveraging TileTensor's dimensional indexing.
 
 ## Configuration
 
@@ -24,8 +24,8 @@ The key insight is understanding how to map thread blocks to matrix rows and per
 - Threads per block: \\(\\text{TPB} = 8\\)
 - Grid dimensions: \\(1 \\times \\text{BATCH}\\)
 - Shared memory: \\(\\text{TPB}\\) elements per block
-- Input layout: `Layout.row_major(BATCH, SIZE)`
-- Output layout: `Layout.row_major(BATCH, 1)`
+- Input layout: `row_major[BATCH, SIZE]()`
+- Output layout: `row_major[BATCH, 1]()`
 
 Matrix visualization:
 
@@ -116,12 +116,12 @@ expected: HostBuffer([15.0, 51.0, 87.0, 123.0])
 
 <div class="solution-explanation">
 
-The solution implements a parallel row-wise sum reduction for a 2D matrix using LayoutTensor. Here's a comprehensive breakdown:
+The solution implements a parallel row-wise sum reduction for a 2D matrix using TileTensor. Here's a comprehensive breakdown:
 
 ### Matrix layout and block mapping
 
 ```txt
-Input Matrix (4×6) with LayoutTensor:                Block Assignment:
+Input Matrix (4×6) with TileTensor:                Block Assignment:
 [[ a[0,0]  a[0,1]  a[0,2]  a[0,3]  a[0,4]  a[0,5] ] → Block(0,0)
  [ a[1,0]  a[1,1]  a[1,2]  a[1,3]  a[1,4]  a[1,5] ] → Block(0,1)
  [ a[2,0]  a[2,1]  a[2,2]  a[2,3]  a[2,4]  a[2,5] ] → Block(0,2)
@@ -156,9 +156,9 @@ Input Matrix (4×6) with LayoutTensor:                Block Assignment:
    - Each block processes one complete row
 
 2. **Memory Access Pattern**:
-   - LayoutTensor 2D indexing for input: `a[batch, local_i]`
+   - TileTensor 2D indexing for input: `a[batch, local_i]`
    - Shared memory for efficient reduction
-   - LayoutTensor 2D indexing for output: `output[batch, 0]`
+   - TileTensor 2D indexing for output: `output[batch, 0]`
 
 3. **Parallel Reduction Logic**:
 
@@ -196,7 +196,7 @@ Input Matrix (4×6) with LayoutTensor:                Block Assignment:
 ### Performance optimizations
 
 1. **Memory Efficiency**:
-   - Coalesced memory access through LayoutTensor
+   - Coalesced memory access through TileTensor
    - Shared memory for fast reduction
    - Single write per row result
 
diff --git "a/book/src/puzzle_16/na\303\257ve.md" "b/book/src/puzzle_16/na\303\257ve.md"
index 936f65aa..429e5d27 100644
--- "a/book/src/puzzle_16/na\303\257ve.md"
+++ "b/book/src/puzzle_16/na\303\257ve.md"
@@ -24,9 +24,9 @@ The key insight is understanding how to map 2D thread indices to matrix elements
 
 Layout configuration:
 
-- Input A: `Layout.row_major(SIZE, SIZE)`
-- Input B: `Layout.row_major(SIZE, SIZE)`
-- Output: `Layout.row_major(SIZE, SIZE)`
+- Input A: `row_major[SIZE, SIZE]()`
+- Input B: `row_major[SIZE, SIZE]()`
+- Output: `row_major[SIZE, SIZE]()`
 
 ## Code to complete
 
@@ -108,7 +108,7 @@ expected: HostBuffer([4.0, 6.0, 12.0, 22.0])
 
 <div class="solution-explanation">
 
-The naive matrix multiplication using LayoutTensor follows this basic approach:
+The naive matrix multiplication using TileTensor follows this basic approach:
 
 ### Matrix layout (2×2 example)
 
diff --git a/book/src/puzzle_16/shared_memory.md b/book/src/puzzle_16/shared_memory.md
index 8b8c41d2..5cf51fd2 100644
--- a/book/src/puzzle_16/shared_memory.md
+++ b/book/src/puzzle_16/shared_memory.md
@@ -8,13 +8,13 @@ This puzzle implements matrix multiplication for square matrices \\(A\\) and \\(
 
 This puzzle covers:
 
-- Block-local memory management with LayoutTensor
+- Block-local memory management with TileTensor
 - Thread synchronization patterns
 - Memory access optimization using shared memory
 - Collaborative data loading with 2D indexing
-- Efficient use of LayoutTensor for matrix operations
+- Efficient use of TileTensor for matrix operations
 
-The central concept involves utilizing fast shared memory through LayoutTensor to minimize costly global memory accesses.
+The central concept involves utilizing fast shared memory through TileTensor to minimize costly global memory accesses.
 
 ## Configuration
 
@@ -24,15 +24,15 @@ The central concept involves utilizing fast shared memory through LayoutTensor t
 
 Layout configuration:
 
-- Input A: `Layout.row_major(SIZE, SIZE)`
-- Input B: `Layout.row_major(SIZE, SIZE)`
-- Output: `Layout.row_major(SIZE, SIZE)`
-- Shared Memory: Two `TPB × TPB` LayoutTensors
+- Input A: `row_major[SIZE, SIZE]()`
+- Input B: `row_major[SIZE, SIZE]()`
+- Output: `row_major[SIZE, SIZE]()`
+- Shared Memory: Two `TPB × TPB` TileTensors
 
 Memory organization:
 
 ```txt
-Global Memory (LayoutTensor):          Shared Memory (LayoutTensor):
+Global Memory (TileTensor):          Shared Memory (TileTensor):
 A[i,j]: Direct access                  a_shared[local_row, local_col]
 B[i,j]: Direct access                  b_shared[local_row, local_col]
 ```
@@ -117,7 +117,7 @@ expected: HostBuffer([4.0, 6.0, 12.0, 22.0])
 
 <div class="solution-explanation">
 
-The shared memory implementation with LayoutTensor improves performance through efficient memory access patterns:
+The shared memory implementation with TileTensor improves performance through efficient memory access patterns:
 
 ### Memory organization
 
@@ -138,9 +138,9 @@ Matrix B:                           b_shared: (similar layout)
 1. **Shared Memory Setup**:
 
    ```mojo
-   # Create 2D shared memory tensors using LayoutTensor with address_space
-   a_shared = LayoutTensor[dtype, Layout.row_major(TPB, TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
-   b_shared = LayoutTensor[dtype, Layout.row_major(TPB, TPB), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
+   # Create 2D shared memory tensors using TileTensor with address_space
+   a_shared = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB, TPB]())
+   b_shared = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB, TPB]())
    ```
 
 2. **Thread Indexing**:
@@ -158,7 +158,7 @@ Matrix B:                           b_shared: (similar layout)
 3. **Data Loading**:
 
    ```mojo
-   # Load data into shared memory using LayoutTensor indexing
+   # Load data into shared memory using TileTensor indexing
    if row < size and col < size:
        a_shared[local_row, local_col] = a[row, col]
        b_shared[local_row, local_col] = b[row, col]
@@ -217,13 +217,13 @@ Matrix B:                           b_shared: (similar layout)
 
 ### Key language features
 
-1. **LayoutTensor benefits**:
+1. **TileTensor benefits**:
    - Direct 2D indexing simplifies code
    - Type safety through `element_type`
    - Efficient memory layout handling
 
 2. **Shared memory allocation**:
-   - LayoutTensor with address_space for structured allocation
+   - TileTensor with address_space for structured allocation
    - Row-major layout matching input tensors
    - Proper alignment for efficient access
 
@@ -253,7 +253,7 @@ This implementation significantly improves performance over the naive version by
 
 - Reducing global memory accesses
 - Enabling data reuse through shared memory
-- Using efficient 2D indexing with LayoutTensor
+- Using efficient 2D indexing with TileTensor
 - Maintaining proper thread synchronization
 
 </div>
diff --git a/book/src/puzzle_16/tiled.md b/book/src/puzzle_16/tiled.md
index 27f5e5df..3701ebc2 100644
--- a/book/src/puzzle_16/tiled.md
+++ b/book/src/puzzle_16/tiled.md
@@ -2,28 +2,28 @@
 
 ## Overview
 
-Implement a kernel that multiplies square matrices \\(A\\) and \\(B\\) using tiled matrix multiplication with LayoutTensor. This approach handles large matrices by processing them in smaller chunks (tiles).
+Implement a kernel that multiplies square matrices \\(A\\) and \\(B\\) using tiled matrix multiplication with TileTensor. This approach handles large matrices by processing them in smaller chunks (tiles).
 
 ## Key concepts
 
-- Matrix tiling with LayoutTensor for efficient computation
+- Matrix tiling with TileTensor for efficient computation
 - Multi-block coordination with proper layouts
 - Efficient shared memory usage through TensorBuilder
-- Boundary handling for tiles with LayoutTensor indexing
+- Boundary handling for tiles with TileTensor indexing
 
 ## Configuration
 
 - Matrix size: \\(\\text{SIZE\_TILED} = 9\\)
 - Threads per block: \\(\\text{TPB} \times \\text{TPB} = 3 \times 3\\)
 - Grid dimensions: \\(3 \times 3\\) blocks
-- Shared memory: Two \\(\\text{TPB} \times \\text{TPB}\\) LayoutTensors per block
+- Shared memory: Two \\(\\text{TPB} \times \\text{TPB}\\) TileTensors per block
 
 Layout configuration:
 
-- Input A: `Layout.row_major(SIZE_TILED, SIZE_TILED)`
-- Input B: `Layout.row_major(SIZE_TILED, SIZE_TILED)`
-- Output: `Layout.row_major(SIZE_TILED, SIZE_TILED)`
-- Shared Memory: Two `TPB × TPB` LayoutTensors using TensorBuilder
+- Input A: `row_major[SIZE_TILED, SIZE_TILED]()`
+- Input B: `row_major[SIZE_TILED, SIZE_TILED]()`
+- Output: `row_major[SIZE_TILED, SIZE_TILED]()`
+- Shared Memory: Two `TPB × TPB` TileTensors using TensorBuilder
 
 ## Tiling strategy
 
@@ -35,7 +35,7 @@ Grid Layout (3×3):           Thread Layout per Block (3×3):
 [B10][B11][B12]               [T10 T11 T12]
 [B20][B21][B22]               [T20 T21 T22]
 
-Each block processes a tile using LayoutTensor indexing
+Each block processes a tile using TileTensor indexing
 ```
 
 ### Tile processing steps
@@ -316,7 +316,7 @@ Key performance features:
 
 This implementation achieves high performance through:
 
-- Efficient use of LayoutTensor for memory access
+- Efficient use of TileTensor for memory access
 - Optimal tiling strategy
 - Proper thread synchronization
 - Careful boundary handling
@@ -324,7 +324,7 @@ This implementation achieves high performance through:
 </div>
 </details>
 
-## Solution: Idiomatic LayoutTensor tiling
+## Solution: Idiomatic TileTensor tiling
 
 <details class="solution-details">
 <summary></summary>
@@ -335,14 +335,14 @@ This implementation achieves high performance through:
 
 <div class="solution-explanation">
 
-The idiomatic tiled matrix multiplication leverages Mojo's LayoutTensor API and asynchronous memory operations for a beautifully clean implementation.
+The idiomatic tiled matrix multiplication leverages Mojo's TileTensor API and asynchronous memory operations for a beautifully clean implementation.
 
 **🔑 Key Point: This implementation performs standard matrix multiplication A × B using coalesced loading for both matrices.**
 
 **What this implementation does:**
 
 - **Matrix operation**: Standard \\(A \times B\\) multiplication (not \\(A \times B^T\\))
-- **Loading pattern**: Both matrices use `Layout.row_major(1, TPB)` for coalesced access
+- **Loading pattern**: Both matrices use `row_major[1, TPB]()` for coalesced access
 - **Computation**: `acc += a_shared[local_row, k] * b_shared[k, local_col]`
 - **Data layout**: No transposition during loading - both matrices loaded in same orientation
 
@@ -354,7 +354,7 @@ The idiomatic tiled matrix multiplication leverages Mojo's LayoutTensor API and
 
 With the \\((9 \times 9)\\) matrix size, we get perfect tiling that eliminates all boundary checks:
 
-1. **LayoutTensor tile API**
+1. **TileTensor tile API**
 
    ```mojo
    out_tile = output.tile[TPB, TPB](block_idx.y, block_idx.x)
@@ -362,7 +362,7 @@ With the \\((9 \times 9)\\) matrix size, we get perfect tiling that eliminates a
    b_tile = b.tile[TPB, TPB](idx, block_idx.x)
    ```
 
-   This directly expresses "get the tile at position (block_idx.y, block_idx.x)" without manual coordinate calculation. See the [documentation](https://docs.modular.com/mojo/kernels/layout/layout_tensor/LayoutTensor/#tile) for more details.
+   This directly expresses "get the tile at position (block_idx.y, block_idx.x)" without manual coordinate calculation. See the [documentation](https://docs.modular.com/mojo/kernels/layout/tile_tensor/TileTensor/#tile) for more details.
 
 2. **Asynchronous memory operations**
 
@@ -393,14 +393,14 @@ With the \\((9 \times 9)\\) matrix size, we get perfect tiling that eliminates a
 3. **Optimized memory access layouts**
 
    ```mojo
-   comptime load_a_layout = Layout.row_major(1, TPB)    # Coalesced loading
-   comptime load_b_layout = Layout.row_major(1, TPB)    # Coalesced loading
+   comptime load_a_layout = row_major[1, TPB]()    # Coalesced loading
+   comptime load_b_layout = row_major[1, TPB]()    # Coalesced loading
    # Note: Both matrices use the same layout for standard A × B multiplication
    ```
 
    **Memory Access Analysis for Current Implementation:**
 
-   Both matrices use `Layout.row_major(1, TPB)` for coalesced loading from global memory:
+   Both matrices use `row_major[1, TPB]()` for coalesced loading from global memory:
    - `load_a_layout`: Threads cooperate to load consecutive elements from matrix A rows
    - `load_b_layout`: Threads cooperate to load consecutive elements from matrix B rows
    - **Key insight**: Thread layout determines how threads cooperate during copy, not the final data layout
@@ -422,11 +422,11 @@ With the \\((9 \times 9)\\) matrix size, we get perfect tiling that eliminates a
    - Matrix A tile: threads load A[block_row, k], A[block_row, k+1], A[block_row, k+2]... (consecutive)
    - Matrix B tile: threads load B[k, block_col], B[k, block_col+1], B[k, block_col+2]... (consecutive)
 
-   Both patterns are coalesced with Layout.row_major(1, TPB)
+   Both patterns are coalesced with row_major[1, TPB]()
    ```
 
    **Three separate memory concerns:**
-   1. **Global-to-shared coalescing**: `Layout.row_major(1, TPB)` ensures coalesced global memory access
+   1. **Global-to-shared coalescing**: `row_major[1, TPB]()` ensures coalesced global memory access
    2. **Shared memory computation**: `a_shared[local_row, k] * b_shared[k, local_col]` avoids bank conflicts
    3. **Matrix operation**: The computation pattern determines this is A × B, not A × B^T
 
@@ -465,7 +465,7 @@ This implementation shows how high-level abstractions can express complex GPU al
 
 | Feature | Manual Tiling | Idiomatic Tiling |
 |---------|--------------|------------------|
-| Memory access | Direct indexing with bounds checks | LayoutTensor tile API |
+| Memory access | Direct indexing with bounds checks | TileTensor tile API |
 | Tile loading | Explicit element-by-element copying | Dedicated copy engine bulk transfers |
 | Shared memory | Manual initialization (defensive) | Managed by copy functions |
 | Code complexity | More verbose with explicit indexing | More concise with higher-level APIs |
@@ -481,7 +481,7 @@ The current implementation does NOT use transposed loading. This section is pure
 
 **Current implementation recap:**
 
-- Uses `Layout.row_major(1, TPB)` for both matrices
+- Uses `row_major[1, TPB]()` for both matrices
 - Performs standard A × B multiplication
 - No data transposition during copy
 
@@ -492,8 +492,8 @@ While this puzzle uses standard coalesced loading for both matrices, the layout
 ```mojo
 # Example: Loading pre-transposed matrix B^T to compute A × B
 # (This is NOT what the current implementation does)
-comptime load_b_layout = Layout.row_major(TPB, 1)   # Load B^T with coalesced access
-comptime store_b_layout = Layout.row_major(1, TPB)  # Store as B in shared memory
+comptime load_b_layout = row_major[TPB, 1]()   # Load B^T with coalesced access
+comptime store_b_layout = row_major[1, TPB]()  # Store as B in shared memory
 copy_dram_to_sram_async[src_thread_layout=load_b_layout, dst_thread_layout=store_b_layout](b_shared, b_tile)
 ```
 
@@ -506,7 +506,7 @@ copy_dram_to_sram_async[src_thread_layout=load_b_layout, dst_thread_layout=store
 
 **Key distinction:**
 
-- **Current implementation**: Both matrices use `Layout.row_major(1, TPB)` for standard \\(A \times B\\) multiplication
+- **Current implementation**: Both matrices use `row_major[1, TPB]()` for standard \\(A \times B\\) multiplication
 - **Transposed loading example**: Would use different layouts to handle pre-transposed data or different matrix operations
 
 This demonstrates Mojo's philosophy: providing low-level control when needed while maintaining high-level abstractions for common cases.
@@ -518,13 +518,13 @@ This demonstrates Mojo's philosophy: providing low-level control when needed whi
 **What the idiomatic tiled implementation actually does:**
 
 1. **Matrix Operation**: Standard A × B multiplication
-2. **Memory Loading**: Both matrices use `Layout.row_major(1, TPB)` for coalesced access
+2. **Memory Loading**: Both matrices use `row_major[1, TPB]()` for coalesced access
 3. **Computation Pattern**: `acc += a_shared[local_row, k] * b_shared[k, local_col]`
 4. **Data Layout**: No transposition during loading
 
 **Why this is optimal:**
 
-- **Coalesced global memory access**: `Layout.row_major(1, TPB)` ensures efficient loading
+- **Coalesced global memory access**: `row_major[1, TPB]()` ensures efficient loading
 - **Bank conflict avoidance**: Shared memory access pattern avoids conflicts
 - **Standard algorithm**: Implements the most common matrix multiplication pattern
 
diff --git a/book/src/puzzle_17/puzzle_17.md b/book/src/puzzle_17/puzzle_17.md
index ef8f2ec5..fd7d0fe1 100644
--- a/book/src/puzzle_17/puzzle_17.md
+++ b/book/src/puzzle_17/puzzle_17.md
@@ -141,7 +141,7 @@ Let's break down how this works in the larger context:
 3. **Custom op registration**:
    - The `@compiler.register("conv1d")` decorator exposes our operation to MAX Graph. See [@compiler.register](https://docs.modular.com/mojo/manual/decorators/compiler-register/)
    - The `execute` method parameters define the interface (inputs, outputs, context)
-   - Input/output tensors are converted to LayoutTensors for use in our kernel
+   - Input/output tensors are converted to TileTensors for use in our kernel
    - Device context manages GPU memory allocation and kernel execution
 
 4. **Kernel execution**:
@@ -180,7 +180,7 @@ Let's break down how this works in the larger context:
    kernel_tensor = kernel.to_layout_tensor()
    ```
 
-   - MAX Graph tensors are converted to Mojo LayoutTensors
+   - MAX Graph tensors are converted to Mojo TileTensors
    - This allows our kernel to work with them directly
    - The layouts are extracted for compile-time optimization
 
diff --git a/book/src/puzzle_18/puzzle_18.md b/book/src/puzzle_18/puzzle_18.md
index b21e84e8..e1884e5c 100644
--- a/book/src/puzzle_18/puzzle_18.md
+++ b/book/src/puzzle_18/puzzle_18.md
@@ -42,8 +42,8 @@ Our GPU implementation uses parallel reduction for both finding the maximum valu
 
 Layout configuration:
 
-- Input tensor: `Layout.row_major(SIZE)`
-- Output tensor: `Layout.row_major(SIZE)`
+- Input tensor: `row_major[SIZE]()`
+- Output tensor: `row_major[SIZE]()`
 - Custom op parameters: `{"input_size": input_tensor.shape[0]}`
 
 Key aspects of this puzzle include:
@@ -257,8 +257,8 @@ def softmax_gpu_kernel[
     input_size: Int,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[mut=True, dtype, layout],
-    input: LayoutTensor[mut=False, dtype, layout],
+    output: TileTensor[mut=True, dtype, layout],
+    input: TileTensor[mut=False, dtype, layout],
 )
 ```
 
@@ -273,8 +273,8 @@ The kernel is parameterized with:
 #### Shared memory allocation
 
 ```mojo
-shared_max = LayoutTensor[dtype, Layout.row_major(BLOCK_DIM_X), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
-shared_sum = LayoutTensor[dtype, Layout.row_major(BLOCK_DIM_X), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()
+shared_max = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[BLOCK_DIM_X]())
+shared_sum = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[BLOCK_DIM_X]())
 ```
 
 The kernel allocates two shared memory buffers:
diff --git a/book/src/puzzle_19/puzzle_19.md b/book/src/puzzle_19/puzzle_19.md
index 53cea305..b581784e 100644
--- a/book/src/puzzle_19/puzzle_19.md
+++ b/book/src/puzzle_19/puzzle_19.md
@@ -81,10 +81,10 @@ Our GPU implementation **reuses and combines optimized kernels from previous puz
 
 Layout configuration:
 
-- Query tensor: `Layout.row_major(d)`
-- Key tensor: `Layout.row_major(seq_len, d)`
-- Value tensor: `Layout.row_major(seq_len, d)`
-- Output tensor: `Layout.row_major(d)`
+- Query tensor: `row_major[d]()`
+- Key tensor: `row_major[seq_len, d]()`
+- Value tensor: `row_major[seq_len, d]()`
+- Output tensor: `row_major[d]()`
 - Custom op parameters: `{"seq_len": seq_len, "d": d, "dtype": dtype}`
 
 Key aspects of this puzzle include:
@@ -121,7 +121,7 @@ To complete this puzzle, we'll leverage the tiled matmul kernel from [Puzzle 16]
 
 **Transpose Kernel Implementation Guide:**
 
-1. **Shared Memory Setup**: Use `LayoutTensor[dtype, Layout.row_major(TRANSPOSE_BLOCK_DIM_XY, TRANSPOSE_BLOCK_DIM_XY), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()` to create a square `TRANSPOSE_BLOCK_DIM_XY` × `TRANSPOSE_BLOCK_DIM_XY` shared memory tile for efficient data exchange between threads
+1. **Shared Memory Setup**: Use `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TRANSPOSE_BLOCK_DIM_XY, TRANSPOSE_BLOCK_DIM_XY]())` to create a square `TRANSPOSE_BLOCK_DIM_XY` × `TRANSPOSE_BLOCK_DIM_XY` shared memory tile for efficient data exchange between threads
 
 2. **Thread Indexing**: Map threads to matrix elements:
    - `local_row = thread_idx.y`, `local_col = thread_idx.x` (position within the block)
diff --git a/book/src/puzzle_23/elementwise.md b/book/src/puzzle_23/elementwise.md
index 0942d44d..cb0ad5df 100644
--- a/book/src/puzzle_23/elementwise.md
+++ b/book/src/puzzle_23/elementwise.md
@@ -10,7 +10,7 @@ This puzzle covers:
 
 - **Functional GPU programming** with `elementwise`
 - **Automatic SIMD vectorization** within GPU threads
-- **LayoutTensor operations** for safe memory access
+- **TileTensor operations** for safe memory access
 - **GPU thread hierarchy** vs SIMD operations
 - **Capturing semantics** in nested functions
 
@@ -24,7 +24,7 @@ The implementation covers fundamental patterns applicable to all GPU functional
 - Vector size: `SIZE = 1024`
 - Data type: `DType.float32`
 - SIMD width: Target-dependent (determined by GPU architecture and data type)
-- Layout: `Layout.row_major(SIZE)` (1D row-major)
+- Layout: `row_major[SIZE]()` (1D row-major)
 
 ## Code to complete
 
diff --git a/book/src/puzzle_23/puzzle_23.md b/book/src/puzzle_23/puzzle_23.md
index 47aeff5d..c34ebc2d 100644
--- a/book/src/puzzle_23/puzzle_23.md
+++ b/book/src/puzzle_23/puzzle_23.md
@@ -71,7 +71,7 @@ Before diving into functional patterns, ensure you're comfortable with:
 
 - **Basic GPU concepts**: Memory hierarchy, thread execution, SIMD operations
 - **Mojo fundamentals**: Parameter functions, compile-time specialization, capturing semantics
-- **LayoutTensor operations**: Loading, storing, and tensor manipulation
+- **TileTensor operations**: Loading, storing, and tensor manipulation
 - **GPU memory management**: Buffer allocation, host-device synchronization
 
 ## Learning path
@@ -86,7 +86,7 @@ Start with the foundation: automatic thread management and SIMD vectorization.
 
 - Functional GPU programming with `elementwise`
 - Automatic SIMD vectorization within GPU threads
-- LayoutTensor operations for safe memory access
+- TileTensor operations for safe memory access
 - Capturing semantics in nested functions
 
 **Key pattern:**
diff --git a/book/src/puzzle_23/tile.md b/book/src/puzzle_23/tile.md
index 2a26d174..bd0000b1 100644
--- a/book/src/puzzle_23/tile.md
+++ b/book/src/puzzle_23/tile.md
@@ -31,7 +31,7 @@ But with a completely different execution strategy optimized for memory hierarch
 - Tile size: `TILE_SIZE = 32`
 - Data type: `DType.float32`
 - SIMD width: GPU-dependent (for operations within tiles)
-- Layout: `Layout.row_major(SIZE)` (1D row-major)
+- Layout: `row_major[SIZE]()` (1D row-major)
 
 ## Code to complete
 
@@ -58,7 +58,7 @@ For a 1024-element vector with `TILE_SIZE=32`: `1024 ÷ 32 = 32` tiles exactly.
 
 ### 2. **Tile extraction pattern**
 
-Check out the [LayoutTensor `.tile` documentation](https://docs.modular.com/mojo/kernels/layout/layout_tensor/LayoutTensor/#tile).
+Check out the [TileTensor `.tile` documentation](https://docs.modular.com/mojo/kernels/layout/tile_tensor/TileTensor/#tile).
 
 ```mojo
 tile_id = indices[0]  # Each thread gets one tile to process
diff --git a/book/src/puzzle_23/vectorize.md b/book/src/puzzle_23/vectorize.md
index 6098ac58..5dd31e81 100644
--- a/book/src/puzzle_23/vectorize.md
+++ b/book/src/puzzle_23/vectorize.md
@@ -32,7 +32,7 @@ But with sophisticated vectorization strategies for maximum performance.
 - Tile size: `TILE_SIZE = 32`
 - Data type: `DType.float32`
 - SIMD width: GPU-dependent
-- Layout: `Layout.row_major(SIZE)` (1D row-major)
+- Layout: `row_major[SIZE]()` (1D row-major)
 
 ## 1. Manual vectorization approach
 
diff --git a/book/src/puzzle_24/puzzle_24.md b/book/src/puzzle_24/puzzle_24.md
index 59733f5d..d261d862 100644
--- a/book/src/puzzle_24/puzzle_24.md
+++ b/book/src/puzzle_24/puzzle_24.md
@@ -49,9 +49,9 @@ Learn the core warp primitives from `gpu.primitives.warp`:
 ```mojo
 # 1. Reduction through shared memory
 # Complex pattern we have seen earlier (from p12.mojo):
-shared = LayoutTensor[
+shared = TileTensor[
     dtype,
-    Layout.row_major(WARP_SIZE),
+    row_major[WARP_SIZE](),
     MutAnyOrigin,
     address_space = AddressSpace.SHARED,
 ].stack_allocation()
@@ -93,7 +93,7 @@ Before diving into warp programming, ensure you're comfortable with:
 
 - **Part V functional patterns**: Elementwise, tiled, and vectorized approaches
 - **GPU thread hierarchy**: Understanding blocks, warps, and threads
-- **LayoutTensor operations**: Loading, storing, and tensor manipulation
+- **TileTensor operations**: Loading, storing, and tensor manipulation
 - **Shared memory concepts**: Why barriers and tree reduction are complex
 
 ## Learning path
diff --git a/book/src/puzzle_24/warp_sum.md b/book/src/puzzle_24/warp_sum.md
index 1289baff..c04db78f 100644
--- a/book/src/puzzle_24/warp_sum.md
+++ b/book/src/puzzle_24/warp_sum.md
@@ -25,7 +25,7 @@ But the implementation teaches fundamental patterns for all warp-level GPU progr
 - Data type: `DType.float32`
 - Block configuration: `(WARP_SIZE, 1)` threads per block
 - Grid configuration: `(1, 1)` blocks per grid
-- Layout: `Layout.row_major(SIZE)` (1D row-major)
+- Layout: `row_major[SIZE]()` (1D row-major)
 
 ## The traditional complexity (from Puzzle 12)
 
diff --git a/book/src/puzzle_25/puzzle_25.md b/book/src/puzzle_25/puzzle_25.md
index ac88c36f..8f0b7798 100644
--- a/book/src/puzzle_25/puzzle_25.md
+++ b/book/src/puzzle_25/puzzle_25.md
@@ -48,9 +48,9 @@ Learn the core communication primitives from `gpu.primitives.warp`:
 
 ```mojo
 # Complex neighbor access pattern (traditional approach):
-shared = LayoutTensor[
+shared = TileTensor[
     dtype,
-    Layout.row_major(WARP_SIZE),
+    row_major[WARP_SIZE](),
     MutAnyOrigin,
     address_space = AddressSpace.SHARED,
 ].stack_allocation()
@@ -89,7 +89,7 @@ Before diving into warp communication, ensure you're comfortable with:
 
 - **Part VII warp fundamentals**: Understanding SIMT execution and basic warp operations (see [Puzzle 24](../puzzle_24/puzzle_24.md))
 - **GPU thread hierarchy**: Blocks, warps, and lane numbering
-- **LayoutTensor operations**: Loading, storing, and tensor manipulation
+- **TileTensor operations**: Loading, storing, and tensor manipulation
 - **Boundary condition handling**: Managing edge cases in parallel algorithms
 
 ## Learning path
diff --git a/book/src/puzzle_25/warp_broadcast.md b/book/src/puzzle_25/warp_broadcast.md
index b6729a70..25d9f6d1 100644
--- a/book/src/puzzle_25/warp_broadcast.md
+++ b/book/src/puzzle_25/warp_broadcast.md
@@ -80,7 +80,7 @@ Implement a basic broadcast pattern where lane 0 computes a block-level statisti
 - Grid configuration: `(1, 1)` blocks per grid
 - Block configuration: `(WARP_SIZE, 1)` threads per block
 - Data type: `DType.float32`
-- Layout: `Layout.row_major(SIZE)` (1D row-major)
+- Layout: `row_major[SIZE]()` (1D row-major)
 
 ### Code to complete
 
diff --git a/book/src/puzzle_25/warp_shuffle_down.md b/book/src/puzzle_25/warp_shuffle_down.md
index 55664f9e..e034fc18 100644
--- a/book/src/puzzle_25/warp_shuffle_down.md
+++ b/book/src/puzzle_25/warp_shuffle_down.md
@@ -29,7 +29,7 @@ This transforms complex neighbor access patterns into simple warp-level operatio
 - Grid configuration: `(1, 1)` blocks per grid
 - Block configuration: `(WARP_SIZE, 1)` threads per block
 - Data type: `DType.float32`
-- Layout: `Layout.row_major(SIZE)` (1D row-major)
+- Layout: `row_major[SIZE]()` (1D row-major)
 
 ### The shuffle_down concept
 
diff --git a/book/src/puzzle_26/puzzle_26.md b/book/src/puzzle_26/puzzle_26.md
index 962a606f..6ddad887 100644
--- a/book/src/puzzle_26/puzzle_26.md
+++ b/book/src/puzzle_26/puzzle_26.md
@@ -48,9 +48,9 @@ Learn the sophisticated communication primitives from `gpu.primitives.warp`:
 
 ```mojo
 # Complex parallel reduction (traditional approach - from Puzzle 14):
-shared = LayoutTensor[
+shared = TileTensor[
     dtype,
-    Layout.row_major(WARP_SIZE),
+    row_major[WARP_SIZE](),
     MutAnyOrigin,
     address_space = AddressSpace.SHARED,
 ].stack_allocation()
diff --git a/book/src/puzzle_26/warp_prefix_sum.md b/book/src/puzzle_26/warp_prefix_sum.md
index 4a0d6574..bf861e87 100644
--- a/book/src/puzzle_26/warp_prefix_sum.md
+++ b/book/src/puzzle_26/warp_prefix_sum.md
@@ -26,7 +26,7 @@ This transforms multi-phase shared memory algorithms into elegant single-functio
 - Grid configuration: `(1, 1)` blocks per grid
 - Block configuration: `(WARP_SIZE, 1)` threads per block
 - Data type: `DType.float32`
-- Layout: `Layout.row_major(SIZE)` (1D row-major)
+- Layout: `row_major[SIZE]()` (1D row-major)
 
 ### The `prefix_sum` advantage
 
diff --git a/book/src/puzzle_26/warp_shuffle_xor.md b/book/src/puzzle_26/warp_shuffle_xor.md
index 925b48d6..51415b98 100644
--- a/book/src/puzzle_26/warp_shuffle_xor.md
+++ b/book/src/puzzle_26/warp_shuffle_xor.md
@@ -29,7 +29,7 @@ This transforms complex parallel algorithms into elegant butterfly communication
 - Grid configuration: `(1, 1)` blocks per grid
 - Block configuration: `(WARP_SIZE, 1)` threads per block
 - Data type: `DType.float32`
-- Layout: `Layout.row_major(SIZE)` (1D row-major)
+- Layout: `row_major[SIZE]()` (1D row-major)
 
 ### The `shuffle_xor` concept
 
diff --git a/book/src/puzzle_27/block_broadcast.md b/book/src/puzzle_27/block_broadcast.md
index 8e0a9fd9..6edcaefc 100644
--- a/book/src/puzzle_27/block_broadcast.md
+++ b/book/src/puzzle_27/block_broadcast.md
@@ -25,7 +25,7 @@ Each thread contributes to the mean calculation, then receives the broadcast mea
 - Data type: `DType.float32`
 - Block configuration: `(128, 1)` threads per block (`TPB = 128`)
 - Grid configuration: `(1, 1)` blocks per grid
-- Layout: `Layout.row_major(SIZE)` (1D row-major for input and output)
+- Layout: `row_major[SIZE]()` (1D row-major for input and output)
 - Test data: Values cycling 1-8, so mean = 4.5
 - Expected output: Normalized vector with mean = 1.0
 
@@ -100,7 +100,7 @@ The algorithm follows the perfect block operations pattern:
 
 ### 2. **Data loading and sum computation (familiar patterns)**
 
-Load your element using the established LayoutTensor pattern:
+Load your element using the established TileTensor pattern:
 
 ```mojo
 var my_value: Scalar[dtype] = 0.0
@@ -255,7 +255,7 @@ Thread indexing (consistent across all puzzles):
   global_i = block_dim.x * block_idx.x + thread_idx.x  // Maps to input array position
   local_i = thread_idx.x                              // Position within block (0-127)
 
-Parallel element loading using LayoutTensor pattern:
+Parallel element loading using TileTensor pattern:
   Thread 0:   my_value = input_data[0][0] = 1.0    // First cycle value
   Thread 1:   my_value = input_data[1][0] = 2.0    // Second cycle value
   Thread 7:   my_value = input_data[7][0] = 8.0    // Last cycle value
@@ -373,10 +373,10 @@ Mathematical proof of correctness:
 Algorithm produces provably correct mathematical result.
 ```
 
-### **Connection to [Puzzle 12](../puzzle_12/layout_tensor.md) (foundational patterns):**
+### **Connection to [Puzzle 12](../puzzle_12/tile_tensor.md) (foundational patterns):**
 
 - **Thread coordination evolution**: Same `global_i`, `local_i` patterns but with block primitives
-- **Memory access patterns**: Same LayoutTensor SIMD extraction `[0]` but optimized workflow
+- **Memory access patterns**: Same TileTensor SIMD extraction `[0]` but optimized workflow
 - **Complexity elimination**: Replaces 20+ lines of manual barriers with 2 block operations
 - **Educational progression**: Manual → automated, complex → simple, error-prone → reliable
 
@@ -454,7 +454,7 @@ Mean normalization is the perfect educational example of this fundamental patter
 
 **Complete block operations progression:**
 
-1. **Manual coordination** ([Puzzle 12](../puzzle_12/layout_tensor.md)): Understand parallel fundamentals
+1. **Manual coordination** ([Puzzle 12](../puzzle_12/tile_tensor.md)): Understand parallel fundamentals
 2. **Warp primitives** ([Puzzle 24](../puzzle_24/warp_sum.md)): Learn hardware-accelerated patterns
 3. **Block reduction** ([`block.sum()`](./block_sum.md)): Learn all→one communication
 4. **Block scan** ([`block.prefix_sum()`](./block_prefix_sum.md)): Learn all→each communication
diff --git a/book/src/puzzle_27/block_prefix_sum.md b/book/src/puzzle_27/block_prefix_sum.md
index afdd50bf..d9cbf3c6 100644
--- a/book/src/puzzle_27/block_prefix_sum.md
+++ b/book/src/puzzle_27/block_prefix_sum.md
@@ -26,7 +26,7 @@ Each thread determines its element's bin assignment, with `block.prefix_sum()` c
 - Block configuration: `(128, 1)` threads per block (`TPB = 128`)
 - Grid configuration: `(1, 1)` blocks per grid
 - Number of bins: `NUM_BINS = 8` (ranges [0.0, 0.125), [0.125, 0.25), etc.)
-- Layout: `Layout.row_major(SIZE)` (1D row-major)
+- Layout: `row_major[SIZE]()` (1D row-major)
 - Warps per block: `128 / WARP_SIZE` (2 or 4 warps depending on GPU)
 
 ## The challenge: Parallel bin extraction
@@ -132,7 +132,7 @@ if belongs_to_target == 1:
     bin_output[Int(offset[0])] = my_value  # Convert SIMD to Int for indexing
 ```
 
-This is just like the bounds checking pattern from [Puzzle 12](../puzzle_12/layout_tensor.md), but now the condition is "belongs to target bin."
+This is just like the bounds checking pattern from [Puzzle 12](../puzzle_12/tile_tensor.md), but now the condition is "belongs to target bin."
 
 ### 6. **Final count computation**
 
@@ -150,7 +150,7 @@ if local_i == tpb - 1:  # Last thread in block
 
 Remember the patterns from previous puzzles:
 
-- `LayoutTensor` indexing returns SIMD: `input_data[i][0]`
+- `TileTensor` indexing returns SIMD: `input_data[i][0]`
 - `block.prefix_sum()` returns SIMD: `offset[0]` to extract
 - Array indexing needs `Int`: `Int(offset[0])` for `bin_output[...]`
 
@@ -252,14 +252,14 @@ The `block.prefix_sum()` kernel demonstrates advanced parallel coordination patt
 
 ## **Step-by-step algorithm walkthrough:**
 
-### **Phase 1: Element processing (like [Puzzle 12](../puzzle_12/layout_tensor.md) dot product)**
+### **Phase 1: Element processing (like [Puzzle 12](../puzzle_12/tile_tensor.md) dot product)**
 
 ```
 Thread indexing (familiar pattern):
   global_i = block_dim.x * block_idx.x + thread_idx.x  // Global element index
   local_i = thread_idx.x                              // Local thread index
 
-Element loading (like LayoutTensor pattern):
+Element loading (like TileTensor pattern):
   Thread 0:  my_value = input_data[0][0] = 0.00
   Thread 1:  my_value = input_data[1][0] = 0.01
   Thread 13: my_value = input_data[13][0] = 0.13
@@ -328,11 +328,11 @@ Last thread computes total (not thread 0!):
 
 ## **Why this advanced algorithm works:**
 
-### **Connection to [Puzzle 12](../puzzle_12/layout_tensor.md) (Traditional dot product):**
+### **Connection to [Puzzle 12](../puzzle_12/tile_tensor.md) (Traditional dot product):**
 
 - **Same thread indexing**: `global_i` and `local_i` patterns
 - **Same bounds checking**: `if global_i < size` validation
-- **Same data loading**: LayoutTensor SIMD extraction with `[0]`
+- **Same data loading**: TileTensor SIMD extraction with `[0]`
 
 ### **Connection to [`block.sum()`](./block_sum.md) (earlier in this puzzle):**
 
diff --git a/book/src/puzzle_27/block_sum.md b/book/src/puzzle_27/block_sum.md
index 179e7d4f..89317757 100644
--- a/book/src/puzzle_27/block_sum.md
+++ b/book/src/puzzle_27/block_sum.md
@@ -25,12 +25,12 @@ But the implementation teaches fundamental patterns for all block-level GPU prog
 - Data type: `DType.float32`
 - Block configuration: `(128, 1)` threads per block (`TPB = 128`)
 - Grid configuration: `(1, 1)` blocks per grid
-- Layout: `Layout.row_major(SIZE)` (1D row-major)
+- Layout: `row_major[SIZE]()` (1D row-major)
 - Warps per block: `128 / WARP_SIZE` (4 warps on NVIDIA, 2 or 4 warps on AMD)
 
 ## The traditional complexity (from Puzzle 12)
 
-Recall the complex approach from [Puzzle 12](../puzzle_12/layout_tensor.md) that required shared memory, barriers, and tree reduction:
+Recall the complex approach from [Puzzle 12](../puzzle_12/tile_tensor.md) that required shared memory, barriers, and tree reduction:
 
 ```mojo
 {{#include ../../../solutions/p27/p27.mojo:traditional_dot_product_solution}}
@@ -171,9 +171,9 @@ Every block reduction follows the same conceptual pattern:
 
 Each thread should handle one element pair from vectors `a` and `b`. What operation combines these into a "partial result" that can be summed across threads?
 
-### 3. **LayoutTensor indexing patterns**
+### 3. **TileTensor indexing patterns**
 
-When accessing `LayoutTensor` elements, remember that indexing returns SIMD values. You'll need to extract the scalar value for arithmetic operations.
+When accessing `TileTensor` elements, remember that indexing returns SIMD values. You'll need to extract the scalar value for arithmetic operations.
 
 ### 4. **[block.sum()](https://docs.modular.com/mojo/std/gpu/primitives/block/sum) API concepts**
 
diff --git a/book/src/puzzle_28/puzzle_28.md b/book/src/puzzle_28/puzzle_28.md
index 8a1fb7c3..9976e13d 100644
--- a/book/src/puzzle_28/puzzle_28.md
+++ b/book/src/puzzle_28/puzzle_28.md
@@ -162,7 +162,7 @@ This concept becomes particularly important when implementing async copy operati
 - Grid configuration: `(VECTOR_SIZE // CONV_TILE_SIZE, 1)` blocks per grid (64 blocks)
 - Kernel size: `KERNEL_SIZE = 5` (simple 1D convolution, same as Puzzle 13)
 - Data type: `DType.float32`
-- Layout: `Layout.row_major(VECTOR_SIZE)` (1D row-major)
+- Layout: `row_major[VECTOR_SIZE]()` (1D row-major)
 
 ### The async copy opportunity
 
@@ -325,13 +325,13 @@ The async copy overlap solution demonstrates how to hide memory latency by overl
 ```mojo
 # Phase 1: Launch async copy for input tile
 input_tile = input.tile[CONV_TILE_SIZE](block_idx.x)
-comptime load_layout = Layout.row_major(THREADS_PER_BLOCK_ASYNC)
+comptime load_layout = row_major[THREADS_PER_BLOCK_ASYNC]()
 copy_dram_to_sram_async[thread_layout=load_layout](input_shared, input_tile)
 ```
 
-- **Tile Creation**: `input.tile[CONV_TILE_SIZE](block_idx.x)` creates a 256-element view of the input array starting at `block_idx.x * 256`. The Mojo [`tile` method](https://docs.modular.com/mojo/kernels/layout/layout_tensor/LayoutTensor/#tile) does **NOT** perform bounds checking or zero-padding. Accessing out-of-bounds indices results in undefined behavior. The implementation must ensure the tile size and offset remain within valid array bounds.
+- **Tile Creation**: `input.tile[CONV_TILE_SIZE](block_idx.x)` creates a 256-element view of the input array starting at `block_idx.x * 256`. The Mojo [`tile` method](https://docs.modular.com/mojo/kernels/layout/tile_tensor/TileTensor/#tile) does **NOT** perform bounds checking or zero-padding. Accessing out-of-bounds indices results in undefined behavior. The implementation must ensure the tile size and offset remain within valid array bounds.
 
-- **Thread Layout**: `Layout.row_major(THREADS_PER_BLOCK_ASYNC, 1)` creates a `256 x 1` layout that matches our block organization. This is **critical** - the layout must match the physical thread arrangement for optimal coalesced memory access. When layouts mismatch, threads may access non-contiguous memory addresses, breaking coalescing and severely degrading performance.
+- **Thread Layout**: `row_major[THREADS_PER_BLOCK_ASYNC, 1]()` creates a `256 x 1` layout that matches our block organization. This is **critical** - the layout must match the physical thread arrangement for optimal coalesced memory access. When layouts mismatch, threads may access non-contiguous memory addresses, breaking coalescing and severely degrading performance.
 
 - **Async Copy Launch**: `copy_dram_to_sram_async` initiates a background transfer from DRAM to shared memory. The hardware copies 256 floats (1KB) while the block continues executing.
 
@@ -410,7 +410,7 @@ Total Time = MAX(Input_Transfer_Time, Kernel_Transfer_Time) + Compute_Time
 
 #### **Key technical insights**
 
-1. **Thread Layout Matching**: The `Layout.row_major(256, 1)` layout precisely matches the block's `(256, 1)` thread organization, enabling optimal memory coalescing.
+1. **Thread Layout Matching**: The `row_major[256, 1]()` layout precisely matches the block's `(256, 1)` thread organization, enabling optimal memory coalescing.
 
 2. **Race Condition Avoidance**: Proper sequencing (async copy → kernel load → wait → barrier → compute) eliminates all race conditions that could corrupt shared memory.
 
diff --git a/book/src/puzzle_32/conflict_free_patterns.md b/book/src/puzzle_32/conflict_free_patterns.md
index dcda0edf..08cc5550 100644
--- a/book/src/puzzle_32/conflict_free_patterns.md
+++ b/book/src/puzzle_32/conflict_free_patterns.md
@@ -354,7 +354,7 @@ constant = shared[0]  # All threads read same address - hardware optimized
 **3. Padding techniques:**
 
 ```mojo
-shared = LayoutTensor[dtype, Layout.row_major(TPB + 1), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()  # Shift access patterns
+shared = stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[TPB + 1]())  # Shift access patterns
 ```
 
 **4. Access pattern analysis:**
diff --git a/book/src/puzzle_33/puzzle_33.md b/book/src/puzzle_33/puzzle_33.md
index f4abfe51..254c0b26 100644
--- a/book/src/puzzle_33/puzzle_33.md
+++ b/book/src/puzzle_33/puzzle_33.md
@@ -176,9 +176,9 @@ Your task is to complete the `tensor_core_matrix_multiplication` function. The s
 
 Layout configuration:
 
-- Input A: `Layout.row_major(SIZE, SIZE)`
-- Input B: `Layout.row_major(SIZE, SIZE)`
-- Output C: `Layout.row_major(SIZE, SIZE)`
+- Input A: `row_major[SIZE, SIZE]()`
+- Input B: `row_major[SIZE, SIZE]()`
+- Output C: `row_major[SIZE, SIZE]()`
 - Shared Memory: Block-sized tiles with async copy operations
 
 ## The challenge
diff --git a/book/src/puzzle_34/advanced_cluster_patterns.md b/book/src/puzzle_34/advanced_cluster_patterns.md
index 0e5ad190..a5b9cdcf 100644
--- a/book/src/puzzle_34/advanced_cluster_patterns.md
+++ b/book/src/puzzle_34/advanced_cluster_patterns.md
@@ -37,7 +37,7 @@ Real-world GPU algorithms often require **hierarchical coordination** where diff
 - **Warp Size**: `WARP_SIZE = 32` threads per warp (NVIDIA standard)
 - **Warps per Block**: `TPB / WARP_SIZE = 8` warps
 - **Data Type**: `DType.float32`
-- **Memory Layout**: Input `Layout.row_major(SIZE)`, Output `Layout.row_major(CLUSTER_SIZE)`
+- **Memory Layout**: Input `row_major[SIZE]()`, Output `row_major[CLUSTER_SIZE]()`
 
 **Processing Distribution:**
 
diff --git a/book/src/puzzle_34/cluster_collective_ops.md b/book/src/puzzle_34/cluster_collective_ops.md
index da6d0588..4e2965d5 100644
--- a/book/src/puzzle_34/cluster_collective_ops.md
+++ b/book/src/puzzle_34/cluster_collective_ops.md
@@ -40,8 +40,8 @@ Single blocks (as learned in [Puzzle 27](../puzzle_27/puzzle_27.md)) are limited
 - **Block Configuration**: `TPB = 256` threads per block `(256, 1)`
 - **Grid Configuration**: `CLUSTER_SIZE = 4` blocks per cluster `(4, 1)`
 - **Data Type**: `DType.float32`
-- **Memory Layout**: Input `Layout.row_major(SIZE)`, Output `Layout.row_major(1)`
-- **Temporary Storage**: `Layout.row_major(CLUSTER_SIZE)` for partial results
+- **Memory Layout**: Input `row_major[SIZE]()`, Output `row_major[1]()`
+- **Temporary Storage**: `row_major[CLUSTER_SIZE]()` for partial results
 
 **Expected Result**: Sum of sequence `0, 0.01, 0.02, ..., 10.23` = **523,776**
 
diff --git a/book/src/puzzle_34/cluster_coordination_basics.md b/book/src/puzzle_34/cluster_coordination_basics.md
index feac8b14..bbe99959 100644
--- a/book/src/puzzle_34/cluster_coordination_basics.md
+++ b/book/src/puzzle_34/cluster_coordination_basics.md
@@ -35,7 +35,7 @@ Traditional single-block algorithms like those in [Puzzle 27](../puzzle_27/puzzl
 - **Block Configuration**: `TPB = 256` threads per block `(256, 1)`
 - **Grid Configuration**: `CLUSTER_SIZE = 4` blocks per cluster `(4, 1)`
 - **Data Type**: `DType.float32`
-- **Memory Layout**: Input `Layout.row_major(SIZE)`, Output `Layout.row_major(CLUSTER_SIZE)`
+- **Memory Layout**: Input `row_major[SIZE]()`, Output `row_major[CLUSTER_SIZE]()`
 
 **Thread Block Distribution:**
 
@@ -65,7 +65,7 @@ Traditional single-block algorithms like those in [Puzzle 27](../puzzle_27/puzzl
 
 ### **Shared memory coordination**
 
-- Allocate shared memory using `LayoutTensor[dtype, Layout.row_major(tpb), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()` (see [shared memory basics from Puzzle 8](../puzzle_08/puzzle_08.md))
+- Allocate shared memory using `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[tpb]())` (see [shared memory basics from Puzzle 8](../puzzle_08/puzzle_08.md))
 - Process input data scaled by `block_id + 1` to create distinct scaling per block
 - Use bounds checking when accessing input data (pattern from [guards in Puzzle 3](../puzzle_03/puzzle_03.md))
 
@@ -153,7 +153,7 @@ block_id = Int(block_idx.x)                          # Block index for reliable
 
 **Shared memory allocation and data processing:**
 
-- Each block allocates its own shared memory workspace: `LayoutTensor[dtype, Layout.row_major(tpb), MutAnyOrigin, address_space = AddressSpace.SHARED].stack_allocation()`
+- Each block allocates its own shared memory workspace: `stack_allocation[dtype=dtype, address_space=AddressSpace.SHARED](row_major[tpb]())`
 - **Scaling strategy**: `data_scale = Float32(block_id + 1)` ensures each block processes data differently
   - Block 0: multiplies by 1.0, Block 1: by 2.0, Block 2: by 3.0, Block 3: by 4.0
 - **Bounds checking**: `if global_i < size:` prevents out-of-bounds memory access
diff --git a/pixi.toml b/pixi.toml
index c886bba0..90cd7c4f 100644
--- a/pixi.toml
+++ b/pixi.toml
@@ -83,24 +83,21 @@ p03 = "mojo problems/p03/p03.mojo"
 viz03 = "cd book/src/puzzle_03 && python puzzle_03_viz.py"
 
 p04 = "mojo problems/p04/p04.mojo"
-p04_layout_tensor = "mojo problems/p04/p04_layout_tensor.mojo"
+p04_tile_tensor = "mojo problems/p04/p04_tile_tensor.mojo"
 viz04 = "cd book/src/puzzle_04 && python puzzle_04_viz.py"
 thread_indexing = "cd book/src/puzzle_04 && python thread_indexing_viz.py"
-layout_tensor_intro = "mojo book/src/puzzle_04/intro.mojo"
+tile_tensor_intro = "mojo book/src/puzzle_04/intro.mojo"
 
 p05 = "mojo problems/p05/p05.mojo"
-p05_layout_tensor = "mojo problems/p05/p05_layout_tensor.mojo"
 viz05 = "cd book/src/puzzle_05 && python puzzle_05_viz.py"
 
 p06 = "mojo problems/p06/p06.mojo"
 viz06 = "cd book/src/puzzle_06 && python puzzle_06_viz.py"
 
 p07 = "mojo problems/p07/p07.mojo"
-p07_layout_tensor = "mojo problems/p07/p07_layout_tensor.mojo"
 viz07 = "cd book/src/puzzle_07 && python puzzle_07_viz.py"
 
 p08 = "mojo problems/p08/p08.mojo"
-p08_layout_tensor = "mojo problems/p08/p08_layout_tensor.mojo"
 viz08 = "cd book/src/puzzle_08 && python puzzle_08_viz.py"
 
 p09 = "mojo problems/p09/p09.mojo"
@@ -108,11 +105,9 @@ p09 = "mojo problems/p09/p09.mojo"
 p10 = "mojo problems/p10/p10.mojo"
 
 p11 = "mojo problems/p11/p11.mojo"
-p11_layout_tensor = "mojo problems/p11/p11_layout_tensor.mojo"
 viz11 = "cd book/src/puzzle_11 && python puzzle_11_viz.py"
 
 p12 = "mojo problems/p12/p12.mojo"
-p12_layout_tensor = "mojo problems/p12/p12_layout_tensor.mojo"
 viz12 = "cd book/src/puzzle_12 && python puzzle_12_viz.py"
 
 p13 = "mojo problems/p13/p13.mojo"
diff --git a/problems/p04/p04_layout_tensor.mojo b/problems/p04/p04_tile_tensor.mojo
similarity index 72%
rename from problems/p04/p04_layout_tensor.mojo
rename to problems/p04/p04_tile_tensor.mojo
index ad8aff51..f4f963f0 100644
--- a/problems/p04/p04_layout_tensor.mojo
+++ b/problems/p04/p04_tile_tensor.mojo
@@ -1,19 +1,21 @@
 from std.gpu import thread_idx
 from std.gpu.host import DeviceContext
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
 from std.testing import assert_equal
 
-# ANCHOR: add_10_2d_layout_tensor
+# ANCHOR: add_10_2d_tile_tensor
 comptime SIZE = 2
 comptime BLOCKS_PER_GRID = 1
 comptime THREADS_PER_BLOCK = (3, 3)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE, SIZE)
+comptime layout = row_major[SIZE, SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 def add_10_2d(
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
     size: Int,
 ):
     var row = thread_idx.y
@@ -21,15 +23,15 @@ def add_10_2d(
     # FILL ME IN (roughly 2 lines)
 
 
-# ANCHOR_END: add_10_2d_layout_tensor
+# ANCHOR_END: add_10_2d_tile_tensor
 
 
 def main() raises:
     with DeviceContext() as ctx:
         var out_buf = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
         out_buf.enqueue_fill(0)
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out_buf)
-        print("out shape:", out_tensor.shape[0](), "x", out_tensor.shape[1]())
+        var out_tensor = TileTensor(out_buf, layout)
+        print("out shape:", out_tensor.dim[0](), "x", out_tensor.dim[1]())
 
         var expected = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
         expected.enqueue_fill(0)
@@ -41,7 +43,7 @@ def main() raises:
                 a_host[i] = Scalar[dtype](i)
                 expected[i] = a_host[i] + 10
 
-        var a_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](a)
+        var a_tensor = TileTensor(a, layout)
 
         ctx.enqueue_function[add_10_2d, add_10_2d](
             out_tensor,
diff --git a/problems/p05/p05.mojo b/problems/p05/p05.mojo
index 8dc43341..335f6feb 100644
--- a/problems/p05/p05.mojo
+++ b/problems/p05/p05.mojo
@@ -1,6 +1,7 @@
-from std.memory import UnsafePointer
 from std.gpu import thread_idx
 from std.gpu.host import DeviceContext
+from layout import TileTensor
+from layout.tile_layout import row_major
 from std.testing import assert_equal
 
 # ANCHOR: broadcast_add
@@ -8,12 +9,18 @@ comptime SIZE = 2
 comptime BLOCKS_PER_GRID = 1
 comptime THREADS_PER_BLOCK = (3, 3)
 comptime dtype = DType.float32
+comptime out_layout = row_major[SIZE, SIZE]()
+comptime a_layout = row_major[1, SIZE]()
+comptime b_layout = row_major[SIZE, 1]()
+comptime OutLayout = type_of(out_layout)
+comptime ALayout = type_of(a_layout)
+comptime BLayout = type_of(b_layout)
 
 
 def broadcast_add(
-    output: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    a: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    b: UnsafePointer[Scalar[dtype], MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, ALayout, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, BLayout, ImmutAnyOrigin],
     size: Int,
 ):
     var row = thread_idx.y
@@ -24,10 +31,15 @@ def broadcast_add(
 # ANCHOR_END: broadcast_add
 def main() raises:
     with DeviceContext() as ctx:
-        var out = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
-        out.enqueue_fill(0)
-        var expected = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
-        expected.enqueue_fill(0)
+        var out_buf = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
+        out_buf.enqueue_fill(0)
+        var out_tensor = TileTensor(out_buf, out_layout)
+        print("out shape:", out_tensor.dim[0](), "x", out_tensor.dim[1]())
+
+        var expected_buf = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
+        expected_buf.enqueue_fill(0)
+        var expected_tensor = TileTensor(expected_buf, out_layout)
+
         var a = ctx.enqueue_create_buffer[dtype](SIZE)
         a.enqueue_fill(0)
         var b = ctx.enqueue_create_buffer[dtype](SIZE)
@@ -39,12 +51,15 @@ def main() raises:
 
             for i in range(SIZE):
                 for j in range(SIZE):
-                    expected[i * SIZE + j] = a_host[j] + b_host[i]
+                    expected_tensor[i, j] = a_host[j] + b_host[i]
+
+        var a_tensor = TileTensor[mut=False, dtype, ALayout](a, a_layout)
+        var b_tensor = TileTensor[mut=False, dtype, BLayout](b, b_layout)
 
         ctx.enqueue_function[broadcast_add, broadcast_add](
-            out,
-            a,
-            b,
+            out_tensor,
+            a_tensor,
+            b_tensor,
             SIZE,
             grid_dim=BLOCKS_PER_GRID,
             block_dim=THREADS_PER_BLOCK,
@@ -52,10 +67,12 @@ def main() raises:
 
         ctx.synchronize()
 
-        with out.map_to_host() as out_host:
-            print("out:", out_host)
-            print("expected:", expected)
+        with out_buf.map_to_host() as out_buf_host:
+            print("out:", out_buf_host)
+            print("expected:", expected_buf)
             for i in range(SIZE):
                 for j in range(SIZE):
-                    assert_equal(out_host[i * SIZE + j], expected[i * SIZE + j])
+                    assert_equal(
+                        out_buf_host[i * SIZE + j], expected_buf[i * SIZE + j]
+                    )
             print("Puzzle 05 complete ✅")
diff --git a/problems/p05/p05_layout_tensor.mojo b/problems/p05/p05_layout_tensor.mojo
deleted file mode 100644
index 1e65f5a0..00000000
--- a/problems/p05/p05_layout_tensor.mojo
+++ /dev/null
@@ -1,81 +0,0 @@
-from std.gpu import thread_idx
-from std.gpu.host import DeviceContext
-from layout import Layout, LayoutTensor
-from std.testing import assert_equal
-
-# ANCHOR: broadcast_add_layout_tensor
-comptime SIZE = 2
-comptime BLOCKS_PER_GRID = 1
-comptime THREADS_PER_BLOCK = (3, 3)
-comptime dtype = DType.float32
-comptime out_layout = Layout.row_major(SIZE, SIZE)
-comptime a_layout = Layout.row_major(1, SIZE)
-comptime b_layout = Layout.row_major(SIZE, 1)
-
-
-def broadcast_add[
-    out_layout: Layout,
-    a_layout: Layout,
-    b_layout: Layout,
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, a_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, b_layout, ImmutAnyOrigin],
-    size: Int,
-):
-    var row = thread_idx.y
-    var col = thread_idx.x
-    # FILL ME IN (roughly 2 lines)
-
-
-# ANCHOR_END: broadcast_add_layout_tensor
-def main() raises:
-    with DeviceContext() as ctx:
-        var out_buf = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
-        out_buf.enqueue_fill(0)
-        var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out_buf)
-        print("out shape:", out_tensor.shape[0](), "x", out_tensor.shape[1]())
-
-        var expected_buf = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
-        expected_buf.enqueue_fill(0)
-        var expected_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](
-            expected_buf
-        )
-
-        var a = ctx.enqueue_create_buffer[dtype](SIZE)
-        a.enqueue_fill(0)
-        var b = ctx.enqueue_create_buffer[dtype](SIZE)
-        b.enqueue_fill(0)
-        with a.map_to_host() as a_host, b.map_to_host() as b_host:
-            for i in range(SIZE):
-                a_host[i] = Scalar[dtype](i + 1)
-                b_host[i] = Scalar[dtype](i * 10)
-
-            for i in range(SIZE):
-                for j in range(SIZE):
-                    expected_tensor[i, j] = a_host[j] + b_host[i]
-
-        var a_tensor = LayoutTensor[dtype, a_layout, ImmutAnyOrigin](a)
-        var b_tensor = LayoutTensor[dtype, b_layout, ImmutAnyOrigin](b)
-
-        comptime kernel = broadcast_add[out_layout, a_layout, b_layout]
-        ctx.enqueue_function[kernel, kernel](
-            out_tensor,
-            a_tensor,
-            b_tensor,
-            SIZE,
-            grid_dim=BLOCKS_PER_GRID,
-            block_dim=THREADS_PER_BLOCK,
-        )
-
-        ctx.synchronize()
-
-        with out_buf.map_to_host() as out_buf_host:
-            print("out:", out_buf_host)
-            print("expected:", expected_buf)
-            for i in range(SIZE):
-                for j in range(SIZE):
-                    assert_equal(
-                        out_buf_host[i * SIZE + j], expected_buf[i * SIZE + j]
-                    )
-            print("Puzzle 05 complete ✅")
diff --git a/problems/p07/p07.mojo b/problems/p07/p07.mojo
index f6eaa3bb..51e2de6a 100644
--- a/problems/p07/p07.mojo
+++ b/problems/p07/p07.mojo
@@ -1,6 +1,7 @@
-from std.memory import UnsafePointer
 from std.gpu import thread_idx, block_idx, block_dim
 from std.gpu.host import DeviceContext
+from layout import TileTensor
+from layout.tile_layout import row_major
 from std.testing import assert_equal
 
 # ANCHOR: add_10_blocks_2d
@@ -8,11 +9,15 @@ comptime SIZE = 5
 comptime BLOCKS_PER_GRID = (2, 2)
 comptime THREADS_PER_BLOCK = (3, 3)
 comptime dtype = DType.float32
+comptime out_layout = row_major[SIZE, SIZE]()
+comptime a_layout = row_major[SIZE, SIZE]()
+comptime OutLayout = type_of(out_layout)
+comptime ALayout = type_of(a_layout)
 
 
 def add_10_blocks_2d(
-    output: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    a: UnsafePointer[Scalar[dtype], MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, ALayout, ImmutAnyOrigin],
     size: Int,
 ):
     var row = block_dim.y * block_idx.y + thread_idx.y
@@ -25,10 +30,13 @@ def add_10_blocks_2d(
 
 def main() raises:
     with DeviceContext() as ctx:
-        var out = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
-        out.enqueue_fill(0)
-        var expected = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
-        expected.enqueue_fill(1)
+        var out_buf = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
+        out_buf.enqueue_fill(0)
+        var out_tensor = TileTensor(out_buf, out_layout)
+
+        var expected_buf = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
+        expected_buf.enqueue_fill(1)
+
         var a = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
         a.enqueue_fill(1)
 
@@ -37,11 +45,13 @@ def main() raises:
                 for i in range(SIZE):
                     var k = j * SIZE + i
                     a_host[k] = Scalar[dtype](k)
-                    expected[k] = Scalar[dtype](k + 10)
+                    expected_buf[k] = Scalar[dtype](k + 10)
+
+        var a_tensor = TileTensor[mut=False, dtype, ALayout](a, a_layout)
 
         ctx.enqueue_function[add_10_blocks_2d, add_10_blocks_2d](
-            out,
-            a,
+            out_tensor,
+            a_tensor,
             SIZE,
             grid_dim=BLOCKS_PER_GRID,
             block_dim=THREADS_PER_BLOCK,
@@ -49,10 +59,17 @@ def main() raises:
 
         ctx.synchronize()
 
-        with out.map_to_host() as out_host:
-            print("out:", out_host)
-            print("expected:", expected)
+        var expected_tensor = TileTensor(expected_buf, out_layout)
+
+        with out_buf.map_to_host() as out_buf_host:
+            print(
+                "out:",
+                TileTensor(out_buf_host, out_layout),
+            )
+            print("expected:", expected_tensor)
             for i in range(SIZE):
                 for j in range(SIZE):
-                    assert_equal(out_host[i * SIZE + j], expected[i * SIZE + j])
+                    assert_equal(
+                        out_buf_host[i * SIZE + j], expected_buf[i * SIZE + j]
+                    )
             print("Puzzle 07 complete ✅")
diff --git a/problems/p07/p07_layout_tensor.mojo b/problems/p07/p07_layout_tensor.mojo
deleted file mode 100644
index 604ac552..00000000
--- a/problems/p07/p07_layout_tensor.mojo
+++ /dev/null
@@ -1,78 +0,0 @@
-from std.gpu import thread_idx, block_idx, block_dim
-from std.gpu.host import DeviceContext
-from layout import Layout, LayoutTensor
-from std.testing import assert_equal
-
-# ANCHOR: add_10_blocks_2d_layout_tensor
-comptime SIZE = 5
-comptime BLOCKS_PER_GRID = (2, 2)
-comptime THREADS_PER_BLOCK = (3, 3)
-comptime dtype = DType.float32
-comptime out_layout = Layout.row_major(SIZE, SIZE)
-comptime a_layout = Layout.row_major(SIZE, SIZE)
-
-
-def add_10_blocks_2d[
-    out_layout: Layout,
-    a_layout: Layout,
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, a_layout, ImmutAnyOrigin],
-    size: Int,
-):
-    var row = block_dim.y * block_idx.y + thread_idx.y
-    var col = block_dim.x * block_idx.x + thread_idx.x
-    # FILL ME IN (roughly 2 lines)
-
-
-# ANCHOR_END: add_10_blocks_2d_layout_tensor
-
-
-def main() raises:
-    with DeviceContext() as ctx:
-        var out_buf = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
-        out_buf.enqueue_fill(0)
-        var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out_buf)
-
-        var expected_buf = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
-        expected_buf.enqueue_fill(1)
-
-        var a = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
-        a.enqueue_fill(1)
-
-        with a.map_to_host() as a_host:
-            for j in range(SIZE):
-                for i in range(SIZE):
-                    var k = j * SIZE + i
-                    a_host[k] = Scalar[dtype](k)
-                    expected_buf[k] = Scalar[dtype](k + 10)
-
-        var a_tensor = LayoutTensor[dtype, a_layout, ImmutAnyOrigin](a)
-
-        comptime kernel = add_10_blocks_2d[out_layout, a_layout]
-        ctx.enqueue_function[kernel, kernel](
-            out_tensor,
-            a_tensor,
-            SIZE,
-            grid_dim=BLOCKS_PER_GRID,
-            block_dim=THREADS_PER_BLOCK,
-        )
-
-        ctx.synchronize()
-
-        var expected_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](
-            expected_buf
-        )
-
-        with out_buf.map_to_host() as out_buf_host:
-            print(
-                "out:",
-                LayoutTensor[dtype, out_layout, MutAnyOrigin](out_buf_host),
-            )
-            print("expected:", expected_tensor)
-            for i in range(SIZE):
-                for j in range(SIZE):
-                    assert_equal(
-                        out_buf_host[i * SIZE + j], expected_buf[i * SIZE + j]
-                    )
-            print("Puzzle 07 complete ✅")
diff --git a/problems/p08/p08.mojo b/problems/p08/p08.mojo
index 2f994b19..b89c6fc2 100644
--- a/problems/p08/p08.mojo
+++ b/problems/p08/p08.mojo
@@ -1,7 +1,9 @@
-from std.memory import UnsafePointer, stack_allocation
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.testing import assert_equal
 
 # ANCHOR: add_10_shared
@@ -10,26 +12,26 @@ comptime SIZE = 8
 comptime BLOCKS_PER_GRID = (2, 1)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 def add_10_shared(
-    output: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    a: UnsafePointer[Scalar[dtype], MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
+    # Allocate shared memory using stack_allocation
     var shared = stack_allocation[
-        TPB,
-        Scalar[dtype],
-        address_space=AddressSpace.SHARED,
-    ]()
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
+
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
-    # Load local data into shared memory
+
     if global_i < size:
         shared[local_i] = a[global_i]
 
-    # wait for all threads to complete
-    # works within a thread block
     barrier()
 
     # FILL ME IN (roughly 2 lines)
@@ -44,9 +46,13 @@ def main() raises:
         out.enqueue_fill(0)
         var a = ctx.enqueue_create_buffer[dtype](SIZE)
         a.enqueue_fill(1)
+
+        var out_tensor = TileTensor(out, layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+
         ctx.enqueue_function[add_10_shared, add_10_shared](
-            out,
-            a,
+            out_tensor,
+            a_tensor,
             SIZE,
             grid_dim=BLOCKS_PER_GRID,
             block_dim=THREADS_PER_BLOCK,
@@ -54,7 +60,6 @@ def main() raises:
 
         var expected = ctx.enqueue_create_host_buffer[dtype](SIZE)
         expected.enqueue_fill(11)
-
         ctx.synchronize()
 
         with out.map_to_host() as out_host:
diff --git a/problems/p08/p08_layout_tensor.mojo b/problems/p08/p08_layout_tensor.mojo
deleted file mode 100644
index 4856d2c3..00000000
--- a/problems/p08/p08_layout_tensor.mojo
+++ /dev/null
@@ -1,73 +0,0 @@
-from std.gpu import thread_idx, block_idx, block_dim, barrier
-from std.gpu.host import DeviceContext
-from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
-from std.testing import assert_equal
-
-# ANCHOR: add_10_shared_layout_tensor
-comptime TPB = 4
-comptime SIZE = 8
-comptime BLOCKS_PER_GRID = (2, 1)
-comptime THREADS_PER_BLOCK = (TPB, 1)
-comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
-
-
-def add_10_shared_layout_tensor[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    size: Int,
-):
-    # Allocate shared memory using LayoutTensor with explicit address_space
-    var shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-
-    var global_i = block_dim.x * block_idx.x + thread_idx.x
-    var local_i = thread_idx.x
-
-    if global_i < size:
-        shared[local_i] = a[global_i]
-
-    barrier()
-
-    # FILL ME IN (roughly 2 lines)
-
-
-# ANCHOR_END: add_10_shared_layout_tensor
-
-
-def main() raises:
-    with DeviceContext() as ctx:
-        var out = ctx.enqueue_create_buffer[dtype](SIZE)
-        out.enqueue_fill(0)
-        var a = ctx.enqueue_create_buffer[dtype](SIZE)
-        a.enqueue_fill(1)
-
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-
-        comptime kernel = add_10_shared_layout_tensor[layout]
-        ctx.enqueue_function[kernel, kernel](
-            out_tensor,
-            a_tensor,
-            SIZE,
-            grid_dim=BLOCKS_PER_GRID,
-            block_dim=THREADS_PER_BLOCK,
-        )
-
-        var expected = ctx.enqueue_create_host_buffer[dtype](SIZE)
-        expected.enqueue_fill(11)
-        ctx.synchronize()
-
-        with out.map_to_host() as out_host:
-            print("out:", out_host)
-            print("expected:", expected)
-            for i in range(SIZE):
-                assert_equal(out_host[i], expected[i])
-            print("Puzzle 08 complete ✅")
diff --git a/problems/p09/p09.mojo b/problems/p09/p09.mojo
index 3455c9f0..38467f2c 100644
--- a/problems/p09/p09.mojo
+++ b/problems/p09/p09.mojo
@@ -2,7 +2,9 @@ from std.memory import UnsafePointer
 from std.gpu import thread_idx, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.testing import assert_equal
 from std.sys import argv
 
@@ -11,7 +13,8 @@ comptime MATRIX_SIZE = 3
 comptime BLOCKS_PER_GRID = 1
 comptime THREADS_PER_BLOCK = SIZE
 comptime dtype = DType.float32
-comptime vector_layout = Layout.row_major(SIZE)
+comptime vector_layout = row_major[SIZE]()
+comptime VectorLayout = type_of(vector_layout)
 comptime ITER = 2
 
 
@@ -29,8 +32,8 @@ def add_10(
 
 # ANCHOR: second_crash
 def process_sliding_window(
-    output: LayoutTensor[dtype, vector_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, vector_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, VectorLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, VectorLayout, ImmutAnyOrigin],
 ):
     var thread_id = thread_idx.x
 
@@ -52,18 +55,15 @@ def process_sliding_window(
 
 # ANCHOR: third_crash
 def collaborative_filter(
-    output: LayoutTensor[dtype, vector_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, vector_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, VectorLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, VectorLayout, ImmutAnyOrigin],
 ):
     var thread_id = thread_idx.x
 
     # Shared memory workspace for collaborative processing
-    var shared_workspace = LayoutTensor[
-        dtype,
-        Layout.row_major(SIZE - 1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_workspace = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[SIZE - 1]())
 
     # Phase 1: Initialize shared workspace (all threads participate)
     if thread_id < SIZE - 1:
@@ -139,13 +139,11 @@ def main() raises:
                 for i in range(SIZE):
                     input_host[i] = Scalar[dtype](i)
 
-            # Create LayoutTensors for structured access
-            input_tensor = LayoutTensor[dtype, vector_layout, ImmutAnyOrigin](
-                input_buf
-            )
-            output_tensor = LayoutTensor[dtype, vector_layout, MutAnyOrigin](
-                output_buf
+            # Create TileTensors for structured access
+            input_tensor = TileTensor[mut=False, dtype, VectorLayout](
+                input_buf, vector_layout
             )
+            output_tensor = TileTensor(output_buf, vector_layout)
 
             print("Input array: [0, 1, 2, 3]")
             print("Computing sliding window sums (window size = 3)...")
@@ -216,13 +214,11 @@ def main() raises:
                 for i in range(SIZE):
                     input_host[i] = Scalar[dtype](i + 1)
 
-            # Create LayoutTensors
-            input_tensor = LayoutTensor[dtype, vector_layout, ImmutAnyOrigin](
-                input_buf
-            )
-            output_tensor = LayoutTensor[dtype, vector_layout, MutAnyOrigin](
-                output_buf
+            # Create TileTensors
+            input_tensor = TileTensor[mut=False, dtype, VectorLayout](
+                input_buf, vector_layout
             )
+            output_tensor = TileTensor(output_buf, vector_layout)
 
             print("Input array: [1, 2, 3, 4]")
             print("Applying collaborative filter using shared memory...")
diff --git a/problems/p10/p10.mojo b/problems/p10/p10.mojo
index d64fd3b4..e42e37e0 100644
--- a/problems/p10/p10.mojo
+++ b/problems/p10/p10.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_dim, block_idx, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.testing import assert_equal
 from std.sys import argv
 
@@ -11,23 +13,21 @@ comptime SIZE = 2
 comptime BLOCKS_PER_GRID = 1
 comptime THREADS_PER_BLOCK = (3, 3)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE, SIZE)
+comptime layout = row_major[SIZE, SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 def shared_memory_race(
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     var row = thread_idx.y
     var col = thread_idx.x
 
-    var shared_sum = LayoutTensor[
-        dtype,
-        Layout.row_major(1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_sum = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[1]())
 
     if row < size and col < size:
         shared_sum[0] += a[row, col]
@@ -43,8 +43,8 @@ def shared_memory_race(
 
 # ANCHOR: add_10_2d_no_guard
 def add_10_2d(
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     var row = thread_idx.y
@@ -68,10 +68,8 @@ def main() raises:
     with DeviceContext() as ctx:
         var out_buf = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
         out_buf.enqueue_fill(0)
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            out_buf
-        ).reshape[layout]()
-        print("out shape:", out_tensor.shape[0](), "x", out_tensor.shape[1]())
+        var out_tensor = TileTensor(out_buf, layout)
+        print("out shape:", out_tensor.dim[0](), "x", out_tensor.dim[1]())
         var expected = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
         expected.enqueue_fill(0)
 
@@ -81,9 +79,7 @@ def main() raises:
             for i in range(SIZE * SIZE):
                 a_host[i] = Scalar[dtype](i)
 
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a).reshape[
-            layout
-        ]()
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
 
         if flag == "--memory-bug":
             print("Running memory bug example (bounds checking issue)...")
diff --git a/problems/p11/p11.mojo b/problems/p11/p11.mojo
index 06b82580..c6ed142f 100644
--- a/problems/p11/p11.mojo
+++ b/problems/p11/p11.mojo
@@ -1,7 +1,9 @@
-from std.memory import UnsafePointer, stack_allocation
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.testing import assert_equal
 
 # ANCHOR: pooling
@@ -10,21 +12,23 @@ comptime SIZE = 8
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 def pooling(
-    output: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    a: UnsafePointer[Scalar[dtype], MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
+    # Allocate shared memory using stack_allocation
     var shared = stack_allocation[
-        TPB,
-        Scalar[dtype],
-        address_space=AddressSpace.SHARED,
-    ]()
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
+
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
-    # FILL ME IN (roughly 10 lines)
+    # FIX ME IN (roughly 10 lines)
 
 
 # ANCHOR_END: pooling
@@ -36,13 +40,17 @@ def main() raises:
         out.enqueue_fill(0)
         var a = ctx.enqueue_create_buffer[dtype](SIZE)
         a.enqueue_fill(0)
+
         with a.map_to_host() as a_host:
             for i in range(SIZE):
                 a_host[i] = Scalar[dtype](i)
 
+        var out_tensor = TileTensor(out, layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+
         ctx.enqueue_function[pooling, pooling](
-            out,
-            a,
+            out_tensor,
+            a_tensor,
             SIZE,
             grid_dim=BLOCKS_PER_GRID,
             block_dim=THREADS_PER_BLOCK,
@@ -50,7 +58,6 @@ def main() raises:
 
         var expected = ctx.enqueue_create_host_buffer[dtype](SIZE)
         expected.enqueue_fill(0)
-
         ctx.synchronize()
 
         with a.map_to_host() as a_host:
@@ -59,7 +66,6 @@ def main() raises:
                 var s = Scalar[dtype](0)
                 for j in range(max(i - 2, 0), i + 1):
                     s += ptr[j]
-
                 expected[i] = s
 
         with out.map_to_host() as out_host:
diff --git a/problems/p11/p11_layout_tensor.mojo b/problems/p11/p11_layout_tensor.mojo
deleted file mode 100644
index f7e293f1..00000000
--- a/problems/p11/p11_layout_tensor.mojo
+++ /dev/null
@@ -1,78 +0,0 @@
-from std.gpu import thread_idx, block_idx, block_dim, barrier
-from std.gpu.host import DeviceContext
-from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
-from std.testing import assert_equal
-
-# ANCHOR: pooling_layout_tensor
-comptime TPB = 8
-comptime SIZE = 8
-comptime BLOCKS_PER_GRID = (1, 1)
-comptime THREADS_PER_BLOCK = (TPB, 1)
-comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
-
-
-def pooling[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    size: Int,
-):
-    # Allocate shared memory using tensor builder
-    var shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-
-    var global_i = block_dim.x * block_idx.x + thread_idx.x
-    var local_i = thread_idx.x
-    # FIX ME IN (roughly 10 lines)
-
-
-# ANCHOR_END: pooling_layout_tensor
-
-
-def main() raises:
-    with DeviceContext() as ctx:
-        var out = ctx.enqueue_create_buffer[dtype](SIZE)
-        out.enqueue_fill(0)
-        var a = ctx.enqueue_create_buffer[dtype](SIZE)
-        a.enqueue_fill(0)
-
-        with a.map_to_host() as a_host:
-            for i in range(SIZE):
-                a_host[i] = Scalar[dtype](i)
-
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-
-        ctx.enqueue_function[pooling[layout], pooling[layout]](
-            out_tensor,
-            a_tensor,
-            SIZE,
-            grid_dim=BLOCKS_PER_GRID,
-            block_dim=THREADS_PER_BLOCK,
-        )
-
-        var expected = ctx.enqueue_create_host_buffer[dtype](SIZE)
-        expected.enqueue_fill(0)
-        ctx.synchronize()
-
-        with a.map_to_host() as a_host:
-            var ptr = a_host
-            for i in range(SIZE):
-                var s = Scalar[dtype](0)
-                for j in range(max(i - 2, 0), i + 1):
-                    s += ptr[j]
-                expected[i] = s
-
-        with out.map_to_host() as out_host:
-            print("out:", out_host)
-            print("expected:", expected)
-            for i in range(SIZE):
-                assert_equal(out_host[i], expected[i])
-            print("Puzzle 11 complete ✅")
diff --git a/problems/p12/p12.mojo b/problems/p12/p12.mojo
index 4b2e1153..bdd36908 100644
--- a/problems/p12/p12.mojo
+++ b/problems/p12/p12.mojo
@@ -1,21 +1,29 @@
-from std.memory import UnsafePointer, stack_allocation
-from std.gpu import thread_idx, block_idx, block_dim, barrier
-from std.gpu.host import DeviceContext
-from std.gpu.memory import AddressSpace
 from std.testing import assert_equal
+from std.gpu.host import DeviceContext
 
 # ANCHOR: dot_product
+from std.gpu import thread_idx, block_idx, block_dim, barrier
+from std.gpu.memory import AddressSpace
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
+
+
 comptime TPB = 8
 comptime SIZE = 8
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
+comptime layout = row_major[SIZE]()
+comptime out_layout = row_major[1]()
+comptime LayoutType = type_of(layout)
+comptime OutLayout = type_of(out_layout)
 
 
 def dot_product(
-    output: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    a: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    b: UnsafePointer[Scalar[dtype], MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     # FILL ME IN (roughly 13 lines)
@@ -33,15 +41,20 @@ def main() raises:
         a.enqueue_fill(0)
         var b = ctx.enqueue_create_buffer[dtype](SIZE)
         b.enqueue_fill(0)
+
         with a.map_to_host() as a_host, b.map_to_host() as b_host:
             for i in range(SIZE):
                 a_host[i] = Scalar[dtype](i)
                 b_host[i] = Scalar[dtype](i)
 
+        var out_tensor = TileTensor(out, out_layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+        var b_tensor = TileTensor[mut=False, dtype, LayoutType](b, layout)
+
         ctx.enqueue_function[dot_product, dot_product](
-            out,
-            a,
-            b,
+            out_tensor,
+            a_tensor,
+            b_tensor,
             SIZE,
             grid_dim=BLOCKS_PER_GRID,
             block_dim=THREADS_PER_BLOCK,
@@ -49,7 +62,6 @@ def main() raises:
 
         var expected = ctx.enqueue_create_host_buffer[dtype](1)
         expected.enqueue_fill(0)
-
         ctx.synchronize()
 
         with a.map_to_host() as a_host, b.map_to_host() as b_host:
diff --git a/problems/p12/p12_layout_tensor.mojo b/problems/p12/p12_layout_tensor.mojo
deleted file mode 100644
index 691730cf..00000000
--- a/problems/p12/p12_layout_tensor.mojo
+++ /dev/null
@@ -1,74 +0,0 @@
-from std.testing import assert_equal
-from std.gpu.host import DeviceContext
-
-# ANCHOR: dot_product_layout_tensor
-from std.gpu import thread_idx, block_idx, block_dim, barrier
-from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
-
-
-comptime TPB = 8
-comptime SIZE = 8
-comptime BLOCKS_PER_GRID = (1, 1)
-comptime THREADS_PER_BLOCK = (TPB, 1)
-comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
-comptime out_layout = Layout.row_major(1)
-
-
-def dot_product[
-    in_layout: Layout, out_layout: Layout
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    size: Int,
-):
-    # FILL ME IN (roughly 13 lines)
-    ...
-
-
-# ANCHOR_END: dot_product_layout_tensor
-
-
-def main() raises:
-    with DeviceContext() as ctx:
-        var out = ctx.enqueue_create_buffer[dtype](1)
-        out.enqueue_fill(0)
-        var a = ctx.enqueue_create_buffer[dtype](SIZE)
-        a.enqueue_fill(0)
-        var b = ctx.enqueue_create_buffer[dtype](SIZE)
-        b.enqueue_fill(0)
-
-        with a.map_to_host() as a_host, b.map_to_host() as b_host:
-            for i in range(SIZE):
-                a_host[i] = Scalar[dtype](i)
-                b_host[i] = Scalar[dtype](i)
-
-        var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-        var b_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](b)
-
-        comptime kernel = dot_product[layout, out_layout]
-        ctx.enqueue_function[kernel, kernel](
-            out_tensor,
-            a_tensor,
-            b_tensor,
-            SIZE,
-            grid_dim=BLOCKS_PER_GRID,
-            block_dim=THREADS_PER_BLOCK,
-        )
-
-        var expected = ctx.enqueue_create_host_buffer[dtype](1)
-        expected.enqueue_fill(0)
-        ctx.synchronize()
-
-        with a.map_to_host() as a_host, b.map_to_host() as b_host:
-            for i in range(SIZE):
-                expected[0] += a_host[i] * b_host[i]
-
-        with out.map_to_host() as out_host:
-            print("out:", out_host)
-            print("expected:", expected)
-            assert_equal(out_host[0], expected[0])
-            print("Puzzle 12 complete ✅")
diff --git a/problems/p13/p13.mojo b/problems/p13/p13.mojo
index 1da7b0b0..2430bc85 100644
--- a/problems/p13/p13.mojo
+++ b/problems/p13/p13.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.sys import argv
 from std.testing import assert_equal
 
@@ -12,17 +14,18 @@ comptime CONV = 3
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
-comptime in_layout = Layout.row_major(SIZE)
-comptime out_layout = Layout.row_major(SIZE)
-comptime conv_layout = Layout.row_major(CONV)
-
-
-def conv_1d_simple[
-    in_layout: Layout, out_layout: Layout, conv_layout: Layout
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, conv_layout, ImmutAnyOrigin],
+comptime in_layout = row_major[SIZE]()
+comptime InLayout = type_of(in_layout)
+comptime out_layout = row_major[SIZE]()
+comptime OutLayout = type_of(out_layout)
+comptime conv_layout = row_major[CONV]()
+comptime ConvLayout = type_of(conv_layout)
+
+
+def conv_1d_simple(
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, ConvLayout, ImmutAnyOrigin],
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
@@ -36,17 +39,18 @@ comptime SIZE_2 = 15
 comptime CONV_2 = 4
 comptime BLOCKS_PER_GRID_2 = (2, 1)
 comptime THREADS_PER_BLOCK_2 = (TPB, 1)
-comptime in_2_layout = Layout.row_major(SIZE_2)
-comptime out_2_layout = Layout.row_major(SIZE_2)
-comptime conv_2_layout = Layout.row_major(CONV_2)
-
-
-def conv_1d_block_boundary[
-    in_layout: Layout, out_layout: Layout, conv_layout: Layout, dtype: DType
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, conv_layout, ImmutAnyOrigin],
+comptime in_2_layout = row_major[SIZE_2]()
+comptime In2Layout = type_of(in_2_layout)
+comptime out_2_layout = row_major[SIZE_2]()
+comptime Out2Layout = type_of(out_2_layout)
+comptime conv_2_layout = row_major[CONV_2]()
+comptime Conv2Layout = type_of(conv_2_layout)
+
+
+def conv_1d_block_boundary(
+    output: TileTensor[mut=True, dtype, Out2Layout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, In2Layout, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, Conv2Layout, ImmutAnyOrigin],
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
@@ -84,11 +88,12 @@ def main() raises:
             )
 
         if argv()[1] == "--simple":
-            var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
-            var a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-            var b_tensor = LayoutTensor[dtype, conv_layout, ImmutAnyOrigin](b)
-            comptime kernel = conv_1d_simple[in_layout, out_layout, conv_layout]
-            ctx.enqueue_function[kernel, kernel](
+            var out_tensor = TileTensor(out, out_layout)
+            var a_tensor = TileTensor[mut=False, dtype, InLayout](a, in_layout)
+            var b_tensor = TileTensor[mut=False, dtype, ConvLayout](
+                b, conv_layout
+            )
+            ctx.enqueue_function[conv_1d_simple, conv_1d_simple](
                 out_tensor,
                 a_tensor,
                 b_tensor,
@@ -96,15 +101,16 @@ def main() raises:
                 block_dim=THREADS_PER_BLOCK,
             )
         else:
-            var out_tensor = LayoutTensor[dtype, out_2_layout, MutAnyOrigin](
-                out
+            var out_tensor = TileTensor(out, out_2_layout)
+            var a_tensor = TileTensor[mut=False, dtype, In2Layout](
+                a, in_2_layout
+            )
+            var b_tensor = TileTensor[mut=False, dtype, Conv2Layout](
+                b, conv_2_layout
             )
-            var a_tensor = LayoutTensor[dtype, in_2_layout, ImmutAnyOrigin](a)
-            var b_tensor = LayoutTensor[dtype, conv_2_layout, ImmutAnyOrigin](b)
-            comptime kernel = conv_1d_block_boundary[
-                in_2_layout, out_2_layout, conv_2_layout, dtype
-            ]
-            ctx.enqueue_function[kernel, kernel](
+            ctx.enqueue_function[
+                conv_1d_block_boundary, conv_1d_block_boundary
+            ](
                 out_tensor,
                 a_tensor,
                 b_tensor,
diff --git a/problems/p14/p14.mojo b/problems/p14/p14.mojo
index e48e0c5f..a3673699 100644
--- a/problems/p14/p14.mojo
+++ b/problems/p14/p14.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.sys import argv
 from std.math import log2
 from std.testing import assert_equal
@@ -12,14 +14,13 @@ comptime SIZE = 8
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 
-def prefix_sum_simple[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def prefix_sum_simple(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
@@ -34,16 +35,16 @@ comptime SIZE_2 = 15
 comptime BLOCKS_PER_GRID_2 = (2, 1)
 comptime THREADS_PER_BLOCK_2 = (TPB, 1)
 comptime EXTENDED_SIZE = SIZE_2 + 2  # up to 2 blocks
-comptime layout_2 = Layout.row_major(SIZE_2)
-comptime extended_layout = Layout.row_major(EXTENDED_SIZE)
+comptime layout_2 = row_major[SIZE_2]()
+comptime Layout2Type = type_of(layout_2)
+comptime extended_layout = row_major[EXTENDED_SIZE]()
+comptime ExtendedLayoutType = type_of(extended_layout)
 
 
 # Kernel 1: Compute local prefix sums and store block sums in out
-def prefix_sum_local_phase[
-    out_layout: Layout, in_layout: Layout
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+def prefix_sum_local_phase(
+    output: TileTensor[mut=True, dtype, ExtendedLayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, Layout2Type, ImmutAnyOrigin],
     size: Int,
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
@@ -52,9 +53,10 @@ def prefix_sum_local_phase[
 
 
 # Kernel 2: Add block sums to their respective blocks
-def prefix_sum_block_sum_phase[
-    layout: Layout
-](output: LayoutTensor[dtype, layout, MutAnyOrigin], size: Int):
+def prefix_sum_block_sum_phase(
+    output: TileTensor[mut=True, dtype, ExtendedLayoutType, MutAnyOrigin],
+    size: Int,
+):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     # FILL ME IN (roughly 3 lines)
 
@@ -91,11 +93,10 @@ def main() raises:
                 a_host[i] = Scalar[dtype](i)
 
         if use_simple:
-            a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-            out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
+            a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+            out_tensor = TileTensor(out, layout)
 
-            comptime kernel = prefix_sum_simple[layout]
-            ctx.enqueue_function[kernel, kernel](
+            ctx.enqueue_function[prefix_sum_simple, prefix_sum_simple](
                 out_tensor,
                 a_tensor,
                 size,
@@ -103,15 +104,16 @@ def main() raises:
                 block_dim=THREADS_PER_BLOCK,
             )
         else:
-            var a_tensor = LayoutTensor[dtype, layout_2, ImmutAnyOrigin](a)
-            var out_tensor = LayoutTensor[dtype, extended_layout, MutAnyOrigin](
-                out
+            var a_tensor = TileTensor[mut=False, dtype, Layout2Type](
+                a, layout_2
             )
+            var out_tensor = TileTensor(out, extended_layout)
 
             # ANCHOR: prefix_sum_complete_block_level_sync
             # Phase 1: Local prefix sums
-            comptime kernel = prefix_sum_local_phase[extended_layout, layout_2]
-            ctx.enqueue_function[kernel, kernel](
+            ctx.enqueue_function[
+                prefix_sum_local_phase, prefix_sum_local_phase
+            ](
                 out_tensor,
                 a_tensor,
                 size,
@@ -123,8 +125,9 @@ def main() raises:
             # No explicit ctx.synchronize() needed in this case.
 
             # Phase 2: Add block sums
-            comptime kernel2 = prefix_sum_block_sum_phase[extended_layout]
-            ctx.enqueue_function[kernel2, kernel2](
+            ctx.enqueue_function[
+                prefix_sum_block_sum_phase, prefix_sum_block_sum_phase
+            ](
                 out_tensor,
                 size,
                 grid_dim=BLOCKS_PER_GRID_2,
diff --git a/problems/p15/p15.mojo b/problems/p15/p15.mojo
index 4a4f79a2..c9f7ead5 100644
--- a/problems/p15/p15.mojo
+++ b/problems/p15/p15.mojo
@@ -4,7 +4,9 @@ from std.gpu.host import DeviceContext
 # ANCHOR: axis_sum
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 
 
 comptime TPB = 8
@@ -13,15 +15,15 @@ comptime SIZE = 6
 comptime BLOCKS_PER_GRID = (1, BATCH)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
-comptime in_layout = Layout.row_major(BATCH, SIZE)
-comptime out_layout = Layout.row_major(BATCH, 1)
+comptime in_layout = row_major[BATCH, SIZE]()
+comptime InLayout = type_of(in_layout)
+comptime out_layout = row_major[BATCH, 1]()
+comptime OutLayout = type_of(out_layout)
 
 
-def axis_sum[
-    in_layout: Layout, out_layout: Layout
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+def axis_sum(
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin],
     size: Int,
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
@@ -44,11 +46,10 @@ def main() raises:
                 for col in range(SIZE):
                     inp_host[row * SIZE + col] = Scalar[dtype](row * SIZE + col)
 
-        var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
-        var inp_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](inp)
+        var out_tensor = TileTensor(out, out_layout)
+        var inp_tensor = TileTensor[mut=False, dtype, InLayout](inp, in_layout)
 
-        comptime kernel = axis_sum[in_layout, out_layout]
-        ctx.enqueue_function[kernel, kernel](
+        ctx.enqueue_function[axis_sum, axis_sum](
             out_tensor,
             inp_tensor,
             SIZE,
diff --git a/problems/p16/p16.mojo b/problems/p16/p16.mojo
index 8ff079ad..e16cf873 100644
--- a/problems/p16/p16.mojo
+++ b/problems/p16/p16.mojo
@@ -5,7 +5,9 @@ from std.gpu.host import DeviceContext
 # ANCHOR: naive_matmul
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 
 
 comptime TPB = 3
@@ -13,15 +15,14 @@ comptime SIZE = 2
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (TPB, TPB)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE, SIZE)
+comptime layout = row_major[SIZE, SIZE]()
+comptime LayoutType = type_of(layout)
 
 
-def naive_matmul[
-    layout: Layout, size: Int
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def naive_matmul(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     var row = block_dim.y * block_idx.y + thread_idx.y
     var col = block_dim.x * block_idx.x + thread_idx.x
@@ -32,12 +33,10 @@ def naive_matmul[
 
 
 # ANCHOR: single_block_matmul
-def single_block_matmul[
-    layout: Layout, size: Int
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def single_block_matmul(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     var row = block_dim.y * block_idx.y + thread_idx.y
     var col = block_dim.x * block_idx.x + thread_idx.x
@@ -52,15 +51,14 @@ def single_block_matmul[
 comptime SIZE_TILED = 9
 comptime BLOCKS_PER_GRID_TILED = (3, 3)  # each block convers 3x3 elements
 comptime THREADS_PER_BLOCK_TILED = (TPB, TPB)
-comptime layout_tiled = Layout.row_major(SIZE_TILED, SIZE_TILED)
+comptime layout_tiled = row_major[SIZE_TILED, SIZE_TILED]()
+comptime LayoutTiledType = type_of(layout_tiled)
 
 
-def matmul_tiled[
-    layout: Layout, size: Int
-](
-    output: LayoutTensor[dtype, layout_tiled, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout_tiled, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, layout_tiled, ImmutAnyOrigin],
+def matmul_tiled(
+    output: TileTensor[mut=True, dtype, LayoutTiledType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutTiledType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutTiledType, ImmutAnyOrigin],
 ):
     var local_row = thread_idx.y
     var local_col = thread_idx.x
@@ -109,13 +107,12 @@ def main() raises:
                             inp1_host[i * size + k] * inp2_host[k * size + j]
                         )
 
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp1)
-        var b_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp2)
+        var out_tensor = TileTensor(out, layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](inp1, layout)
+        var b_tensor = TileTensor[mut=False, dtype, LayoutType](inp2, layout)
 
         if argv()[1] == "--naive":
-            comptime kernel = naive_matmul[layout, SIZE]
-            ctx.enqueue_function[kernel, kernel](
+            ctx.enqueue_function[naive_matmul, naive_matmul](
                 out_tensor,
                 a_tensor,
                 b_tensor,
@@ -123,8 +120,7 @@ def main() raises:
                 block_dim=THREADS_PER_BLOCK,
             )
         elif argv()[1] == "--single-block":
-            comptime kernel = single_block_matmul[layout, SIZE]
-            ctx.enqueue_function[kernel, kernel](
+            ctx.enqueue_function[single_block_matmul, single_block_matmul](
                 out_tensor,
                 a_tensor,
                 b_tensor,
@@ -133,18 +129,15 @@ def main() raises:
             )
         elif argv()[1] == "--tiled":
             # Need to update the layout of the tensors to the tiled layout
-            var out_tensor_tiled = LayoutTensor[
-                dtype, layout_tiled, MutAnyOrigin
-            ](out)
-            var a_tensor_tiled = LayoutTensor[
-                dtype, layout_tiled, ImmutAnyOrigin
-            ](inp1)
-            var b_tensor_tiled = LayoutTensor[
-                dtype, layout_tiled, ImmutAnyOrigin
-            ](inp2)
-
-            comptime kernel = matmul_tiled[layout_tiled, SIZE_TILED]
-            ctx.enqueue_function[kernel, kernel](
+            var out_tensor_tiled = TileTensor(out, layout_tiled)
+            var a_tensor_tiled = TileTensor[mut=False, dtype, LayoutTiledType](
+                inp1, layout_tiled
+            )
+            var b_tensor_tiled = TileTensor[mut=False, dtype, LayoutTiledType](
+                inp2, layout_tiled
+            )
+
+            ctx.enqueue_function[matmul_tiled, matmul_tiled](
                 out_tensor_tiled,
                 a_tensor_tiled,
                 b_tensor_tiled,
diff --git a/problems/p17/op/conv1d.mojo b/problems/p17/op/conv1d.mojo
index 808de38c..97de1bb7 100644
--- a/problems/p17/op/conv1d.mojo
+++ b/problems/p17/op/conv1d.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major, TensorLayout
+from layout.tile_tensor import stack_allocation
 
 # ANCHOR: conv1d_kernel
 comptime TPB = 15
@@ -9,32 +11,26 @@ comptime BLOCKS_PER_GRID = (2, 1)
 
 
 def conv1d_kernel[
-    in_layout: Layout,
-    out_layout: Layout,
-    conv_layout: Layout,
     input_size: Int,
     conv_size: Int,
+    OutLayout: TensorLayout,
+    InLayout: TensorLayout,
+    ConvLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, in_layout, MutAnyOrigin],
-    kernel: LayoutTensor[dtype, conv_layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin],
+    kernel: TileTensor[mut=False, dtype, ConvLayout, ImmutAnyOrigin],
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
     # first: need to account for padding
-    var shared_a = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB + conv_size - 1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var shared_b = LayoutTensor[
-        dtype,
-        Layout.row_major(conv_size),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_a = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB + conv_size - 1]())
+    var shared_b = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[conv_size]())
     if global_i < input_size:
         shared_a[local_i] = input[global_i]
 
@@ -53,7 +49,7 @@ def conv1d_kernel[
     barrier()
 
     if global_i < input_size:
-        var local_sum: output.element_type = 0
+        var local_sum: output.ElementType = 0
 
         comptime for j in range(conv_size):
             if local_i + j < TPB + conv_size - 1:
@@ -92,9 +88,6 @@ struct Conv1DCustomOp:
         var output_tensor = output.to_layout_tensor()
         var input_tensor = input.to_layout_tensor()
         var kernel_tensor = kernel.to_layout_tensor()
-        comptime in_layout = input_tensor.layout
-        comptime out_layout = output_tensor.layout
-        comptime conv_layout = kernel_tensor.layout
 
         comptime if target == "gpu":
             var gpu_ctx = ctx.get_device_context()
diff --git a/problems/p18/op/softmax.mojo b/problems/p18/op/softmax.mojo
index 8839d538..7b3025ec 100644
--- a/problems/p18/op/softmax.mojo
+++ b/problems/p18/op/softmax.mojo
@@ -4,26 +4,28 @@ from std.memory import UnsafePointer
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext, HostBuffer, DeviceBuffer
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.math import exp
 from std.bit import log2_ceil
 from std.utils.numerics import max_finite, min_finite
 
 
 comptime SIZE = 128  # This must be equal to INPUT_SIZE in p18.py
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 comptime GRID_DIM_X = 1
 # Tree-based reduction require the number of threads to be the next power of two >= SIZE for correctness.
 comptime BLOCK_DIM_X = 1 << log2_ceil(SIZE)
 
 
 def softmax_gpu_kernel[
-    layout: Layout,
     input_size: Int,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     comptime assert (
         dtype.is_floating_point()
@@ -37,12 +39,11 @@ def softmax_gpu_kernel[
 
 # ANCHOR: softmax_cpu_kernel
 def softmax_cpu_kernel[
-    layout: Layout,
     input_size: Int,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     comptime assert (
         dtype.is_floating_point()
@@ -71,12 +72,12 @@ struct SoftmaxCustomOp:
         ctx: DeviceContextPtr,
     ) raises:
         # Note: rebind is necessary now but it shouldn't be!
-        var output_tensor = rebind[LayoutTensor[dtype, layout, MutAnyOrigin]](
-            output.to_layout_tensor()
-        )
-        var input_tensor = rebind[LayoutTensor[dtype, layout, ImmutAnyOrigin]](
-            input.to_layout_tensor()
-        )
+        var output_tensor = rebind[
+            TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin]
+        ](output.to_layout_tensor())
+        var input_tensor = rebind[
+            TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin]
+        ](input.to_layout_tensor())
 
         comptime if target == "gpu":
             var gpu_ctx = ctx.get_device_context()
@@ -91,7 +92,7 @@ struct SoftmaxCustomOp:
                 0,
             )
 
-            comptime kernel = softmax_gpu_kernel[layout, input_size, dtype]
+            comptime kernel = softmax_gpu_kernel[input_size, dtype]
             gpu_ctx.enqueue_function[kernel, kernel](
                 output_tensor,
                 input_tensor,
@@ -100,8 +101,6 @@ struct SoftmaxCustomOp:
             )
 
         elif target == "cpu":
-            softmax_cpu_kernel[layout, input_size, dtype](
-                output_tensor, input_tensor
-            )
+            softmax_cpu_kernel[input_size, dtype](output_tensor, input_tensor)
         else:
             raise Error("Unsupported target: " + target)
diff --git a/problems/p18/test/test_softmax.mojo b/problems/p18/test/test_softmax.mojo
index 70b25871..483a2321 100644
--- a/problems/p18/test/test_softmax.mojo
+++ b/problems/p18/test/test_softmax.mojo
@@ -1,12 +1,14 @@
 from std.gpu.host import DeviceContext
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
 from std.testing import assert_almost_equal
 from std.bit import log2_ceil
 
 from op import softmax_gpu_kernel, softmax_cpu_kernel
 
 comptime SIZE = 128
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 comptime GRID_DIM_X = 1
 comptime BLOCK_DIM_X = 1 << log2_ceil(SIZE)
 comptime dtype = DType.float32
@@ -21,9 +23,7 @@ def test_softmax() raises:
         # for CPU testing
         var expected = ctx.enqueue_create_host_buffer[DType.float32](SIZE)
         expected.enqueue_fill(0)
-        var expected_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            expected
-        )
+        var expected_tensor = TileTensor(expected, layout)
         # Initialize input with more reasonable values
         with inp.map_to_host() as inp_host:
             for i in range(SIZE):
@@ -34,21 +34,19 @@ def test_softmax() raises:
                 print(inp_host[i], end=" ")
             print()
             # Create layout tensors for CPU calculation
-            input_host_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-                inp_host
+            input_host_tensor = TileTensor[mut=False, dtype, LayoutType](
+                inp_host, layout
             )
 
         # for GPU testing
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp)
+        var output_tensor = TileTensor(out, layout)
+        var input_tensor = TileTensor[mut=False, dtype, LayoutType](inp, layout)
 
         # Compute expected results using our CPU kernel
-        softmax_cpu_kernel[layout, SIZE, dtype](
-            expected_tensor, input_host_tensor
-        )
+        softmax_cpu_kernel[SIZE, dtype](expected_tensor, input_host_tensor)
 
         # Run GPU kernel
-        comptime kernel = softmax_gpu_kernel[layout, SIZE, dtype]
+        comptime kernel = softmax_gpu_kernel[SIZE, dtype]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
diff --git a/problems/p19/op/attention.mojo b/problems/p19/op/attention.mojo
index 3e71bdb2..99aca727 100644
--- a/problems/p19/op/attention.mojo
+++ b/problems/p19/op/attention.mojo
@@ -2,7 +2,9 @@ from std.memory import UnsafePointer
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext, HostBuffer, DeviceBuffer
 from std.gpu.memory import AddressSpace, async_copy_wait_all
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major, TensorLayout
+from layout.tile_tensor import stack_allocation
 from layout.layout_tensor import copy_dram_to_sram_async
 from std.math import exp
 from std.bit import log2_ceil
@@ -22,24 +24,24 @@ comptime SOFTMAX_BLOCK_DIM_X = 1 << log2_ceil(SEQ_LEN)
 
 
 # Tiled matrix multiplication (from p16), updated to:
-# 1) Support different layouts for input (a, b) and output LayoutTensors.
+# 1) Support different layouts for input (a, b) and output TileTensors.
 # 2) Handle cases where the inner dimension is not a multiple of MATMUL_BLOCK_DIM_XY.
 # 3) Explicitly check for out-of-bounds elements.
-# The approach still tiles all three LayoutTensors (a, b, and output) into identical square tiles
+# The approach still tiles all three TileTensors (a, b, and output) into identical square tiles
 # of size (MATMUL_BLOCK_DIM_XY x MATMUL_BLOCK_DIM_XY) with each thread loading one element
 # from a and b, and writing one element to output.
 def matmul_idiomatic_tiled[
-    a_layout: Layout,
-    b_layout: Layout,
-    out_layout: Layout,
     rows: Int,
     cols: Int,
     inner: Int,
+    OutLayout: TensorLayout,
+    ALayout: TensorLayout,
+    BLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, a_layout, MutAnyOrigin],
-    b: LayoutTensor[dtype, b_layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, ALayout, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, BLayout, MutAnyOrigin],
 ):
     """Updated idiomatic tiled matrix multiplication from p16."""
     var local_row = thread_idx.y
@@ -51,26 +53,23 @@ def matmul_idiomatic_tiled[
     var out_tile = output.tile[MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY](
         block_idx.y, block_idx.x
     )
-    var a_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var b_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var acc: output.element_type = 0
-
-    comptime load_a_layout = Layout.row_major(
+    comptime shared_layout = row_major[
         MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY
-    )  # Coalesced loading
-    comptime load_b_layout = Layout.row_major(
+    ]()
+    var a_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](shared_layout)
+    var b_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](shared_layout)
+    var acc: output.ElementType = 0
+
+    comptime load_a_layout = row_major[
         MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY
-    )  # Coalesced loading
+    ]()  # Coalesced loading
+    comptime load_b_layout = row_major[
+        MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY
+    ]()  # Coalesced loading
 
     comptime for idx in range(
         (inner + MATMUL_BLOCK_DIM_XY - 1) // MATMUL_BLOCK_DIM_XY
@@ -118,14 +117,14 @@ def matmul_idiomatic_tiled[
 
 # ANCHOR: transpose_kernel
 def transpose_kernel[
-    layout_in: Layout,  # Layout for input matrix (seq_len, d)
-    layout_out: Layout,  # Layout for output matrix (d, seq_len)
     rows: Int,
     cols: Int,
+    OutLayout: TensorLayout,
+    InLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, layout_out, MutAnyOrigin],
-    inp: LayoutTensor[dtype, layout_in, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    inp: TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin],
 ):
     # FILL ME IN (roughly 18 lines)
     ...
@@ -136,28 +135,23 @@ def transpose_kernel[
 
 # Apply softmax to attention scores taken from p16
 def softmax_gpu_kernel[
-    layout: Layout,
     input_size: Int,
+    LayoutType: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, MutAnyOrigin],
 ):
     comptime assert (
         dtype.is_floating_point()
     ), "dtype must be a floating-point type"
-    var shared_max = LayoutTensor[
-        dtype,
-        Layout.row_major(SOFTMAX_BLOCK_DIM_X),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var shared_sum = LayoutTensor[
-        dtype,
-        Layout.row_major(SOFTMAX_BLOCK_DIM_X),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    comptime softmax_layout = row_major[SOFTMAX_BLOCK_DIM_X]()
+    var shared_max = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](softmax_layout)
+    var shared_sum = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](softmax_layout)
     var global_i = thread_idx.x
 
     # Initialize out-of-bounds (shared_max[local_i], global_i >= input_size) shared memory addresses to the minimum
@@ -208,18 +202,18 @@ def softmax_gpu_kernel[
 
 # CPU implementation for vector attention
 def attention_cpu_kernel[
-    layout_q: Layout,
-    layout_k: Layout,
-    layout_v: Layout,
-    layout_out: Layout,
     seq_len: Int,
     d: Int,
+    OutLayout: TensorLayout,
+    QLayout: TensorLayout,
+    KLayout: TensorLayout,
+    VLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, layout_out, MutAnyOrigin],
-    q: LayoutTensor[dtype, layout_q, MutAnyOrigin],
-    k: LayoutTensor[dtype, layout_k, ImmutAnyOrigin],
-    v: LayoutTensor[dtype, layout_v, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    q: TileTensor[mut=False, dtype, QLayout, MutAnyOrigin],
+    k: TileTensor[mut=False, dtype, KLayout, ImmutAnyOrigin],
+    v: TileTensor[mut=False, dtype, VLayout, MutAnyOrigin],
 ):
     """CPU implementation of vector attention."""
     var scores = List[Float32]()
@@ -273,25 +267,30 @@ struct AttentionCustomOp:
         ctx: DeviceContextPtr,
     ) raises:
         # Define layouts
-        comptime layout_q = Layout.row_major(d)
-        comptime layout_k = Layout.row_major(seq_len, d)
-        comptime layout_v = Layout.row_major(seq_len, d)
-        comptime layout_out = Layout.row_major(d)
-        comptime layout_scores = Layout.row_major(seq_len)
+        comptime layout_q = row_major[d]()
+        comptime layout_k = row_major[seq_len, d]()
+        comptime layout_v = row_major[seq_len, d]()
+        comptime layout_out = row_major[d]()
+        comptime layout_scores = row_major[seq_len]()
+        comptime QLayout = type_of(layout_q)
+        comptime KLayout = type_of(layout_k)
+        comptime VLayout = type_of(layout_v)
+        comptime OutLayout = type_of(layout_out)
+        comptime ScoresLayout = type_of(layout_scores)
 
         # Convert to layout tensors
         var output_tensor = rebind[
-            LayoutTensor[dtype, layout_out, MutAnyOrigin]
+            TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin]
         ](output.to_layout_tensor())
-        var q_tensor = rebind[LayoutTensor[dtype, layout_q, MutAnyOrigin]](
-            q.to_layout_tensor()
-        )
-        var k_tensor = rebind[LayoutTensor[dtype, layout_k, ImmutAnyOrigin]](
-            k.to_layout_tensor()
-        )
-        var v_tensor = rebind[LayoutTensor[dtype, layout_v, MutAnyOrigin]](
-            v.to_layout_tensor()
-        )
+        var q_tensor = rebind[
+            TileTensor[mut=False, dtype, QLayout, MutAnyOrigin]
+        ](q.to_layout_tensor())
+        var k_tensor = rebind[
+            TileTensor[mut=False, dtype, KLayout, ImmutAnyOrigin]
+        ](k.to_layout_tensor())
+        var v_tensor = rebind[
+            TileTensor[mut=False, dtype, VLayout, MutAnyOrigin]
+        ](v.to_layout_tensor())
 
         comptime if target == "gpu":
             # ANCHOR: attention_orchestration
@@ -299,15 +298,20 @@ struct AttentionCustomOp:
 
             # Define layouts for matrix multiplication
             # Q reshaped to (1, d)
-            comptime layout_q_2d = Layout.row_major(1, d)
+            comptime layout_q_2d = row_major[1, d]()
+            comptime Q2DLayout = type_of(layout_q_2d)
             # K^T is (d, seq_len)
-            comptime layout_k_t = Layout.row_major(d, seq_len)
+            comptime layout_k_t = row_major[d, seq_len]()
+            comptime KTLayout = type_of(layout_k_t)
             # Scores as (1, seq_len)
-            comptime layout_scores_2d = Layout.row_major(1, seq_len)
+            comptime layout_scores_2d = row_major[1, seq_len]()
+            comptime Scores2DLayout = type_of(layout_scores_2d)
             # Weights as (1, seq_len)
-            comptime layout_weights_2d = Layout.row_major(1, seq_len)
+            comptime layout_weights_2d = row_major[1, seq_len]()
+            comptime Weights2DLayout = type_of(layout_weights_2d)
             # Result as (1, d)
-            comptime layout_result_2d = Layout.row_major(1, d)
+            comptime layout_result_2d = row_major[1, d]()
+            comptime Result2DLayout = type_of(layout_result_2d)
 
             # Transpose implementation limited to square (TRANSPOSE_BLOCK_DIM_XY x TRANSPOSE_BLOCK_DIM_XY) thread blocks
             comptime transpose_threads_per_block = (
@@ -344,7 +348,7 @@ struct AttentionCustomOp:
                 seq_len
             )  # Reused for scores and weights
 
-            var k_t = LayoutTensor[dtype, layout_k_t, MutAnyOrigin](k_t_buf)
+            var k_t = TileTensor(k_t_buf, layout_k_t)
 
             # Step 1: Reshape Q from (d,) to (1, d) - no buffer needed
             # FILL ME IN 1 line
@@ -373,9 +377,9 @@ struct AttentionCustomOp:
             # ANCHOR_END: attention_orchestration
 
         elif target == "cpu":
-            attention_cpu_kernel[
-                layout_q, layout_k, layout_v, layout_out, seq_len, d, dtype
-            ](output_tensor, q_tensor, k_tensor, v_tensor)
+            attention_cpu_kernel[seq_len, d, dtype](
+                output_tensor, q_tensor, k_tensor, v_tensor
+            )
 
         else:
             raise Error("Unsupported target: " + target)
diff --git a/problems/p20/op/conv1d.mojo b/problems/p20/op/conv1d.mojo
index 07d29d9a..7c6bec92 100644
--- a/problems/p20/op/conv1d.mojo
+++ b/problems/p20/op/conv1d.mojo
@@ -2,7 +2,9 @@
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major, TensorLayout
+from layout.tile_tensor import stack_allocation
 from std.sys import argv
 from std.testing import assert_equal
 
@@ -12,32 +14,26 @@ comptime BLOCKS_PER_GRID = (2, 1)
 
 # ANCHOR: conv1d_kernel
 def conv1d_kernel[
-    in_layout: Layout,
-    out_layout: Layout,
-    conv_layout: Layout,
     input_size: Int,
     conv_size: Int,
+    OutLayout: TensorLayout,
+    InLayout: TensorLayout,
+    ConvLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, in_layout, MutAnyOrigin],
-    kernel: LayoutTensor[dtype, conv_layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, InLayout, MutAnyOrigin],
+    kernel: TileTensor[mut=False, dtype, ConvLayout, MutAnyOrigin],
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
     # first: need to account for padding
-    var shared_a = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB + conv_size - 1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var shared_b = LayoutTensor[
-        dtype,
-        Layout.row_major(conv_size),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_a = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB + conv_size - 1]())
+    var shared_b = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[conv_size]())
     if global_i < input_size:
         shared_a[local_i] = input[global_i]
 
@@ -58,7 +54,7 @@ def conv1d_kernel[
     barrier()
 
     if global_i < input_size:
-        var local_sum: output.element_type = 0
+        var local_sum: output.ElementType = 0
 
         comptime for j in range(conv_size):
             if local_i + j < TPB + conv_size - 1:
@@ -95,9 +91,6 @@ struct Conv1DCustomOp:
         var out_tensor = output.to_layout_tensor()
         var input_tensor = input.to_layout_tensor()
         var kernel_tensor = kernel.to_layout_tensor()
-        comptime in_layout = input_tensor.layout
-        comptime out_layout = out_tensor.layout
-        comptime conv_layout = kernel_tensor.layout
 
         comptime if target == "gpu":
             var gpu_ctx = ctx.get_device_context()
@@ -111,9 +104,7 @@ struct Conv1DCustomOp:
                 ),
                 0,
             )
-            comptime kernel = conv1d_kernel[
-                in_layout, out_layout, conv_layout, input_size, conv_size
-            ]
+            comptime kernel = conv1d_kernel[input_size, conv_size]
             gpu_ctx.enqueue_function[kernel, kernel](
                 out_tensor,
                 input_tensor,
diff --git a/problems/p21/op/embedding.mojo b/problems/p21/op/embedding.mojo
index 8108d7ba..22e73d51 100644
--- a/problems/p21/op/embedding.mojo
+++ b/problems/p21/op/embedding.mojo
@@ -1,7 +1,8 @@
 from std.math import ceildiv
 from std.gpu import thread_idx, block_idx, block_dim, grid_dim, barrier
 from std.gpu.host import DeviceContext
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major, TensorLayout
 from std.sys import argv
 from std.testing import assert_equal
 
@@ -10,18 +11,18 @@ comptime THREADS_PER_BLOCK = 256
 
 
 def embedding_kernel_coalesced[
-    indices_layout: Layout,
-    weights_layout: Layout,
-    out_layout: Layout,
     batch_size: Int,
     seq_len: Int,
     vocab_size: Int,
     embed_dim: Int,
+    OutLayout: TensorLayout,
+    IndicesLayout: TensorLayout,
+    WeightsLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    indices: LayoutTensor[DType.int32, indices_layout, MutAnyOrigin],
-    weights: LayoutTensor[dtype, weights_layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    indices: TileTensor[mut=False, DType.int32, IndicesLayout, MutAnyOrigin],
+    weights: TileTensor[mut=False, dtype, WeightsLayout, MutAnyOrigin],
 ):
     """
     Memory-coalescing focused embedding kernel.
@@ -54,18 +55,18 @@ def embedding_kernel_coalesced[
 
 # ANCHOR: embedding_kernel_2d
 def embedding_kernel_2d[
-    indices_layout: Layout,
-    weights_layout: Layout,
-    out_layout: Layout,
     batch_size: Int,
     seq_len: Int,
     vocab_size: Int,
     embed_dim: Int,
+    OutLayout: TensorLayout,
+    IndicesLayout: TensorLayout,
+    WeightsLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    indices: LayoutTensor[DType.int32, indices_layout, MutAnyOrigin],
-    weights: LayoutTensor[dtype, weights_layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    indices: TileTensor[mut=False, DType.int32, IndicesLayout, MutAnyOrigin],
+    weights: TileTensor[mut=False, dtype, WeightsLayout, MutAnyOrigin],
 ):
     """
     2D grid non-coalesced embedding kernel.
@@ -128,10 +129,6 @@ struct EmbeddingCustomOp:
         var indices_tensor = indices.to_layout_tensor()
         var weights_tensor = weights.to_layout_tensor()
 
-        comptime indices_layout = indices_tensor.layout
-        comptime weights_layout = weights_tensor.layout
-        comptime out_layout = output_tensor.layout
-
         comptime if target == "gpu":
             var gpu_ctx = ctx.get_device_context()
 
@@ -152,9 +149,6 @@ struct EmbeddingCustomOp:
 
             # Compile and launch optimized kernel
             comptime kernel = embedding_kernel_coalesced[
-                indices_layout,
-                weights_layout,
-                out_layout,
                 batch_size,
                 seq_len,
                 vocab_size,
@@ -210,10 +204,6 @@ struct Embedding2DCustomOp:
         var indices_tensor = indices.to_layout_tensor()
         var weights_tensor = weights.to_layout_tensor()
 
-        comptime indices_layout = indices_tensor.layout
-        comptime weights_layout = weights_tensor.layout
-        comptime out_layout = output_tensor.layout
-
         comptime if target == "gpu":
             var gpu_ctx = ctx.get_device_context()
 
@@ -237,9 +227,6 @@ struct Embedding2DCustomOp:
 
             # Compile and launch 2D kernel
             comptime kernel = embedding_kernel_2d[
-                indices_layout,
-                weights_layout,
-                out_layout,
                 batch_size,
                 seq_len,
                 vocab_size,
diff --git a/problems/p22/op/layernorm_linear.mojo b/problems/p22/op/layernorm_linear.mojo
index 8519c015..dc659b12 100644
--- a/problems/p22/op/layernorm_linear.mojo
+++ b/problems/p22/op/layernorm_linear.mojo
@@ -2,7 +2,9 @@ from std.math import sqrt
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.memory import AddressSpace, async_copy_wait_all
 from std.os.atomic import Atomic
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major, TensorLayout
+from layout.tile_tensor import stack_allocation
 from layout.layout_tensor import copy_dram_to_sram_async
 import compiler
 from std.runtime.asyncrt import DeviceContextPtr
@@ -20,17 +22,17 @@ comptime dtype = DType.float32
 # ANCHOR: matmul_idiomatic_tiled
 # Idiomatic tiled matmul from p19.mojo
 def matmul_idiomatic_tiled[
-    a_layout: Layout,
-    b_layout: Layout,
-    out_layout: Layout,
     rows: Int,
     cols: Int,
     inner: Int,
+    OutLayout: TensorLayout,
+    ALayout: TensorLayout,
+    BLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, a_layout, MutAnyOrigin],
-    b: LayoutTensor[dtype, b_layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, ALayout, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, BLayout, MutAnyOrigin],
 ):
     """Idiomatic tiled matrix multiplication from p19."""
     var local_row = thread_idx.y
@@ -42,26 +44,23 @@ def matmul_idiomatic_tiled[
     var out_tile = output.tile[MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY](
         block_idx.y, block_idx.x
     )
-    var a_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var b_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var acc: output.element_type = 0
-
-    comptime load_a_layout = Layout.row_major(
+    comptime shared_layout = row_major[
         MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY
-    )  # Coalesced loading
-    comptime load_b_layout = Layout.row_major(
+    ]()
+    var a_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](shared_layout)
+    var b_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](shared_layout)
+    var acc: output.ElementType = 0
+
+    comptime load_a_layout = row_major[
         MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY
-    )  # Coalesced loading
+    ]()  # Coalesced loading
+    comptime load_b_layout = row_major[
+        MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY
+    ]()  # Coalesced loading
 
     comptime for idx in range(
         (inner + MATMUL_BLOCK_DIM_XY - 1) // MATMUL_BLOCK_DIM_XY
@@ -112,17 +111,17 @@ def matmul_idiomatic_tiled[
 
 # ANCHOR: layernorm_kernel
 def layernorm_kernel[
-    input_layout: Layout,
-    ln_params_layout: Layout,
-    output_layout: Layout,
     batch_size: Int,
     seq_len: Int,
     hidden_dim: Int,
+    OutputLayout: TensorLayout,
+    InputLayout: TensorLayout,
+    LnParamsLayout: TensorLayout,
 ](
-    output: LayoutTensor[dtype, output_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, input_layout, ImmutAnyOrigin],
-    ln_weight: LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin],
-    ln_bias: LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutputLayout, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, InputLayout, ImmutAnyOrigin],
+    ln_weight: TileTensor[mut=False, dtype, LnParamsLayout, ImmutAnyOrigin],
+    ln_bias: TileTensor[mut=False, dtype, LnParamsLayout, ImmutAnyOrigin],
 ):
     var batch_idx = block_idx.x
     var seq_idx = block_idx.y
@@ -147,24 +146,24 @@ def layernorm_kernel[
 
 # ANCHOR: transpose_kernel
 def transpose_kernel[
-    layout_in: Layout,
-    layout_out: Layout,
     rows: Int,
     cols: Int,
+    OutLayout: TensorLayout,
+    InLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, layout_out, MutAnyOrigin],
-    inp: LayoutTensor[dtype, layout_in, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    inp: TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin],
 ):
     """Transpose matrix using shared memory tiling for coalesced access.
     We will learn more about coalesced access in the next part.
     """
-    var shared_tile = LayoutTensor[
-        dtype,
-        Layout.row_major(TRANSPOSE_BLOCK_DIM_XY, TRANSPOSE_BLOCK_DIM_XY),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    comptime shared_layout = row_major[
+        TRANSPOSE_BLOCK_DIM_XY, TRANSPOSE_BLOCK_DIM_XY
+    ]()
+    var shared_tile = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](shared_layout)
 
     var local_row = thread_idx.y
     var local_col = thread_idx.x
@@ -191,16 +190,16 @@ def transpose_kernel[
 
 # ANCHOR: add_bias_kernel
 def add_bias_kernel[
-    input_layout: Layout,
-    bias_layout: Layout,
-    output_layout: Layout,
     batch_size: Int,
     seq_len: Int,
     output_dim: Int,
+    OutputLayout: TensorLayout,
+    InputLayout: TensorLayout,
+    BiasLayout: TensorLayout,
 ](
-    output: LayoutTensor[dtype, output_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, input_layout, MutAnyOrigin],
-    bias: LayoutTensor[dtype, bias_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutputLayout, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, InputLayout, MutAnyOrigin],
+    bias: TileTensor[mut=False, dtype, BiasLayout, ImmutAnyOrigin],
 ):
     """Simple bias addition."""
     var batch_idx = block_idx.x
@@ -220,22 +219,22 @@ def add_bias_kernel[
 
 # ANCHOR: minimal_fused_forward_kernel
 def minimal_fused_kernel[
-    input_layout: Layout,
-    ln_params_layout: Layout,
-    weight_layout: Layout,
-    bias_layout: Layout,
-    output_layout: Layout,
     batch_size: Int,
     seq_len: Int,
     hidden_dim: Int,
     output_dim: Int,
+    OutputLayout: TensorLayout,
+    InputLayout: TensorLayout,
+    LnParamsLayout: TensorLayout,
+    WeightLayout: TensorLayout,
+    BiasLayout: TensorLayout,
 ](
-    output: LayoutTensor[dtype, output_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, input_layout, ImmutAnyOrigin],
-    ln_weight: LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin],
-    ln_bias: LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin],
-    linear_weight: LayoutTensor[dtype, weight_layout, ImmutAnyOrigin],
-    linear_bias: LayoutTensor[dtype, bias_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutputLayout, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, InputLayout, ImmutAnyOrigin],
+    ln_weight: TileTensor[mut=False, dtype, LnParamsLayout, ImmutAnyOrigin],
+    ln_bias: TileTensor[mut=False, dtype, LnParamsLayout, ImmutAnyOrigin],
+    linear_weight: TileTensor[mut=False, dtype, WeightLayout, ImmutAnyOrigin],
+    linear_bias: TileTensor[mut=False, dtype, BiasLayout, ImmutAnyOrigin],
 ):
     """Minimal fused kernel - one thread per sequence position to avoid redundancy.
     """
@@ -261,30 +260,32 @@ def minimal_fused_kernel[
 
 # ANCHOR: minimal_fused_backward_kernel
 def minimal_fused_kernel_backward[
-    grad_output_layout: Layout,
-    input_layout: Layout,
-    ln_params_layout: Layout,
-    weight_layout: Layout,
-    grad_input_layout: Layout,
-    grad_ln_weight_layout: Layout,
-    grad_ln_bias_layout: Layout,
-    grad_weight_layout: Layout,
-    grad_bias_layout: Layout,
     batch_size: Int,
     seq_len: Int,
     hidden_dim: Int,
     output_dim: Int,
+    GradInputLayout: TensorLayout,
+    GradLnWeightLayout: TensorLayout,
+    GradLnBiasLayout: TensorLayout,
+    GradWeightLayout: TensorLayout,
+    GradBiasLayout: TensorLayout,
+    GradOutputLayout: TensorLayout,
+    InputLayout: TensorLayout,
+    LnParamsLayout: TensorLayout,
+    WeightLayout: TensorLayout,
 ](
-    grad_input: LayoutTensor[dtype, grad_input_layout, MutAnyOrigin],
-    grad_ln_weight: LayoutTensor[dtype, grad_ln_weight_layout, MutAnyOrigin],
-    grad_ln_bias: LayoutTensor[dtype, grad_ln_bias_layout, MutAnyOrigin],
-    grad_weight: LayoutTensor[dtype, grad_weight_layout, MutAnyOrigin],
-    grad_bias: LayoutTensor[dtype, grad_bias_layout, MutAnyOrigin],
-    grad_output: LayoutTensor[dtype, grad_output_layout, ImmutAnyOrigin],
-    input: LayoutTensor[dtype, input_layout, ImmutAnyOrigin],
-    ln_weight: LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin],
-    ln_bias: LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin],
-    linear_weight: LayoutTensor[dtype, weight_layout, ImmutAnyOrigin],
+    grad_input: TileTensor[mut=True, dtype, GradInputLayout, MutAnyOrigin],
+    grad_ln_weight: TileTensor[
+        mut=True, dtype, GradLnWeightLayout, MutAnyOrigin
+    ],
+    grad_ln_bias: TileTensor[mut=True, dtype, GradLnBiasLayout, MutAnyOrigin],
+    grad_weight: TileTensor[mut=True, dtype, GradWeightLayout, MutAnyOrigin],
+    grad_bias: TileTensor[mut=True, dtype, GradBiasLayout, MutAnyOrigin],
+    grad_output: TileTensor[mut=False, dtype, GradOutputLayout, ImmutAnyOrigin],
+    input: TileTensor[mut=False, dtype, InputLayout, ImmutAnyOrigin],
+    ln_weight: TileTensor[mut=False, dtype, LnParamsLayout, ImmutAnyOrigin],
+    ln_bias: TileTensor[mut=False, dtype, LnParamsLayout, ImmutAnyOrigin],
+    linear_weight: TileTensor[mut=False, dtype, WeightLayout, ImmutAnyOrigin],
 ):
     """Fused backward kernel using atomic operations for safe gradient accumulation.
     """
@@ -372,25 +373,30 @@ struct LayerNormLinearCustomOp:
         comptime weight_layout = linear_weight.static_spec.to_layout()
         comptime bias_layout = linear_bias.static_spec.to_layout()
         comptime output_layout = output.static_spec.to_layout()
+        comptime InputLayout = type_of(input_layout)
+        comptime LnParamsLayout = type_of(ln_params_layout)
+        comptime WeightLayout = type_of(weight_layout)
+        comptime BiasLayout = type_of(bias_layout)
+        comptime OutputLayout = type_of(output_layout)
 
         # Note: rebind is necessary now but it shouldn't be!
         var output_tensor = rebind[
-            LayoutTensor[dtype, output_layout, MutAnyOrigin]
+            TileTensor[mut=True, dtype, OutputLayout, MutAnyOrigin]
         ](output.to_layout_tensor())
         var input_tensor = rebind[
-            LayoutTensor[dtype, input_layout, ImmutAnyOrigin]
+            TileTensor[mut=False, dtype, InputLayout, ImmutAnyOrigin]
         ](input.to_layout_tensor())
         var ln_weight_tensor = rebind[
-            LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin]
+            TileTensor[mut=False, dtype, LnParamsLayout, ImmutAnyOrigin]
         ](ln_weight.to_layout_tensor())
         var ln_bias_tensor = rebind[
-            LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin]
+            TileTensor[mut=False, dtype, LnParamsLayout, ImmutAnyOrigin]
         ](ln_bias.to_layout_tensor())
         var linear_weight_tensor = rebind[
-            LayoutTensor[dtype, weight_layout, ImmutAnyOrigin]
+            TileTensor[mut=False, dtype, WeightLayout, ImmutAnyOrigin]
         ](linear_weight.to_layout_tensor())
         var linear_bias_tensor = rebind[
-            LayoutTensor[dtype, bias_layout, ImmutAnyOrigin]
+            TileTensor[mut=False, dtype, BiasLayout, ImmutAnyOrigin]
         ](linear_bias.to_layout_tensor())
 
         comptime if target == "gpu":
@@ -400,11 +406,6 @@ struct LayerNormLinearCustomOp:
             comptime if algorithm == "fused":
                 # fused case - one thread per sequence position
                 comptime kernel = minimal_fused_kernel[
-                    input_layout,
-                    ln_params_layout,
-                    weight_layout,
-                    bias_layout,
-                    output_layout,
                     batch_size,
                     seq_len,
                     hidden_dim,
@@ -426,15 +427,12 @@ struct LayerNormLinearCustomOp:
                 var normalized_buffer = gpu_ctx.enqueue_create_buffer[dtype](
                     batch_size * seq_len * hidden_dim
                 )
-                var normalized_tensor = LayoutTensor[
-                    dtype, input_layout, MutAnyOrigin
-                ](normalized_buffer)
+                var normalized_tensor = TileTensor[
+                    mut=True, dtype, InputLayout, MutAnyOrigin
+                ](normalized_buffer, input_layout)
 
                 # Step 1: LayerNorm kernel
                 comptime kernel = layernorm_kernel[
-                    input_layout,
-                    ln_params_layout,
-                    input_layout,
                     batch_size,
                     seq_len,
                     hidden_dim,
@@ -457,19 +455,26 @@ struct LayerNormLinearCustomOp:
                 var matmul_buffer = gpu_ctx.enqueue_create_buffer[dtype](
                     batch_size * seq_len * output_dim
                 )
-                var matmul_tensor = LayoutTensor[
-                    dtype, output_layout, MutAnyOrigin
-                ](matmul_buffer)
+                var matmul_tensor = TileTensor[
+                    mut=True, dtype, OutputLayout, MutAnyOrigin
+                ](matmul_buffer, output_layout)
 
                 # Create transposed weight matrix: [output_dim, hidden_dim] -> [hidden_dim, output_dim]
                 var transposed_weight_buffer = gpu_ctx.enqueue_create_buffer[
                     dtype
                 ](hidden_dim * output_dim)
-                var transposed_weight_tensor = LayoutTensor[
+                comptime transposed_weight_layout = row_major[
+                    hidden_dim, output_dim
+                ]()
+                comptime TransposedWeightLayout = type_of(
+                    transposed_weight_layout
+                )
+                var transposed_weight_tensor = TileTensor[
+                    mut=True,
                     dtype,
-                    Layout.row_major(hidden_dim, output_dim),
+                    TransposedWeightLayout,
                     MutAnyOrigin,
-                ](transposed_weight_buffer)
+                ](transposed_weight_buffer, transposed_weight_layout)
 
                 # Transpose the weight matrix
                 var transpose_blocks_x = (
@@ -479,8 +484,6 @@ struct LayerNormLinearCustomOp:
                     output_dim + TRANSPOSE_BLOCK_DIM_XY - 1
                 ) // TRANSPOSE_BLOCK_DIM_XY
                 comptime kernel2 = transpose_kernel[
-                    weight_layout,
-                    transposed_weight_tensor.layout,
                     output_dim,
                     hidden_dim,
                 ]
@@ -492,17 +495,20 @@ struct LayerNormLinearCustomOp:
                 )
 
                 # Reshape tensors for matmul: [batch*seq, hidden] @ [hidden, output] -> [batch*seq, output]
-                var flat_normalized = normalized_tensor.reshape[
-                    Layout.row_major(batch_size * seq_len, hidden_dim)
+                comptime flat_normalized_layout = row_major[
+                    batch_size * seq_len, hidden_dim
                 ]()
-                var flat_matmul = matmul_tensor.reshape[
-                    Layout.row_major(batch_size * seq_len, output_dim)
+                comptime FlatNormalizedLayout = type_of(flat_normalized_layout)
+                comptime flat_matmul_layout = row_major[
+                    batch_size * seq_len, output_dim
                 ]()
+                comptime FlatMatmulLayout = type_of(flat_matmul_layout)
+                var flat_normalized = normalized_tensor.reshape[
+                    flat_normalized_layout
+                ]()
+                var flat_matmul = matmul_tensor.reshape[flat_matmul_layout]()
 
                 comptime kernel3 = matmul_idiomatic_tiled[
-                    flat_normalized.layout,
-                    transposed_weight_tensor.layout,
-                    flat_matmul.layout,
                     batch_size * seq_len,
                     output_dim,
                     hidden_dim,
@@ -516,14 +522,15 @@ struct LayerNormLinearCustomOp:
                 )
 
                 # Step 3: Add bias - reshape matmul result back to 3D for bias addition
+                comptime reshaped_matmul_layout = row_major[
+                    batch_size, seq_len, output_dim
+                ]()
+                comptime ReshapedMatmulLayout = type_of(reshaped_matmul_layout)
                 var reshaped_matmul = matmul_tensor.reshape[
-                    Layout.row_major(batch_size, seq_len, output_dim)
+                    reshaped_matmul_layout
                 ]()
 
                 comptime kernel4 = add_bias_kernel[
-                    reshaped_matmul.layout,
-                    bias_layout,
-                    output_layout,
                     batch_size,
                     seq_len,
                     output_dim,
@@ -612,36 +619,45 @@ struct LayerNormLinearBackwardCustomOp:
         comptime grad_ln_bias_layout = grad_ln_bias.static_spec.to_layout()
         comptime grad_weight_layout = grad_weight.static_spec.to_layout()
         comptime grad_bias_layout = grad_bias.static_spec.to_layout()
+        comptime GradOutputLayout = type_of(grad_output_layout)
+        comptime InputLayout = type_of(input_layout)
+        comptime LnParamsLayout = type_of(ln_params_layout)
+        comptime WeightLayout = type_of(weight_layout)
+        comptime GradInputLayout = type_of(grad_input_layout)
+        comptime GradLnWeightLayout = type_of(grad_ln_weight_layout)
+        comptime GradLnBiasLayout = type_of(grad_ln_bias_layout)
+        comptime GradWeightLayout = type_of(grad_weight_layout)
+        comptime GradBiasLayout = type_of(grad_bias_layout)
 
         var grad_input_tensor = rebind[
-            LayoutTensor[dtype, grad_input_layout, MutAnyOrigin]
+            TileTensor[mut=True, dtype, GradInputLayout, MutAnyOrigin]
         ](grad_input.to_layout_tensor())
         var grad_ln_weight_tensor = rebind[
-            LayoutTensor[dtype, grad_ln_weight_layout, MutAnyOrigin]
+            TileTensor[mut=True, dtype, GradLnWeightLayout, MutAnyOrigin]
         ](grad_ln_weight.to_layout_tensor())
         var grad_ln_bias_tensor = rebind[
-            LayoutTensor[dtype, grad_ln_bias_layout, MutAnyOrigin]
+            TileTensor[mut=True, dtype, GradLnBiasLayout, MutAnyOrigin]
         ](grad_ln_bias.to_layout_tensor())
         var grad_weight_tensor = rebind[
-            LayoutTensor[dtype, grad_weight_layout, MutAnyOrigin]
+            TileTensor[mut=True, dtype, GradWeightLayout, MutAnyOrigin]
         ](grad_weight.to_layout_tensor())
         var grad_bias_tensor = rebind[
-            LayoutTensor[dtype, grad_bias_layout, MutAnyOrigin]
+            TileTensor[mut=True, dtype, GradBiasLayout, MutAnyOrigin]
         ](grad_bias.to_layout_tensor())
         var grad_output_tensor = rebind[
-            LayoutTensor[dtype, grad_output_layout, ImmutAnyOrigin]
+            TileTensor[mut=False, dtype, GradOutputLayout, ImmutAnyOrigin]
         ](grad_output.to_layout_tensor())
         var input_tensor = rebind[
-            LayoutTensor[dtype, input_layout, ImmutAnyOrigin]
+            TileTensor[mut=False, dtype, InputLayout, ImmutAnyOrigin]
         ](input.to_layout_tensor())
         var ln_weight_tensor = rebind[
-            LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin]
+            TileTensor[mut=False, dtype, LnParamsLayout, ImmutAnyOrigin]
         ](ln_weight.to_layout_tensor())
         var ln_bias_tensor = rebind[
-            LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin]
+            TileTensor[mut=False, dtype, LnParamsLayout, ImmutAnyOrigin]
         ](ln_bias.to_layout_tensor())
         var linear_weight_tensor = rebind[
-            LayoutTensor[dtype, weight_layout, ImmutAnyOrigin]
+            TileTensor[mut=False, dtype, WeightLayout, ImmutAnyOrigin]
         ](linear_weight.to_layout_tensor())
 
         comptime if target == "gpu":
@@ -649,15 +665,6 @@ struct LayerNormLinearBackwardCustomOp:
 
             # Launch backward kernel
             comptime kernel = minimal_fused_kernel_backward[
-                grad_output_layout,
-                input_layout,
-                ln_params_layout,
-                weight_layout,
-                grad_input_layout,
-                grad_ln_weight_layout,
-                grad_ln_bias_layout,
-                grad_weight_layout,
-                grad_bias_layout,
                 batch_size,
                 seq_len,
                 hidden_dim,
diff --git a/problems/p23/p23.mojo b/problems/p23/p23.mojo
index 69843290..5b390bb4 100644
--- a/problems/p23/p23.mojo
+++ b/problems/p23/p23.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_dim, block_idx, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.host.compile import get_gpu_target
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major, TensorLayout
+from layout.tile_tensor import stack_allocation
 from std.utils import IndexList
 from std.math import log2
 from std.algorithm.functional import elementwise, vectorize
@@ -12,17 +14,18 @@ from std.benchmark import Bench, BenchConfig, Bencher, BenchId, keep
 # ANCHOR: elementwise_add
 comptime SIZE = 1024
 comptime rank = 1
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 comptime dtype = DType.float32
 comptime SIMD_WIDTH = simd_width_of[dtype, target=get_gpu_target()]()
 
 
 def elementwise_add[
-    layout: Layout, dtype: DType, simd_width: Int, rank: Int, size: Int
+    LayoutT: TensorLayout, dtype: DType, simd_width: Int, rank: Int, size: Int
 ](
-    output: LayoutTensor[mut=True, dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
-    b: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutT, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
     ctx: DeviceContext,
 ) raises:
     @parameter
@@ -34,7 +37,7 @@ def elementwise_add[
         print("idx:", idx)
         # FILL IN (2 to 4 lines)
 
-    elementwise[add, SIMD_WIDTH, target="gpu"](a.size(), ctx)
+    elementwise[add, SIMD_WIDTH, target="gpu"](size, ctx)
 
 
 # ANCHOR_END: elementwise_add
@@ -45,16 +48,16 @@ comptime TILE_SIZE = 32
 
 
 def tiled_elementwise_add[
-    layout: Layout,
+    LayoutT: TensorLayout,
     dtype: DType,
     simd_width: Int,
     rank: Int,
     size: Int,
     tile_size: Int,
 ](
-    output: LayoutTensor[mut=True, dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
-    b: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutT, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
     ctx: DeviceContext,
 ) raises:
     @parameter
@@ -79,7 +82,7 @@ def tiled_elementwise_add[
 
 # ANCHOR: manual_vectorized_tiled_elementwise_add
 def manual_vectorized_tiled_elementwise_add[
-    layout: Layout,
+    LayoutT: TensorLayout,
     dtype: DType,
     simd_width: Int,
     num_threads_per_tile: Int,
@@ -87,9 +90,9 @@ def manual_vectorized_tiled_elementwise_add[
     size: Int,
     tile_size: Int,
 ](
-    output: LayoutTensor[mut=True, dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
-    b: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutT, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
     ctx: DeviceContext,
 ) raises:
     # Each tile contains tile_size groups of simd_width elements
@@ -120,7 +123,7 @@ def manual_vectorized_tiled_elementwise_add[
 
 # ANCHOR: vectorize_within_tiles_elementwise_add
 def vectorize_within_tiles_elementwise_add[
-    layout: Layout,
+    LayoutT: TensorLayout,
     dtype: DType,
     simd_width: Int,
     num_threads_per_tile: Int,
@@ -128,9 +131,9 @@ def vectorize_within_tiles_elementwise_add[
     size: Int,
     tile_size: Int,
 ](
-    output: LayoutTensor[mut=True, dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
-    b: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutT, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
     ctx: DeviceContext,
 ) raises:
     # Each tile contains tile_size elements (not SIMD groups)
@@ -171,7 +174,8 @@ def benchmark_elementwise_parameterized[
     test_size: Int, tile_size: Int
 ](mut b: Bencher) raises:
     var bench_ctx = DeviceContext()
-    comptime layout = Layout.row_major(test_size)
+    comptime bench_layout = row_major[test_size]()
+    comptime BenchLayoutType = type_of(bench_layout)
     var out = bench_ctx.enqueue_create_buffer[dtype](test_size)
     out.enqueue_fill(0)
     var a = bench_ctx.enqueue_create_buffer[dtype](test_size)
@@ -184,20 +188,20 @@ def benchmark_elementwise_parameterized[
             a_host[i] = Scalar[dtype](2 * i)
             b_host[i] = Scalar[dtype](2 * i + 1)
 
-    var a_tensor = LayoutTensor[mut=False, dtype, layout, MutAnyOrigin](
-        a.unsafe_ptr()
-    )
-    var b_tensor = LayoutTensor[mut=False, dtype, layout, MutAnyOrigin](
-        b_buf.unsafe_ptr()
-    )
-    var out_tensor = LayoutTensor[mut=True, dtype, layout, MutAnyOrigin](
-        out.unsafe_ptr()
+    var a_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](a, bench_layout)
+    var b_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](b_buf, bench_layout)
+    var out_tensor = TileTensor[mut=True, dtype, BenchLayoutType, MutAnyOrigin](
+        out, bench_layout
     )
 
     @parameter
     @always_inline
     def elementwise_workflow(ctx: DeviceContext) raises:
-        elementwise_add[layout, dtype, SIMD_WIDTH, rank, test_size](
+        elementwise_add[BenchLayoutType, dtype, SIMD_WIDTH, rank, test_size](
             out_tensor, a_tensor, b_tensor, ctx
         )
 
@@ -212,7 +216,8 @@ def benchmark_tiled_parameterized[
     test_size: Int, tile_size: Int
 ](mut b: Bencher) raises:
     var bench_ctx = DeviceContext()
-    comptime layout = Layout.row_major(test_size)
+    comptime bench_layout = row_major[test_size]()
+    comptime BenchLayoutType = type_of(bench_layout)
     var out = bench_ctx.enqueue_create_buffer[dtype](test_size)
     out.enqueue_fill(0)
     var a = bench_ctx.enqueue_create_buffer[dtype](test_size)
@@ -225,15 +230,21 @@ def benchmark_tiled_parameterized[
             a_host[i] = Scalar[dtype](2 * i)
             b_host[i] = Scalar[dtype](2 * i + 1)
 
-    var a_tensor = LayoutTensor[mut=False, dtype, layout](a.unsafe_ptr())
-    var b_tensor = LayoutTensor[mut=False, dtype, layout](b_buf.unsafe_ptr())
-    var out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
+    var a_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](a, bench_layout)
+    var b_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](b_buf, bench_layout)
+    var out_tensor = TileTensor[mut=True, dtype, BenchLayoutType, MutAnyOrigin](
+        out, bench_layout
+    )
 
     @parameter
     @always_inline
     def tiled_workflow(ctx: DeviceContext) raises:
         tiled_elementwise_add[
-            layout, dtype, SIMD_WIDTH, rank, test_size, tile_size
+            BenchLayoutType, dtype, SIMD_WIDTH, rank, test_size, tile_size
         ](out_tensor, a_tensor, b_tensor, ctx)
 
     b.iter_custom[tiled_workflow](bench_ctx)
@@ -247,7 +258,8 @@ def benchmark_manual_vectorized_parameterized[
     test_size: Int, tile_size: Int
 ](mut b: Bencher) raises:
     var bench_ctx = DeviceContext()
-    comptime layout = Layout.row_major(test_size)
+    comptime bench_layout = row_major[test_size]()
+    comptime BenchLayoutType = type_of(bench_layout)
     var out = bench_ctx.enqueue_create_buffer[dtype](test_size)
     out.enqueue_fill(0)
     var a = bench_ctx.enqueue_create_buffer[dtype](test_size)
@@ -260,15 +272,21 @@ def benchmark_manual_vectorized_parameterized[
             a_host[i] = Scalar[dtype](2 * i)
             b_host[i] = Scalar[dtype](2 * i + 1)
 
-    var a_tensor = LayoutTensor[mut=False, dtype, layout](a.unsafe_ptr())
-    var b_tensor = LayoutTensor[mut=False, dtype, layout](b_buf.unsafe_ptr())
-    var out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
+    var a_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](a, bench_layout)
+    var b_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](b_buf, bench_layout)
+    var out_tensor = TileTensor[mut=True, dtype, BenchLayoutType, MutAnyOrigin](
+        out, bench_layout
+    )
 
     @parameter
     @always_inline
     def manual_vectorized_workflow(ctx: DeviceContext) raises:
         manual_vectorized_tiled_elementwise_add[
-            layout, dtype, SIMD_WIDTH, 1, rank, test_size, tile_size
+            BenchLayoutType, dtype, SIMD_WIDTH, 1, rank, test_size, tile_size
         ](out_tensor, a_tensor, b_tensor, ctx)
 
     b.iter_custom[manual_vectorized_workflow](bench_ctx)
@@ -282,7 +300,8 @@ def benchmark_vectorized_parameterized[
     test_size: Int, tile_size: Int
 ](mut b: Bencher) raises:
     var bench_ctx = DeviceContext()
-    comptime layout = Layout.row_major(test_size)
+    comptime bench_layout = row_major[test_size]()
+    comptime BenchLayoutType = type_of(bench_layout)
     var out = bench_ctx.enqueue_create_buffer[dtype](test_size)
     out.enqueue_fill(0)
     var a = bench_ctx.enqueue_create_buffer[dtype](test_size)
@@ -295,15 +314,21 @@ def benchmark_vectorized_parameterized[
             a_host[i] = Scalar[dtype](2 * i)
             b_host[i] = Scalar[dtype](2 * i + 1)
 
-    var a_tensor = LayoutTensor[mut=False, dtype, layout](a.unsafe_ptr())
-    var b_tensor = LayoutTensor[mut=False, dtype, layout](b_buf.unsafe_ptr())
-    var out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
+    var a_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](a, bench_layout)
+    var b_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](b_buf, bench_layout)
+    var out_tensor = TileTensor[mut=True, dtype, BenchLayoutType, MutAnyOrigin](
+        out, bench_layout
+    )
 
     @parameter
     @always_inline
     def vectorized_workflow(ctx: DeviceContext) raises:
         vectorize_within_tiles_elementwise_add[
-            layout, dtype, SIMD_WIDTH, 1, rank, test_size, tile_size
+            BenchLayoutType, dtype, SIMD_WIDTH, 1, rank, test_size, tile_size
         ](out_tensor, a_tensor, b_tensor, ctx)
 
     b.iter_custom[vectorized_workflow](bench_ctx)
@@ -328,8 +353,12 @@ def main() raises:
             b_host[i] = Scalar[dtype](2 * i + 1)
             expected[i] = a_host[i] + b_host[i]
 
-    var a_tensor = LayoutTensor[mut=False, dtype, layout](a.unsafe_ptr())
-    var b_tensor = LayoutTensor[mut=False, dtype, layout](b.unsafe_ptr())
+    var a_tensor = TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin](
+        a, layout
+    )
+    var b_tensor = TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin](
+        b, layout
+    )
 
     ctx.synchronize()
 
@@ -337,8 +366,10 @@ def main() raises:
     print("simd_width:", SIMD_WIDTH)
 
     if argv()[1] == "--elementwise":
-        out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
-        elementwise_add[layout, dtype, SIMD_WIDTH, rank, SIZE](
+        var out_tensor = TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin](
+            out, layout
+        )
+        elementwise_add[LayoutType, dtype, SIMD_WIDTH, rank, SIZE](
             out_tensor, a_tensor, b_tensor, ctx
         )
 
@@ -350,11 +381,13 @@ def main() raises:
             print("Puzzle 23 complete ✅")
 
     elif argv()[1] == "--tiled":
-        out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
-        print("tile size:", TILE_SIZE)
-        tiled_elementwise_add[layout, dtype, SIMD_WIDTH, rank, SIZE, TILE_SIZE](
-            out_tensor, a_tensor, b_tensor, ctx
+        var out_tensor = TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin](
+            out, layout
         )
+        print("tile size:", TILE_SIZE)
+        tiled_elementwise_add[
+            LayoutType, dtype, SIMD_WIDTH, rank, SIZE, TILE_SIZE
+        ](out_tensor, a_tensor, b_tensor, ctx)
 
         with out.map_to_host() as out_host:
             print("out:", out_host)
@@ -364,10 +397,12 @@ def main() raises:
             print("Puzzle 23 complete ✅")
 
     elif argv()[1] == "--manual-vectorized":
-        out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
+        var out_tensor = TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin](
+            out, layout
+        )
         print("tile size:", TILE_SIZE)
         manual_vectorized_tiled_elementwise_add[
-            layout, dtype, SIMD_WIDTH, 1, rank, SIZE, TILE_SIZE
+            LayoutType, dtype, SIMD_WIDTH, 1, rank, SIZE, TILE_SIZE
         ](out_tensor, a_tensor, b_tensor, ctx)
 
         with out.map_to_host() as out_host:
@@ -378,10 +413,12 @@ def main() raises:
             print("Puzzle 23 complete ✅")
 
     elif argv()[1] == "--vectorized":
-        out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
+        var out_tensor = TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin](
+            out, layout
+        )
         print("tile size:", TILE_SIZE)
         vectorize_within_tiles_elementwise_add[
-            layout, dtype, SIMD_WIDTH, 1, rank, SIZE, TILE_SIZE
+            LayoutType, dtype, SIMD_WIDTH, 1, rank, SIZE, TILE_SIZE
         ](out_tensor, a_tensor, b_tensor, ctx)
 
         with out.map_to_host() as out_host:
diff --git a/problems/p24/p24.mojo b/problems/p24/p24.mojo
index 10ae8958..ed901d15 100644
--- a/problems/p24/p24.mojo
+++ b/problems/p24/p24.mojo
@@ -4,7 +4,9 @@ from std.gpu.host import DeviceContext, HostBuffer, DeviceBuffer
 from std.gpu.memory import AddressSpace
 from std.gpu.primitives.warp import sum as warp_sum, WARP_SIZE
 from std.algorithm.functional import elementwise
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.utils import IndexList
 from std.sys import argv, simd_width_of, align_of
 from std.testing import assert_equal
@@ -27,26 +29,25 @@ comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (WARP_SIZE, 1)
 comptime dtype = DType.float32
 comptime SIMD_WIDTH = simd_width_of[dtype]()
-comptime in_layout = Layout.row_major(SIZE)
-comptime out_layout = Layout.row_major(1)
+comptime in_layout = row_major[SIZE]()
+comptime InLayoutType = type_of(in_layout)
+comptime out_layout = row_major[1]()
+comptime OutLayoutType = type_of(out_layout)
 
 
 def traditional_dot_product_p12_style[
-    in_layout: Layout, out_layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, InLayoutType, ImmutAnyOrigin],
 ):
     """
     This is the complex approach from p12_layout_tensor.mojo - kept for comparison.
     """
-    var shared = LayoutTensor[
-        dtype,
-        Layout.row_major(WARP_SIZE),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[WARP_SIZE]())
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
 
@@ -73,11 +74,11 @@ def traditional_dot_product_p12_style[
 
 # ANCHOR: simple_warp_kernel
 def simple_warp_dot_product[
-    in_layout: Layout, out_layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, InLayoutType, ImmutAnyOrigin],
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     # FILL IN (6 lines at most)
@@ -88,16 +89,14 @@ def simple_warp_dot_product[
 
 # ANCHOR: functional_warp_approach
 def functional_warp_dot_product[
-    layout: Layout,
-    out_layout: Layout,
     dtype: DType,
     simd_width: Int,
     rank: Int,
     size: Int,
 ](
-    output: LayoutTensor[mut=True, dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
-    b: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayoutType, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, InLayoutType, MutAnyOrigin],
     ctx: DeviceContext,
 ) raises:
     @parameter
@@ -162,8 +161,10 @@ def benchmark_simple_warp_parameterized[
     test_size: Int
 ](mut bencher: Bencher) raises:
     comptime n_warps = test_size // WARP_SIZE
-    comptime in_layout = Layout.row_major(test_size)
-    comptime out_layout = Layout.row_major(n_warps)
+    comptime bench_in_layout = row_major[test_size]()
+    comptime BenchInLayoutType = type_of(bench_in_layout)
+    comptime bench_out_layout = row_major[n_warps]()
+    comptime BenchOutLayoutType = type_of(bench_out_layout)
     comptime n_threads = WARP_SIZE
     comptime n_blocks = (ceildiv(test_size, n_threads), 1)
 
@@ -182,16 +183,18 @@ def benchmark_simple_warp_parameterized[
     rand_int[dtype, test_size](b)
     expected_output[dtype, n_warps](expected, a, b)
 
-    var a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-    var b_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](b)
-    var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
+    var a_tensor = TileTensor[
+        mut=False, dtype, BenchInLayoutType, ImmutAnyOrigin
+    ](a, bench_in_layout)
+    var b_tensor = TileTensor[
+        mut=False, dtype, BenchInLayoutType, ImmutAnyOrigin
+    ](b, bench_in_layout)
+    var out_tensor = TileTensor(out, bench_out_layout)
 
     @parameter
     @always_inline
     def traditional_workflow(ctx: DeviceContext) raises:
-        comptime kernel = simple_warp_dot_product[
-            in_layout, out_layout, test_size
-        ]
+        comptime kernel = simple_warp_dot_product[test_size]
         ctx.enqueue_function[kernel, kernel](
             out_tensor,
             a_tensor,
@@ -214,8 +217,10 @@ def benchmark_functional_warp_parameterized[
     test_size: Int
 ](mut bencher: Bencher) raises:
     comptime n_warps = test_size // WARP_SIZE
-    comptime in_layout = Layout.row_major(test_size)
-    comptime out_layout = Layout.row_major(n_warps)
+    comptime bench_in_layout = row_major[test_size]()
+    comptime BenchInLayoutType = type_of(bench_in_layout)
+    comptime bench_out_layout = row_major[n_warps]()
+    comptime BenchOutLayoutType = type_of(bench_out_layout)
 
     var bench_ctx = DeviceContext()
 
@@ -232,16 +237,20 @@ def benchmark_functional_warp_parameterized[
     rand_int[dtype, test_size](b)
     expected_output[dtype, n_warps](expected, a, b)
 
-    var a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-    var b_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](b)
-    var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
+    var a_tensor = TileTensor[
+        mut=False, dtype, BenchInLayoutType, ImmutAnyOrigin
+    ](a, bench_in_layout)
+    var b_tensor = TileTensor[
+        mut=False, dtype, BenchInLayoutType, ImmutAnyOrigin
+    ](b, bench_in_layout)
+    var out_tensor = TileTensor(out, bench_out_layout)
 
     @parameter
     @always_inline
     def functional_warp_workflow(ctx: DeviceContext) raises:
-        functional_warp_dot_product[
-            in_layout, out_layout, dtype, SIMD_WIDTH, 1, test_size
-        ](out_tensor, a_tensor, b_tensor, ctx)
+        functional_warp_dot_product[dtype, SIMD_WIDTH, 1, test_size](
+            out_tensor, a_tensor, b_tensor, ctx
+        )
 
     bencher.iter_custom[functional_warp_workflow](bench_ctx)
     check_result[dtype, n_warps](out, expected)
@@ -257,8 +266,10 @@ def benchmark_traditional_parameterized[
     test_size: Int
 ](mut bencher: Bencher) raises:
     comptime n_warps = test_size // WARP_SIZE
-    comptime in_layout = Layout.row_major(test_size)
-    comptime out_layout = Layout.row_major(n_warps)
+    comptime bench_in_layout = row_major[test_size]()
+    comptime BenchInLayoutType = type_of(bench_in_layout)
+    comptime bench_out_layout = row_major[n_warps]()
+    comptime BenchOutLayoutType = type_of(bench_out_layout)
     comptime n_blocks = (ceildiv(test_size, WARP_SIZE), 1)
 
     var bench_ctx = DeviceContext()
@@ -276,16 +287,20 @@ def benchmark_traditional_parameterized[
     rand_int[dtype, test_size](b)
     expected_output[dtype, n_warps](expected, a, b)
 
-    var a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-    var b_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](b)
-    var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
+    var a_tensor = TileTensor[
+        mut=False, dtype, BenchInLayoutType, ImmutAnyOrigin
+    ](a, bench_in_layout)
+    var b_tensor = TileTensor[
+        mut=False, dtype, BenchInLayoutType, ImmutAnyOrigin
+    ](b, bench_in_layout)
+    var out_tensor = TileTensor(out, bench_out_layout)
 
     @parameter
     @always_inline
     def traditional_workflow(ctx: DeviceContext) raises:
         ctx.enqueue_function[
-            traditional_dot_product_p12_style[in_layout, out_layout, test_size],
-            traditional_dot_product_p12_style[in_layout, out_layout, test_size],
+            traditional_dot_product_p12_style[test_size],
+            traditional_dot_product_p12_style[test_size],
         ](
             out_tensor,
             a_tensor,
@@ -318,9 +333,13 @@ def main() raises:
             var expected = ctx.enqueue_create_host_buffer[dtype](n_warps)
             expected.enqueue_fill(0)
 
-            var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
-            var a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-            var b_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](b)
+            var out_tensor = TileTensor(out, out_layout)
+            var a_tensor = TileTensor[
+                mut=False, dtype, InLayoutType, ImmutAnyOrigin
+            ](a, in_layout)
+            var b_tensor = TileTensor[
+                mut=False, dtype, InLayoutType, ImmutAnyOrigin
+            ](b, in_layout)
 
             with a.map_to_host() as a_host, b.map_to_host() as b_host:
                 for i in range(SIZE):
@@ -329,12 +348,8 @@ def main() raises:
 
             if argv()[1] == "--traditional":
                 ctx.enqueue_function[
-                    traditional_dot_product_p12_style[
-                        in_layout, out_layout, SIZE
-                    ],
-                    traditional_dot_product_p12_style[
-                        in_layout, out_layout, SIZE
-                    ],
+                    traditional_dot_product_p12_style[SIZE],
+                    traditional_dot_product_p12_style[SIZE],
                 ](
                     out_tensor,
                     a_tensor,
@@ -344,8 +359,8 @@ def main() raises:
                 )
             elif argv()[1] == "--kernel":
                 ctx.enqueue_function[
-                    simple_warp_dot_product[in_layout, out_layout, SIZE],
-                    simple_warp_dot_product[in_layout, out_layout, SIZE],
+                    simple_warp_dot_product[SIZE],
+                    simple_warp_dot_product[SIZE],
                 ](
                     out_tensor,
                     a_tensor,
@@ -354,9 +369,9 @@ def main() raises:
                     block_dim=THREADS_PER_BLOCK,
                 )
             elif argv()[1] == "--functional":
-                functional_warp_dot_product[
-                    in_layout, out_layout, dtype, SIMD_WIDTH, 1, SIZE
-                ](out_tensor, a_tensor, b_tensor, ctx)
+                functional_warp_dot_product[dtype, SIMD_WIDTH, 1, SIZE](
+                    out_tensor, a_tensor, b_tensor, ctx
+                )
             expected_output[dtype, n_warps](expected, a, b)
             check_result[dtype, n_warps, True](out, expected)
             print("Puzzle 24 complete ✅")
diff --git a/problems/p25/p25.mojo b/problems/p25/p25.mojo
index 8aaa6edf..ba29aa7e 100644
--- a/problems/p25/p25.mojo
+++ b/problems/p25/p25.mojo
@@ -1,7 +1,8 @@
 from std.gpu import thread_idx, block_idx, block_dim, lane_id
 from std.gpu.host import DeviceContext
 from std.gpu.primitives.warp import shuffle_down, broadcast, WARP_SIZE
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
 from std.sys import argv
 from std.testing import assert_equal, assert_almost_equal
 
@@ -10,14 +11,15 @@ comptime SIZE = WARP_SIZE
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (WARP_SIZE, 1)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 def neighbor_difference[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     """
     Compute finite differences: output[i] = input[i+1] - input[i]
@@ -36,14 +38,15 @@ def neighbor_difference[
 comptime SIZE_2 = 64
 comptime BLOCKS_PER_GRID_2 = (2, 1)
 comptime THREADS_PER_BLOCK_2 = (WARP_SIZE, 1)
-comptime layout_2 = Layout.row_major(SIZE_2)
+comptime layout_2 = row_major[SIZE_2]()
+comptime LayoutType_2 = type_of(layout_2)
 
 
 def moving_average_3[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType_2, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType_2, ImmutAnyOrigin],
 ):
     """
     Compute 3-point moving average: output[i] = (input[i] + input[i+1] + input[i+2]) / 3
@@ -61,10 +64,10 @@ def moving_average_3[
 
 # ANCHOR: broadcast_shuffle_coordination
 def broadcast_shuffle_coordination[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     """
     Combine broadcast() and shuffle_down() for advanced warp coordination.
@@ -74,7 +77,7 @@ def broadcast_shuffle_coordination[
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var lane = Int(lane_id())
     if global_i < size:
-        var scale_factor: output.element_type = 0.0
+        var scale_factor: output.ElementType = 0.0
 
         # FILL IN (roughly 14 lines)
 
@@ -84,10 +87,10 @@ def broadcast_shuffle_coordination[
 
 # ANCHOR: basic_broadcast
 def basic_broadcast[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     """
     Basic broadcast: Lane 0 computes a block-local value, broadcasts it to all lanes.
@@ -96,7 +99,7 @@ def basic_broadcast[
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var lane = Int(lane_id())
     if global_i < size:
-        var broadcast_value: output.element_type = 0.0
+        var broadcast_value: output.ElementType = 0.0
 
         # FILL IN (roughly 10 lines)
 
@@ -106,10 +109,10 @@ def basic_broadcast[
 
 # ANCHOR: conditional_broadcast
 def conditional_broadcast[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     """
     Conditional broadcast: Lane 0 makes a decision based on block-local data, broadcasts it to all lanes.
@@ -118,7 +121,7 @@ def conditional_broadcast[
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var lane = Int(lane_id())
     if global_i < size:
-        var decision_value: output.element_type = 0.0
+        var decision_value: output.ElementType = 0.0
 
         # FILL IN (roughly 10 lines)
 
@@ -145,14 +148,12 @@ def test_neighbor_difference() raises:
             for i in range(SIZE):
                 input_host[i] = Scalar[dtype](i * i)
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
-        )
+        var input_tensor = TileTensor[
+            mut=False, dtype, LayoutType, ImmutAnyOrigin
+        ](input_buf, layout)
+        var output_tensor = TileTensor(output_buf, layout)
 
-        comptime kernel = neighbor_difference[layout, SIZE]
+        comptime kernel = neighbor_difference[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -193,14 +194,12 @@ def test_moving_average() raises:
             for i in range(1, SIZE_2):
                 input_host[i] = input_host[i - 1] + Scalar[dtype](i + 1)
 
-        var input_tensor = LayoutTensor[dtype, layout_2, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout_2, MutAnyOrigin](
-            output_buf
-        )
+        var input_tensor = TileTensor[
+            mut=False, dtype, LayoutType_2, ImmutAnyOrigin
+        ](input_buf, layout_2)
+        var output_tensor = TileTensor(output_buf, layout_2)
 
-        comptime kernel = moving_average_3[layout_2, SIZE_2]
+        comptime kernel = moving_average_3[SIZE_2]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -263,14 +262,12 @@ def test_broadcast_shuffle_coordination() raises:
                 else:
                     input_host[i] = Scalar[dtype](((i - 4) % 4) * 2 + 1)
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
-        )
+        var input_tensor = TileTensor[
+            mut=False, dtype, LayoutType, ImmutAnyOrigin
+        ](input_buf, layout)
+        var output_tensor = TileTensor(output_buf, layout)
 
-        comptime kernel = broadcast_shuffle_coordination[layout, SIZE]
+        comptime kernel = broadcast_shuffle_coordination[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -317,14 +314,12 @@ def test_basic_broadcast() raises:
             for i in range(SIZE):
                 input_host[i] = Scalar[dtype](i + 1)
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
-        )
+        var input_tensor = TileTensor[
+            mut=False, dtype, LayoutType, ImmutAnyOrigin
+        ](input_buf, layout)
+        var output_tensor = TileTensor(output_buf, layout)
 
-        comptime kernel = basic_broadcast[layout, SIZE]
+        comptime kernel = basic_broadcast[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -377,14 +372,12 @@ def test_conditional_broadcast() raises:
             for i in range(SIZE):
                 input_host[i] = test_values[i % len(test_values)]
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
-        )
+        var input_tensor = TileTensor[
+            mut=False, dtype, LayoutType, ImmutAnyOrigin
+        ](input_buf, layout)
+        var output_tensor = TileTensor(output_buf, layout)
 
-        comptime kernel = conditional_broadcast[layout, SIZE]
+        comptime kernel = conditional_broadcast[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
diff --git a/problems/p26/p26.mojo b/problems/p26/p26.mojo
index d4e82266..33e127fe 100644
--- a/problems/p26/p26.mojo
+++ b/problems/p26/p26.mojo
@@ -1,7 +1,8 @@
 from std.gpu import thread_idx, block_idx, block_dim, lane_id
 from std.gpu.host import DeviceContext
 from std.gpu.primitives.warp import shuffle_xor, prefix_sum, WARP_SIZE
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
 from std.sys import argv
 from std.testing import assert_equal, assert_almost_equal
 
@@ -10,14 +11,15 @@ comptime SIZE = WARP_SIZE
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (WARP_SIZE, 1)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 def butterfly_pair_swap[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     """
     Basic butterfly pair swap: Exchange values between adjacent pairs using XOR pattern.
@@ -35,10 +37,10 @@ def butterfly_pair_swap[
 
 # ANCHOR: butterfly_parallel_max
 def butterfly_parallel_max[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     """
     Parallel maximum reduction using butterfly pattern.
@@ -59,14 +61,15 @@ def butterfly_parallel_max[
 comptime SIZE_2 = 64
 comptime BLOCKS_PER_GRID_2 = (2, 1)
 comptime THREADS_PER_BLOCK_2 = (WARP_SIZE, 1)
-comptime layout_2 = Layout.row_major(SIZE_2)
+comptime layout_2 = row_major[SIZE_2]()
+comptime LayoutType_2 = type_of(layout_2)
 
 
 def butterfly_conditional_max[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType_2, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType_2, ImmutAnyOrigin],
 ):
     """
     Conditional butterfly maximum: Perform butterfly max reduction, but only store result
@@ -88,10 +91,10 @@ def butterfly_conditional_max[
 
 # ANCHOR: warp_inclusive_prefix_sum
 def warp_inclusive_prefix_sum[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     """
     Inclusive prefix sum using warp primitive:
@@ -123,10 +126,10 @@ def warp_inclusive_prefix_sum[
 
 # ANCHOR: warp_partition
 def warp_partition[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     pivot: Float32,
 ):
     """
@@ -167,14 +170,12 @@ def test_butterfly_pair_swap() raises:
             for i in range(SIZE):
                 input_host[i] = Scalar[dtype](i)
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
-        )
+        var input_tensor = TileTensor[
+            mut=False, dtype, LayoutType, ImmutAnyOrigin
+        ](input_buf, layout)
+        var output_tensor = TileTensor(output_buf, layout)
 
-        comptime kernel = butterfly_pair_swap[layout, SIZE]
+        comptime kernel = butterfly_pair_swap[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -218,14 +219,12 @@ def test_butterfly_parallel_max() raises:
             # Make sure we have a clear maximum
             input_host[SIZE - 1] = 1000.0
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
-        )
+        var input_tensor = TileTensor[
+            mut=False, dtype, LayoutType, ImmutAnyOrigin
+        ](input_buf, layout)
+        var output_tensor = TileTensor(output_buf, layout)
 
-        comptime kernel = butterfly_parallel_max[layout, SIZE]
+        comptime kernel = butterfly_parallel_max[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -264,14 +263,12 @@ def test_butterfly_conditional_max() raises:
                 else:
                     input_host[i] = Scalar[dtype](i % 10)
 
-        var input_tensor = LayoutTensor[dtype, layout_2, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout_2, MutAnyOrigin](
-            output_buf
-        )
+        var input_tensor = TileTensor[
+            mut=False, dtype, LayoutType_2, ImmutAnyOrigin
+        ](input_buf, layout_2)
+        var output_tensor = TileTensor(output_buf, layout_2)
 
-        comptime kernel = butterfly_conditional_max[layout_2, SIZE_2]
+        comptime kernel = butterfly_conditional_max[SIZE_2]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -324,14 +321,12 @@ def test_warp_inclusive_prefix_sum() raises:
             for i in range(SIZE):
                 input_host[i] = Scalar[dtype](i + 1)
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
-        )
+        var input_tensor = TileTensor[
+            mut=False, dtype, LayoutType, ImmutAnyOrigin
+        ](input_buf, layout)
+        var output_tensor = TileTensor(output_buf, layout)
 
-        comptime kernel = warp_inclusive_prefix_sum[layout, SIZE]
+        comptime kernel = warp_inclusive_prefix_sum[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -390,14 +385,12 @@ def test_warp_partition() raises:
             for i in range(SIZE):
                 input_host[i] = Scalar[dtype](test_values[i % len(test_values)])
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
-        )
+        var input_tensor = TileTensor[
+            mut=False, dtype, LayoutType, ImmutAnyOrigin
+        ](input_buf, layout)
+        var output_tensor = TileTensor(output_buf, layout)
 
-        comptime kernel = warp_partition[layout, SIZE]
+        comptime kernel = warp_partition[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
diff --git a/problems/p27/p27.mojo b/problems/p27/p27.mojo
index 78835fc3..6dbbd7de 100644
--- a/problems/p27/p27.mojo
+++ b/problems/p27/p27.mojo
@@ -4,7 +4,9 @@ from std.gpu.primitives.warp import WARP_SIZE
 from std.gpu.primitives import block
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.sys import argv
 from std.testing import assert_equal
 from std.math import floor
@@ -12,22 +14,19 @@ from std.math import floor
 
 # ANCHOR: traditional_dot_product
 def traditional_dot_product[
-    in_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, InLayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     """Traditional dot product using shared memory + barriers + tree reduction.
     Educational but complex - shows the manual coordination needed."""
 
-    var shared = LayoutTensor[
-        dtype,
-        Layout.row_major(tpb),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[tpb]())
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
 
@@ -58,17 +57,19 @@ def traditional_dot_product[
 comptime SIZE = 128
 comptime TPB = 128
 comptime NUM_BINS = 8
-comptime in_layout = Layout.row_major(SIZE)
-comptime out_layout = Layout.row_major(1)
+comptime in_layout = row_major[SIZE]()
+comptime InLayoutType = type_of(in_layout)
+comptime out_layout = row_major[1]()
+comptime OutLayoutType = type_of(out_layout)
 comptime dtype = DType.float32
 
 
 def block_sum_dot_product[
-    in_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, InLayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     """Dot product using block.sum() - convenience function like warp.sum()!
@@ -83,15 +84,18 @@ def block_sum_dot_product[
 # ANCHOR_END: block_sum_dot_product
 
 # ANCHOR: block_histogram
-comptime bin_layout = Layout.row_major(SIZE)  # Max SIZE elements per bin
+comptime bin_layout = row_major[SIZE]()  # Max SIZE elements per bin
+comptime BinLayoutType = type_of(bin_layout)
 
 
 def block_histogram_bin_extract[
-    in_layout: Layout, bin_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    input_data: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    bin_output: LayoutTensor[dtype, bin_layout, MutAnyOrigin],
-    count_output: LayoutTensor[DType.int32, out_layout, MutAnyOrigin],
+    input_data: TileTensor[mut=False, dtype, InLayoutType, ImmutAnyOrigin],
+    bin_output: TileTensor[mut=True, dtype, BinLayoutType, MutAnyOrigin],
+    count_output: TileTensor[
+        mut=True, DType.int32, OutLayoutType, MutAnyOrigin
+    ],
     size: Int,
     target_bin: Int,
     num_bins: Int,
@@ -133,14 +137,15 @@ def block_histogram_bin_extract[
 
 # ANCHOR: block_normalize
 
-comptime vector_layout = Layout.row_major(SIZE)
+comptime vector_layout = row_major[SIZE]()
+comptime VectorLayoutType = type_of(vector_layout)
 
 
 def block_normalize_vector[
-    in_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    input_data: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    output_data: LayoutTensor[dtype, out_layout, MutAnyOrigin],
+    input_data: TileTensor[mut=False, dtype, InLayoutType, ImmutAnyOrigin],
+    output_data: TileTensor[mut=True, dtype, VectorLayoutType, MutAnyOrigin],
     size: Int,
 ):
     """Vector mean normalization using block.sum() + block.broadcast() combination.
@@ -208,14 +213,16 @@ def main() raises:
             print("TPB:", TPB)
             print("Expected result:", expected)
 
-            a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-            b_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](b_buf)
-            out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
+            a_tensor = TileTensor[
+                mut=False, dtype, InLayoutType, ImmutAnyOrigin
+            ](a, in_layout)
+            b_tensor = TileTensor[
+                mut=False, dtype, InLayoutType, ImmutAnyOrigin
+            ](b_buf, in_layout)
+            out_tensor = TileTensor(out, out_layout)
 
             # Traditional approach: works perfectly when size == TPB
-            comptime kernel = traditional_dot_product[
-                in_layout, out_layout, TPB
-            ]
+            comptime kernel = traditional_dot_product[TPB]
             ctx.enqueue_function[kernel, kernel](
                 out_tensor,
                 a_tensor,
@@ -253,12 +260,16 @@ def main() raises:
             print("TPB:", TPB)
             print("Expected result:", expected)
 
-            a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-            b_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](b_buf)
-            out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
+            a_tensor = TileTensor[
+                mut=False, dtype, InLayoutType, ImmutAnyOrigin
+            ](a, in_layout)
+            b_tensor = TileTensor[
+                mut=False, dtype, InLayoutType, ImmutAnyOrigin
+            ](b_buf, in_layout)
+            out_tensor = TileTensor(out, out_layout)
 
             # Block.sum(): Same result with dramatically simpler code!
-            comptime kernel = block_sum_dot_product[in_layout, out_layout, TPB]
+            comptime kernel = block_sum_dot_product[TPB]
             ctx.enqueue_function[kernel, kernel](
                 out_tensor,
                 a_tensor,
@@ -307,9 +318,9 @@ def main() raises:
             print("...")
             print()
 
-            input_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](
-                input_buf
-            )
+            input_tensor = TileTensor[
+                mut=False, dtype, InLayoutType, ImmutAnyOrigin
+            ](input_buf, in_layout)
 
             # Demonstrate histogram for each bin using block.prefix_sum()
             for target_bin in range(NUM_BINS):
@@ -329,17 +340,11 @@ def main() raises:
                 var bin_count = ctx.enqueue_create_buffer[DType.int32](1)
                 bin_count.enqueue_fill(0)
 
-                var bin_tensor = LayoutTensor[dtype, bin_layout, MutAnyOrigin](
-                    bin_data
-                )
-                var count_tensor = LayoutTensor[
-                    DType.int32, out_layout, MutAnyOrigin
-                ](bin_count)
+                var bin_tensor = TileTensor(bin_data, bin_layout)
+                var count_tensor = TileTensor(bin_count, out_layout)
 
                 # Execute histogram kernel for this specific bin
-                comptime kernel = block_histogram_bin_extract[
-                    in_layout, bin_layout, out_layout, TPB
-                ]
+                comptime kernel = block_histogram_bin_extract[TPB]
                 ctx.enqueue_function[kernel, kernel](
                     input_tensor,
                     bin_tensor,
@@ -405,17 +410,13 @@ def main() raises:
             print("Mean value:", mean_value)
             print()
 
-            input_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](
-                input_buf
-            )
-            var output_tensor = LayoutTensor[
-                dtype, vector_layout, MutAnyOrigin
-            ](output_buf)
+            input_tensor = TileTensor[
+                mut=False, dtype, InLayoutType, ImmutAnyOrigin
+            ](input_buf, in_layout)
+            var output_tensor = TileTensor(output_buf, vector_layout)
 
             # Execute vector normalization kernel
-            comptime kernel = block_normalize_vector[
-                in_layout, vector_layout, TPB
-            ]
+            comptime kernel = block_normalize_vector[TPB]
             ctx.enqueue_function[kernel, kernel](
                 input_tensor,
                 output_tensor,
diff --git a/problems/p28/p28.mojo b/problems/p28/p28.mojo
index 86b48d7c..ec1c8928 100644
--- a/problems/p28/p28.mojo
+++ b/problems/p28/p28.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_idx, block_dim, grid_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace, async_copy_wait_all
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from layout.layout_tensor import copy_dram_to_sram_async
 from std.sys import argv, info
 from std.testing import assert_equal, assert_almost_equal
@@ -17,15 +19,18 @@ comptime BLOCKS_PER_GRID_ASYNC = (
 ) // CONV_TILE_SIZE
 comptime THREADS_PER_BLOCK_ASYNC = 256
 comptime dtype = DType.float32
-comptime layout_async = Layout.row_major(VECTOR_SIZE)
+comptime layout_async = row_major[VECTOR_SIZE]()
+comptime LayoutAsyncType = type_of(layout_async)
+comptime kernel_layout = row_major[KERNEL_SIZE]()
+comptime KernelLayoutType = type_of(kernel_layout)
 
 
 def async_copy_overlap_convolution[
-    dtype: DType, layout: Layout
+    dtype: DType
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    kernel: LayoutTensor[dtype, Layout.row_major(KERNEL_SIZE), ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutAsyncType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutAsyncType, ImmutAnyOrigin],
+    kernel: TileTensor[mut=False, dtype, KernelLayoutType, ImmutAnyOrigin],
 ):
     """Demonstrates async copy operations building on p14 patterns.
 
@@ -34,18 +39,12 @@ def async_copy_overlap_convolution[
     """
 
     # Shared memory buffers (like p14, but without .fill(0) to avoid race)
-    var input_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(CONV_TILE_SIZE),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var kernel_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(KERNEL_SIZE),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var input_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[CONV_TILE_SIZE]())
+    var kernel_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[KERNEL_SIZE]())
 
     # FILL IN HERE (roughly 19 lines)
 
@@ -73,17 +72,15 @@ def test_async_copy_overlap_convolution() raises:
             for i in range(KERNEL_SIZE):
                 kernel_host[i] = Scalar[dtype](i + 1)
 
-        var input_tensor = LayoutTensor[dtype, layout_async, ImmutAnyOrigin](
-            input_buf
+        var input_tensor = TileTensor[
+            mut=False, dtype, LayoutAsyncType, ImmutAnyOrigin
+        ](input_buf, layout_async)
+        var output_tensor = TileTensor(output_buf, layout_async)
+        var kernel_tensor = TileTensor[mut=False, dtype, KernelLayoutType](
+            kernel_buf, kernel_layout
         )
-        var output_tensor = LayoutTensor[dtype, layout_async, MutAnyOrigin](
-            output_buf
-        )
-        var kernel_tensor = LayoutTensor[
-            mut=False, dtype, Layout.row_major(KERNEL_SIZE)
-        ](kernel_buf)
 
-        comptime kernel = async_copy_overlap_convolution[dtype, layout_async]
+        comptime kernel = async_copy_overlap_convolution[dtype]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
diff --git a/problems/p29/p29.mojo b/problems/p29/p29.mojo
index a645526f..89156067 100644
--- a/problems/p29/p29.mojo
+++ b/problems/p29/p29.mojo
@@ -9,7 +9,9 @@ from std.gpu.sync import (
 )
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace, async_copy_wait_all
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from layout.layout_tensor import copy_dram_to_sram_async
 from std.sys import argv, info
 from std.testing import assert_true, assert_almost_equal
@@ -21,7 +23,8 @@ comptime SIZE = 1024  # Image size (1D for simplicity)
 comptime BLOCKS_PER_GRID = (4, 1)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 # Multi-stage processing configuration
 comptime STAGE1_THREADS = TPB // 2
@@ -29,11 +32,9 @@ comptime STAGE2_THREADS = TPB // 2
 comptime BLUR_RADIUS = 2
 
 
-def multi_stage_image_blur_pipeline[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def multi_stage_image_blur_pipeline(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     """Multi-stage image blur pipeline with barrier coordination.
@@ -44,18 +45,12 @@ def multi_stage_image_blur_pipeline[
     """
 
     # Shared memory buffers for pipeline stages
-    var input_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var blur_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var input_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
+    var blur_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
 
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
@@ -88,11 +83,9 @@ comptime STENCIL_ITERATIONS = 3
 comptime BUFFER_COUNT = 2
 
 
-def double_buffered_stencil_computation[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def double_buffered_stencil_computation(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     """Double-buffered stencil computation with memory barrier coordination.
@@ -102,38 +95,23 @@ def double_buffered_stencil_computation[
     """
 
     # Double-buffering: Two shared memory buffers
-    var buffer_A = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var buffer_B = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var buffer_A = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
+    var buffer_B = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
 
     # Memory barriers for coordinating buffer swaps
-    var init_barrier = LayoutTensor[
-        DType.uint64,
-        Layout.row_major(1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var iter_barrier = LayoutTensor[
-        DType.uint64,
-        Layout.row_major(1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var final_barrier = LayoutTensor[
-        DType.uint64,
-        Layout.row_major(1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var init_barrier = stack_allocation[
+        dtype=DType.uint64, address_space=AddressSpace.SHARED
+    ](row_major[1]())
+    var iter_barrier = stack_allocation[
+        dtype=DType.uint64, address_space=AddressSpace.SHARED
+    ](row_major[1]())
+    var final_barrier = stack_allocation[
+        dtype=DType.uint64, address_space=AddressSpace.SHARED
+    ](row_major[1]())
 
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
@@ -205,11 +183,13 @@ def test_multi_stage_pipeline() raises:
                 # Create a simple wave pattern for blurring
                 inp_host[i] = Scalar[dtype](i % 10) + Scalar[dtype](i) / 100.0
 
-        # Create LayoutTensors
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var inp_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp)
+        # Create TileTensors
+        var out_tensor = TileTensor(out, layout)
+        var inp_tensor = TileTensor[
+            mut=False, dtype, LayoutType, ImmutAnyOrigin
+        ](inp, layout)
 
-        comptime kernel = multi_stage_image_blur_pipeline[layout]
+        comptime kernel = multi_stage_image_blur_pipeline
         ctx.enqueue_function[kernel, kernel](
             out_tensor,
             inp_tensor,
@@ -267,11 +247,13 @@ def test_double_buffered_stencil() raises:
                 # Create a step pattern that will be smoothed by stencil
                 inp_host[i] = Scalar[dtype](1.0 if i % 20 < 10 else 0.0)
 
-        # Create LayoutTensors for Puzzle 29B
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var inp_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp)
+        # Create TileTensors for Puzzle 29B
+        var out_tensor = TileTensor(out, layout)
+        var inp_tensor = TileTensor[
+            mut=False, dtype, LayoutType, ImmutAnyOrigin
+        ](inp, layout)
 
-        comptime kernel = double_buffered_stencil_computation[layout]
+        comptime kernel = double_buffered_stencil_computation
         ctx.enqueue_function[kernel, kernel](
             out_tensor,
             inp_tensor,
diff --git a/problems/p30/p30.mojo b/problems/p30/p30.mojo
index 57ca41dd..4cee7205 100644
--- a/problems/p30/p30.mojo
+++ b/problems/p30/p30.mojo
@@ -1,6 +1,7 @@
 from std.gpu import thread_idx, block_dim, block_idx
 from std.gpu.host import DeviceContext
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
 from std.sys import argv
 from std.testing import assert_almost_equal
 from std.benchmark import Bench, BenchConfig, Bencher, BenchId, keep
@@ -12,16 +13,15 @@ comptime BLOCKS_PER_GRID = (
     1,
 )  # Enough blocks to cover all elements
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 # ANCHOR: kernel1
-def kernel1[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def kernel1(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     var i = block_dim.x * block_idx.x + thread_idx.x
@@ -33,12 +33,10 @@ def kernel1[
 
 
 # ANCHOR: kernel2
-def kernel2[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def kernel2(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     var tid = block_idx.x * block_dim.x + thread_idx.x
@@ -54,12 +52,10 @@ def kernel2[
 
 
 # ANCHOR: kernel3
-def kernel3[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def kernel3(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     var tid = block_idx.x * block_dim.x + thread_idx.x
@@ -81,7 +77,8 @@ def benchmark_kernel1_parameterized[test_size: Int](mut b: Bencher) raises:
     @parameter
     @always_inline
     def kernel1_workflow(ctx: DeviceContext) raises:
-        comptime layout = Layout.row_major(test_size)
+        comptime layout = row_major[test_size]()
+        comptime LayoutType = type_of(layout)
         var out = ctx.enqueue_create_buffer[dtype](test_size)
         out.enqueue_fill(0)
         var a = ctx.enqueue_create_buffer[dtype](test_size)
@@ -94,11 +91,11 @@ def benchmark_kernel1_parameterized[test_size: Int](mut b: Bencher) raises:
                 a_host[i] = Scalar[dtype](i + 1)
                 b_host[i] = Scalar[dtype](i + 2)
 
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-        var b_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](b_buf)
+        var out_tensor = TileTensor(out, layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+        var b_tensor = TileTensor[mut=False, dtype, LayoutType](b_buf, layout)
 
-        ctx.enqueue_function[kernel1[layout], kernel1[layout]](
+        ctx.enqueue_function[kernel1, kernel1](
             out_tensor,
             a_tensor,
             b_tensor,
@@ -119,7 +116,8 @@ def benchmark_kernel2_parameterized[test_size: Int](mut b: Bencher) raises:
     @parameter
     @always_inline
     def kernel2_workflow(ctx: DeviceContext) raises:
-        comptime layout = Layout.row_major(test_size)
+        comptime layout = row_major[test_size]()
+        comptime LayoutType = type_of(layout)
         var out = ctx.enqueue_create_buffer[dtype](test_size)
         out.enqueue_fill(0)
         var a = ctx.enqueue_create_buffer[dtype](test_size)
@@ -132,11 +130,11 @@ def benchmark_kernel2_parameterized[test_size: Int](mut b: Bencher) raises:
                 a_host[i] = Scalar[dtype](i + 1)
                 b_host[i] = Scalar[dtype](i + 2)
 
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-        var b_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](b_buf)
+        var out_tensor = TileTensor(out, layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+        var b_tensor = TileTensor[mut=False, dtype, LayoutType](b_buf, layout)
 
-        ctx.enqueue_function[kernel2[layout], kernel2[layout]](
+        ctx.enqueue_function[kernel2, kernel2](
             out_tensor,
             a_tensor,
             b_tensor,
@@ -157,7 +155,8 @@ def benchmark_kernel3_parameterized[test_size: Int](mut b: Bencher) raises:
     @parameter
     @always_inline
     def kernel3_workflow(ctx: DeviceContext) raises:
-        comptime layout = Layout.row_major(test_size)
+        comptime layout = row_major[test_size]()
+        comptime LayoutType = type_of(layout)
         var out = ctx.enqueue_create_buffer[dtype](test_size)
         out.enqueue_fill(0)
         var a = ctx.enqueue_create_buffer[dtype](test_size)
@@ -170,11 +169,11 @@ def benchmark_kernel3_parameterized[test_size: Int](mut b: Bencher) raises:
                 a_host[i] = Scalar[dtype](i + 1)
                 b_host[i] = Scalar[dtype](i + 2)
 
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-        var b_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](b_buf)
+        var out_tensor = TileTensor(out, layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+        var b_tensor = TileTensor[mut=False, dtype, LayoutType](b_buf, layout)
 
-        ctx.enqueue_function[kernel3[layout], kernel3[layout]](
+        ctx.enqueue_function[kernel3, kernel3](
             out_tensor,
             a_tensor,
             b_tensor,
@@ -206,12 +205,12 @@ def test_kernel1() raises:
                 a_host[i] = Scalar[dtype](i + 1)
                 b_host[i] = Scalar[dtype](i + 2)
 
-        # Create LayoutTensors
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-        var b_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](b)
+        # Create TileTensors
+        var out_tensor = TileTensor(out, layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+        var b_tensor = TileTensor[mut=False, dtype, LayoutType](b, layout)
 
-        ctx.enqueue_function[kernel1[layout], kernel1[layout]](
+        ctx.enqueue_function[kernel1, kernel1](
             out_tensor,
             a_tensor,
             b_tensor,
@@ -249,12 +248,12 @@ def test_kernel2() raises:
                 a_host[i] = Scalar[dtype](i + 1)
                 b_host[i] = Scalar[dtype](i + 2)
 
-        # Create LayoutTensors
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-        var b_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](b)
+        # Create TileTensors
+        var out_tensor = TileTensor(out, layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+        var b_tensor = TileTensor[mut=False, dtype, LayoutType](b, layout)
 
-        ctx.enqueue_function[kernel2[layout], kernel2[layout]](
+        ctx.enqueue_function[kernel2, kernel2](
             out_tensor,
             a_tensor,
             b_tensor,
@@ -295,12 +294,12 @@ def test_kernel3() raises:
                 a_host[i] = Scalar[dtype](i + 1)
                 b_host[i] = Scalar[dtype](i + 2)
 
-        # Create LayoutTensors
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-        var b_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](b)
+        # Create TileTensors
+        var out_tensor = TileTensor(out, layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+        var b_tensor = TileTensor[mut=False, dtype, LayoutType](b, layout)
 
-        ctx.enqueue_function[kernel3[layout], kernel3[layout]](
+        ctx.enqueue_function[kernel3, kernel3](
             out_tensor,
             a_tensor,
             b_tensor,
diff --git a/problems/p31/p31.mojo b/problems/p31/p31.mojo
index d70f583b..36930648 100644
--- a/problems/p31/p31.mojo
+++ b/problems/p31/p31.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_dim, block_idx, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.sys import argv
 from std.testing import assert_almost_equal
 from std.benchmark import Bench, BenchConfig, Bencher, BenchId, keep
@@ -11,15 +13,14 @@ comptime SIZE = 32 * 1024 * 1024  # 32M elements - larger workload to show occup
 comptime THREADS_PER_BLOCK = (1024, 1)
 comptime BLOCKS_PER_GRID = (SIZE // 1024, 1)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 comptime ALPHA = Scalar[dtype](2.5)  # SAXPY coefficient
 
 
-def minimal_kernel[
-    layout: Layout
-](
-    y: LayoutTensor[dtype, layout, MutAnyOrigin],
-    x: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def minimal_kernel(
+    y: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    x: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     alpha: Float32,
     size: Int,
 ):
@@ -35,23 +36,20 @@ def minimal_kernel[
 
 
 # ANCHOR: sophisticated_kernel
-def sophisticated_kernel[
-    layout: Layout
-](
-    y: LayoutTensor[dtype, layout, MutAnyOrigin],
-    x: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def sophisticated_kernel(
+    y: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    x: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     alpha: Float32,
     size: Int,
 ):
     """Sophisticated SAXPY kernel - over-engineered with excessive resource usage.
     """
     # Maximum shared memory allocation (close to 48KB limit)
-    var shared_cache = LayoutTensor[
-        dtype,
-        Layout.row_major(1024 * 12),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()  # 48KB
+    var shared_cache = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](
+        row_major[1024 * 12]()
+    )  # 48KB
 
     var i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
@@ -132,23 +130,20 @@ def sophisticated_kernel[
 
 
 # ANCHOR: balanced_kernel
-def balanced_kernel[
-    layout: Layout
-](
-    y: LayoutTensor[dtype, layout, MutAnyOrigin],
-    x: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def balanced_kernel(
+    y: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    x: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     alpha: Float32,
     size: Int,
 ):
     """Balanced SAXPY kernel - efficient optimization with moderate resources.
     """
     # Reasonable shared memory usage for effective caching (16KB)
-    var shared_cache = LayoutTensor[
-        dtype,
-        Layout.row_major(1024 * 4),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()  # 16KB total
+    var shared_cache = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](
+        row_major[1024 * 4]()
+    )  # 16KB total
 
     var i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
@@ -195,7 +190,8 @@ def benchmark_minimal_parameterized[test_size: Int](mut b: Bencher) raises:
     @parameter
     @always_inline
     def minimal_workflow(ctx: DeviceContext) raises:
-        comptime layout = Layout.row_major(test_size)
+        comptime layout = row_major[test_size]()
+        comptime LayoutType = type_of(layout)
         var y = ctx.enqueue_create_buffer[dtype](test_size)
         y.enqueue_fill(0)
         var x = ctx.enqueue_create_buffer[dtype](test_size)
@@ -206,10 +202,10 @@ def benchmark_minimal_parameterized[test_size: Int](mut b: Bencher) raises:
                 x_host[i] = Scalar[dtype](i + 1)
                 y_host[i] = Scalar[dtype](i + 2)
 
-        var y_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](y)
-        var x_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](x)
+        var y_tensor = TileTensor(y, layout)
+        var x_tensor = TileTensor[mut=False, dtype, LayoutType](x, layout)
 
-        comptime kernel = minimal_kernel[layout]
+        comptime kernel = minimal_kernel
         ctx.enqueue_function[kernel, kernel](
             y_tensor,
             x_tensor,
@@ -233,7 +229,8 @@ def benchmark_sophisticated_parameterized[
     @parameter
     @always_inline
     def sophisticated_workflow(ctx: DeviceContext) raises:
-        comptime layout = Layout.row_major(test_size)
+        comptime layout = row_major[test_size]()
+        comptime LayoutType = type_of(layout)
         var y = ctx.enqueue_create_buffer[dtype](test_size)
         y.enqueue_fill(0)
         var x = ctx.enqueue_create_buffer[dtype](test_size)
@@ -244,10 +241,10 @@ def benchmark_sophisticated_parameterized[
                 x_host[i] = Scalar[dtype](i + 1)
                 y_host[i] = Scalar[dtype](i + 2)
 
-        var y_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](y)
-        var x_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](x)
+        var y_tensor = TileTensor(y, layout)
+        var x_tensor = TileTensor[mut=False, dtype, LayoutType](x, layout)
 
-        comptime kernel = sophisticated_kernel[layout]
+        comptime kernel = sophisticated_kernel
         ctx.enqueue_function[kernel, kernel](
             y_tensor,
             x_tensor,
@@ -269,7 +266,8 @@ def benchmark_balanced_parameterized[test_size: Int](mut b: Bencher) raises:
     @parameter
     @always_inline
     def balanced_workflow(ctx: DeviceContext) raises:
-        comptime layout = Layout.row_major(test_size)
+        comptime layout = row_major[test_size]()
+        comptime LayoutType = type_of(layout)
         var y = ctx.enqueue_create_buffer[dtype](test_size)
         y.enqueue_fill(0)
         var x = ctx.enqueue_create_buffer[dtype](test_size)
@@ -280,10 +278,10 @@ def benchmark_balanced_parameterized[test_size: Int](mut b: Bencher) raises:
                 x_host[i] = Scalar[dtype](i + 1)
                 y_host[i] = Scalar[dtype](i + 2)
 
-        var y_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](y)
-        var x_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](x)
+        var y_tensor = TileTensor(y, layout)
+        var x_tensor = TileTensor[mut=False, dtype, LayoutType](x, layout)
 
-        comptime kernel = balanced_kernel[layout]
+        comptime kernel = balanced_kernel
         ctx.enqueue_function[kernel, kernel](
             y_tensor,
             x_tensor,
@@ -314,11 +312,11 @@ def test_minimal() raises:
                 x_host[i] = Scalar[dtype](i + 1)
                 y_host[i] = Scalar[dtype](i + 2)
 
-        # Create LayoutTensors
-        var y_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](y)
-        var x_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](x)
+        # Create TileTensors
+        var y_tensor = TileTensor(y, layout)
+        var x_tensor = TileTensor[mut=False, dtype, LayoutType](x, layout)
 
-        comptime kernel = minimal_kernel[layout]
+        comptime kernel = minimal_kernel
         ctx.enqueue_function[kernel, kernel](
             y_tensor,
             x_tensor,
@@ -357,11 +355,11 @@ def test_sophisticated() raises:
                 x_host[i] = Scalar[dtype](i + 1)
                 y_host[i] = Scalar[dtype](i + 2)
 
-        # Create LayoutTensors
-        var y_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](y)
-        var x_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](x)
+        # Create TileTensors
+        var y_tensor = TileTensor(y, layout)
+        var x_tensor = TileTensor[mut=False, dtype, LayoutType](x, layout)
 
-        comptime kernel = sophisticated_kernel[layout]
+        comptime kernel = sophisticated_kernel
         ctx.enqueue_function[kernel, kernel](
             y_tensor,
             x_tensor,
@@ -401,11 +399,11 @@ def test_balanced() raises:
                 x_host[i] = Scalar[dtype](i + 1)
                 y_host[i] = Scalar[dtype](i + 2)
 
-        # Create LayoutTensors
-        var y_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](y)
-        var x_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](x)
+        # Create TileTensors
+        var y_tensor = TileTensor(y, layout)
+        var x_tensor = TileTensor[mut=False, dtype, LayoutType](x, layout)
 
-        comptime kernel = balanced_kernel[layout]
+        comptime kernel = balanced_kernel
         ctx.enqueue_function[kernel, kernel](
             y_tensor,
             x_tensor,
diff --git a/problems/p32/p32.mojo b/problems/p32/p32.mojo
index 21e3c543..d8b406af 100644
--- a/problems/p32/p32.mojo
+++ b/problems/p32/p32.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_dim, block_idx, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.sys import argv
 from std.testing import assert_almost_equal
 from std.benchmark import Bench, BenchConfig, Bencher, BenchId, keep
@@ -12,14 +14,13 @@ comptime TPB = 256  # Threads per block - divisible by 32 (warp size)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime BLOCKS_PER_GRID = (SIZE // TPB, 1)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 
-def no_conflict_kernel[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def no_conflict_kernel(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     """Perfect shared memory access - no bank conflicts.
@@ -29,12 +30,9 @@ def no_conflict_kernel[
     """
 
     # Shared memory buffer - each thread loads one element
-    var shared_buf = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_buf = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
 
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
@@ -58,26 +56,21 @@ def no_conflict_kernel[
 
 
 # ANCHOR: two_way_conflict_kernel
-def two_way_conflict_kernel[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def two_way_conflict_kernel(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     """Stride-2 shared memory access - creates 2-way bank conflicts.
 
-    Threads 0,16 → Bank 0, Threads 1,17 → Bank 1, etc.
+    Threads 0,16 -> Bank 0, Threads 1,17 -> Bank 1, etc.
     Each bank serves 2 threads, doubling access time.
     """
 
     # Shared memory buffer - stride-2 access pattern creates conflicts
-    var shared_buf = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_buf = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
 
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
@@ -111,7 +104,8 @@ def benchmark_no_conflict[test_size: Int](mut b: Bencher) raises:
     @parameter
     @always_inline
     def kernel_workflow(ctx: DeviceContext) raises:
-        comptime layout = Layout.row_major(test_size)
+        comptime layout = row_major[test_size]()
+        comptime LayoutType = type_of(layout)
         var out = ctx.enqueue_create_buffer[dtype](test_size)
         out.enqueue_fill(0)
         var input_buf = ctx.enqueue_create_buffer[dtype](test_size)
@@ -121,12 +115,12 @@ def benchmark_no_conflict[test_size: Int](mut b: Bencher) raises:
             for i in range(test_size):
                 input_host[i] = Scalar[dtype](i + 1)
 
-        var out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
-        var input_tensor = LayoutTensor[mut=False, dtype, layout](
-            input_buf.unsafe_ptr()
+        var out_tensor = TileTensor(out, layout)
+        var input_tensor = TileTensor[mut=False, dtype, LayoutType](
+            input_buf, layout
         )
 
-        comptime kernel = no_conflict_kernel[layout]
+        comptime kernel = no_conflict_kernel
         ctx.enqueue_function[kernel, kernel](
             out_tensor,
             input_tensor,
@@ -147,7 +141,8 @@ def benchmark_two_way_conflict[test_size: Int](mut b: Bencher) raises:
     @parameter
     @always_inline
     def kernel_workflow(ctx: DeviceContext) raises:
-        comptime layout = Layout.row_major(test_size)
+        comptime layout = row_major[test_size]()
+        comptime LayoutType = type_of(layout)
         var out = ctx.enqueue_create_buffer[dtype](test_size)
         out.enqueue_fill(0)
         var input_buf = ctx.enqueue_create_buffer[dtype](test_size)
@@ -157,12 +152,12 @@ def benchmark_two_way_conflict[test_size: Int](mut b: Bencher) raises:
             for i in range(test_size):
                 input_host[i] = Scalar[dtype](i + 1)
 
-        var out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
-        var input_tensor = LayoutTensor[mut=False, dtype, layout](
-            input_buf.unsafe_ptr()
+        var out_tensor = TileTensor(out, layout)
+        var input_tensor = TileTensor[mut=False, dtype, LayoutType](
+            input_buf, layout
         )
 
-        comptime kernel = two_way_conflict_kernel[layout]
+        comptime kernel = two_way_conflict_kernel
         ctx.enqueue_function[kernel, kernel](
             out_tensor,
             input_tensor,
@@ -189,12 +184,12 @@ def test_no_conflict() raises:
             for i in range(SIZE):
                 input_host[i] = Scalar[dtype](i + 1)
 
-        var out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
-        var input_tensor = LayoutTensor[mut=False, dtype, layout](
-            input_buf.unsafe_ptr()
+        var out_tensor = TileTensor(out, layout)
+        var input_tensor = TileTensor[mut=False, dtype, LayoutType](
+            input_buf, layout
         )
 
-        comptime kernel = no_conflict_kernel[layout]
+        comptime kernel = no_conflict_kernel
         ctx.enqueue_function[kernel, kernel](
             out_tensor,
             input_tensor,
@@ -223,12 +218,12 @@ def test_two_way_conflict() raises:
             for i in range(SIZE):
                 input_host[i] = Scalar[dtype](i + 1)
 
-        var out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
-        var input_tensor = LayoutTensor[mut=False, dtype, layout](
-            input_buf.unsafe_ptr()
+        var out_tensor = TileTensor(out, layout)
+        var input_tensor = TileTensor[mut=False, dtype, LayoutType](
+            input_buf, layout
         )
 
-        comptime kernel = two_way_conflict_kernel[layout]
+        comptime kernel = two_way_conflict_kernel
         ctx.enqueue_function[kernel, kernel](
             out_tensor,
             input_tensor,
diff --git a/problems/p33/p33.mojo b/problems/p33/p33.mojo
index 9ffa00a4..1e18af61 100644
--- a/problems/p33/p33.mojo
+++ b/problems/p33/p33.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_idx, block_dim, barrier, WARP_SIZE
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace, async_copy_wait_all
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from layout.tensor_core import TensorCore
 from layout.layout_tensor import copy_dram_to_sram_async
 from std.utils import Index
@@ -10,7 +12,8 @@ from std.testing import assert_equal, assert_almost_equal
 
 comptime dtype = DType.float32
 comptime SIZE = 1024
-comptime layout = Layout.row_major(SIZE, SIZE)
+comptime layout = row_major[SIZE, SIZE]()
+comptime LayoutType = type_of(layout)
 comptime BLOCK_DIM_COUNT = 2
 
 comptime TILE_SIZE = 32
@@ -23,11 +26,11 @@ comptime THREADS_PER_BLOCK_TILED = (TILE_SIZE, TILE_SIZE)
 
 # ANCHOR: matmul_idiomatic_tiled_solution
 def matmul_idiomatic_tiled[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     # Use block_dim to get actual tile size dynamically
     var tile_size_x = block_dim.x
@@ -40,23 +43,17 @@ def matmul_idiomatic_tiled[
 
     # Get the tile of the output matrix that this thread block is responsible for
     var out_tile = output.tile[TILE_SIZE, TILE_SIZE](block_idx.y, block_idx.x)
-    var a_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TILE_SIZE, TILE_SIZE),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var b_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TILE_SIZE, TILE_SIZE),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-
-    var acc: output.element_type = 0
-
-    comptime load_a_layout = Layout.row_major(1, TILE_SIZE)  # Coalesced loading
-    comptime load_b_layout = Layout.row_major(1, TILE_SIZE)  # Coalesced loading
+    var a_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TILE_SIZE, TILE_SIZE]())
+    var b_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TILE_SIZE, TILE_SIZE]())
+
+    var acc: output.ElementType = 0
+
+    comptime load_a_layout = row_major[1, TILE_SIZE]()  # Coalesced loading
+    comptime load_b_layout = row_major[1, TILE_SIZE]()  # Coalesced loading
     # Note: Both matrices stored in same orientation for correct matrix multiplication
     # Transposed loading would be useful if B were pre-transposed in global memory
 
@@ -121,9 +118,6 @@ comptime BLOCKS_PER_GRID_TENSOR_CORE = (
 
 def tensor_core_matrix_multiplication[
     dtype: DType,
-    layout_a: Layout,
-    layout_b: Layout,
-    layout_c: Layout,
     BM: Int,
     BN: Int,
     BK: Int,
@@ -133,13 +127,13 @@ def tensor_core_matrix_multiplication[
     MMA_N: Int,
     MMA_K: Int,
 ](
-    A: LayoutTensor[dtype, layout_a, ImmutAnyOrigin],
-    B: LayoutTensor[dtype, layout_b, ImmutAnyOrigin],
-    C: LayoutTensor[dtype, layout_c, MutAnyOrigin],
+    A: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
+    B: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
+    C: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
 ):
-    comptime M = C.shape[0]()
-    comptime N = C.shape[1]()
-    comptime K = A.shape[1]()
+    comptime M = C.dim[0]()
+    comptime N = C.dim[1]()
+    comptime K = A.dim[1]()
 
     var warp_id = thread_idx.x // WARP_SIZE
     var warps_in_n = BN // WN
@@ -155,26 +149,17 @@ def tensor_core_matrix_multiplication[
     var mma_op = TensorCore[A.dtype, C.dtype, Index(MMA_M, MMA_N, MMA_K)]()
 
     # Shared SRAM tiles (no padding to stay under shared memory limit)
-    var A_sram_tile = LayoutTensor[
-        A.dtype,
-        Layout.row_major(BM, BK),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var B_sram_tile = LayoutTensor[
-        B.dtype,
-        Layout.row_major(BK, BN),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var A_sram_tile = stack_allocation[
+        dtype=A.dtype, address_space=AddressSpace.SHARED
+    ](row_major[BM, BK]())
+    var B_sram_tile = stack_allocation[
+        dtype=B.dtype, address_space=AddressSpace.SHARED
+    ](row_major[BK, BN]())
 
     # One per-warp accumulator tile of shape [WM, WN]
-    var C_warp_accum = LayoutTensor[
-        C.dtype,
-        Layout.row_major(WM, WN),
-        MutAnyOrigin,
-        address_space=AddressSpace.GENERIC,
-    ].stack_allocation()
+    var C_warp_accum = stack_allocation[
+        dtype=C.dtype, address_space=AddressSpace.GENERIC
+    ](row_major[WM, WN]())
 
     # Zero initialize accumulator (only for active warps)
     if warp_is_active:
@@ -190,12 +175,12 @@ def tensor_core_matrix_multiplication[
         var B_dram_tile = B.tile[BK, BN](k_i, block_idx.x)
 
         copy_dram_to_sram_async[
-            thread_layout=Layout.row_major(4, 8),
+            thread_layout=row_major[4, 8](),
             num_threads=256,
             block_dim_count=BLOCK_DIM_COUNT,
         ](A_sram_tile.vectorize[1, 4](), A_dram_tile.vectorize[1, 4]())
         copy_dram_to_sram_async[
-            thread_layout=Layout.row_major(4, 8),
+            thread_layout=row_major[4, 8](),
             num_threads=256,
             block_dim_count=BLOCK_DIM_COUNT,
         ](B_sram_tile.vectorize[1, 4](), B_dram_tile.vectorize[1, 4]())
@@ -274,19 +259,18 @@ def main() raises:
                             inp1_host[i * SIZE + k] * inp2_host[k * SIZE + j]
                         )
         # Create layout tensors
-        var out_tensor_core_layout = LayoutTensor[dtype, layout](
-            out_tensor_core.unsafe_ptr()
+        var out_tensor_core_layout = TileTensor(out_tensor_core, layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin](
+            inp1, layout
+        )
+        var b_tensor = TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin](
+            inp2, layout
         )
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp1)
-        var b_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp2)
 
         if mode == "--tensor-core":
             print("\n=== Running ACTUAL Tensor Core Matrix Multiplication ===")
             comptime kernel = tensor_core_matrix_multiplication[
                 dtype,
-                layout,
-                layout,
-                layout,
                 BM,
                 BN,
                 BK,
@@ -313,12 +297,10 @@ def main() raises:
             # Create separate buffer for tiled result
             out_tiled = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
             out_tiled.enqueue_fill(0)
-            out_tiled_layout = LayoutTensor[dtype, layout](
-                out_tiled.unsafe_ptr()
-            )
+            out_tiled_layout = TileTensor(out_tiled, layout)
 
             # Run idiomatic tiled version with proper 2D block configuration
-            comptime kernel = matmul_idiomatic_tiled[layout, SIZE]
+            comptime kernel = matmul_idiomatic_tiled[SIZE]
             ctx.enqueue_function[kernel, kernel](
                 out_tiled_layout,
                 a_tensor,
@@ -341,9 +323,6 @@ def main() raises:
             print("\n--- Test 1: Tensor Core vs CPU Reference ---")
             comptime kernel = tensor_core_matrix_multiplication[
                 dtype,
-                layout,
-                layout,
-                layout,
                 BM,
                 BN,
                 BK,
@@ -420,11 +399,9 @@ def main() raises:
             print("\n--- Test 2: Idiomatic Tiled vs CPU Reference ---")
             out_tiled = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
             out_tiled.enqueue_fill(0)
-            out_tiled_layout = LayoutTensor[dtype, layout](
-                out_tiled.unsafe_ptr()
-            )
+            out_tiled_layout = TileTensor(out_tiled, layout)
 
-            comptime kernel2 = matmul_idiomatic_tiled[layout, SIZE]
+            comptime kernel2 = matmul_idiomatic_tiled[SIZE]
             ctx.enqueue_function[kernel2, kernel2](
                 out_tiled_layout,
                 a_tensor,
diff --git a/problems/p34/p34.mojo b/problems/p34/p34.mojo
index 373f9c13..71c5c9af 100644
--- a/problems/p34/p34.mojo
+++ b/problems/p34/p34.mojo
@@ -8,7 +8,9 @@ from std.gpu.primitives.cluster import (
     elect_one_sync,
 )
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.sys import argv
 from std.testing import assert_equal, assert_almost_equal, assert_true
 
@@ -16,16 +18,20 @@ comptime SIZE = 1024
 comptime TPB = 256
 comptime CLUSTER_SIZE = 4
 comptime dtype = DType.float32
-comptime in_layout = Layout.row_major(SIZE)
-comptime out_layout = Layout.row_major(1)
+comptime in_layout = row_major[SIZE]()
+comptime InLayoutType = type_of(in_layout)
+comptime out_layout = row_major[1]()
+comptime OutLayoutType = type_of(out_layout)
+comptime cluster_layout = row_major[CLUSTER_SIZE]()
+comptime ClusterLayoutType = type_of(cluster_layout)
 
 
 # ANCHOR: cluster_coordination_basics
 def cluster_coordination_basics[
-    in_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, ClusterLayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, InLayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     """Real cluster coordination using SM90+ cluster APIs."""
@@ -36,12 +42,9 @@ def cluster_coordination_basics[
     var my_block_rank = Int(block_rank_in_cluster())
     var block_id = block_idx.x
 
-    var shared_data = LayoutTensor[
-        dtype,
-        Layout.row_major(tpb),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_data = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[tpb]())
 
     # FIX: Use block_idx.x for data distribution instead of cluster rank
     # Each block should process different portions of the data
@@ -77,13 +80,11 @@ def cluster_coordination_basics[
 
 # ANCHOR: cluster_collective_operations
 def cluster_collective_operations[
-    in_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    temp_storage: LayoutTensor[
-        dtype, Layout.row_major(CLUSTER_SIZE), MutAnyOrigin
-    ],
+    output: TileTensor[mut=True, dtype, OutLayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, InLayoutType, ImmutAnyOrigin],
+    temp_storage: TileTensor[mut=True, dtype, ClusterLayoutType, MutAnyOrigin],
     size: Int,
 ):
     """Cluster-wide collective operations using real cluster APIs."""
@@ -98,10 +99,10 @@ def cluster_collective_operations[
 
 # ANCHOR: advanced_cluster_patterns
 def advanced_cluster_patterns[
-    in_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, ClusterLayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, InLayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     """Advanced cluster programming using cluster masks and relaxed synchronization.
@@ -135,16 +136,12 @@ def main() raises:
                 for i in range(SIZE):
                     input_host[i] = Scalar[dtype](i % 10) * 0.1
 
-            input_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](
-                input_buf
-            )
-            output_tensor = LayoutTensor[
-                dtype, Layout.row_major(CLUSTER_SIZE), MutAnyOrigin
-            ](output_buf)
+            input_tensor = TileTensor[
+                mut=False, dtype, InLayoutType, ImmutAnyOrigin
+            ](input_buf, in_layout)
+            output_tensor = TileTensor(output_buf, cluster_layout)
 
-            comptime kernel = cluster_coordination_basics[
-                in_layout, Layout.row_major(CLUSTER_SIZE), TPB
-            ]
+            comptime kernel = cluster_coordination_basics[TPB]
             ctx.enqueue_function[kernel, kernel](
                 output_tensor,
                 input_tensor,
@@ -199,19 +196,13 @@ def main() raises:
 
             print("Expected sum:", expected_sum)
 
-            input_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](
-                input_buf
-            )
-            var output_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](
-                output_buf
-            )
-            var temp_tensor = LayoutTensor[
-                dtype, Layout.row_major(CLUSTER_SIZE), MutAnyOrigin
-            ](temp_buf)
+            input_tensor = TileTensor[
+                mut=False, dtype, InLayoutType, ImmutAnyOrigin
+            ](input_buf, in_layout)
+            var output_tensor = TileTensor(output_buf, out_layout)
+            var temp_tensor = TileTensor(temp_buf, cluster_layout)
 
-            comptime kernel = cluster_collective_operations[
-                in_layout, out_layout, TPB
-            ]
+            comptime kernel = cluster_collective_operations[TPB]
             ctx.enqueue_function[kernel, kernel](
                 output_tensor,
                 input_tensor,
@@ -251,16 +242,12 @@ def main() raises:
                         Scalar[dtype](i % 50) * 0.02
                     )  # Pattern for testing
 
-            input_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](
-                input_buf
-            )
-            output_tensor = LayoutTensor[
-                dtype, Layout.row_major(CLUSTER_SIZE), MutAnyOrigin
-            ](output_buf)
+            input_tensor = TileTensor[
+                mut=False, dtype, InLayoutType, ImmutAnyOrigin
+            ](input_buf, in_layout)
+            output_tensor = TileTensor(output_buf, cluster_layout)
 
-            comptime kernel = advanced_cluster_patterns[
-                in_layout, Layout.row_major(CLUSTER_SIZE), TPB
-            ]
+            comptime kernel = advanced_cluster_patterns[TPB]
             ctx.enqueue_function[kernel, kernel](
                 output_tensor,
                 input_tensor,
diff --git a/solutions/p04/p04_layout_tensor.mojo b/solutions/p04/p04_tile_tensor.mojo
similarity index 70%
rename from solutions/p04/p04_layout_tensor.mojo
rename to solutions/p04/p04_tile_tensor.mojo
index 394b7a26..c47d4b94 100644
--- a/solutions/p04/p04_layout_tensor.mojo
+++ b/solutions/p04/p04_tile_tensor.mojo
@@ -1,19 +1,21 @@
 from std.gpu import thread_idx
 from std.gpu.host import DeviceContext
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
 from std.testing import assert_equal
 
 comptime SIZE = 2
 comptime BLOCKS_PER_GRID = 1
 comptime THREADS_PER_BLOCK = (3, 3)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE, SIZE)
+comptime layout = row_major[SIZE, SIZE]()
+comptime LayoutType = type_of(layout)
 
 
-# ANCHOR: add_10_2d_layout_tensor_solution
+# ANCHOR: add_10_2d_tile_tensor_solution
 def add_10_2d(
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
     size: Int,
 ):
     var row = thread_idx.y
@@ -22,17 +24,15 @@ def add_10_2d(
         output[row, col] = a[row, col] + 10.0
 
 
-# ANCHOR_END: add_10_2d_layout_tensor_solution
+# ANCHOR_END: add_10_2d_tile_tensor_solution
 
 
 def main() raises:
     with DeviceContext() as ctx:
         var out_buf = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
         out_buf.enqueue_fill(0)
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            out_buf
-        ).reshape[layout]()
-        print("out shape:", out_tensor.shape[0](), "x", out_tensor.shape[1]())
+        var out_tensor = TileTensor(out_buf, layout)
+        print("out shape:", out_tensor.dim[0](), "x", out_tensor.dim[1]())
 
         var expected = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
         expected.enqueue_fill(0)
@@ -44,9 +44,7 @@ def main() raises:
                 a_host[i] = Scalar[dtype](i)
                 expected[i] = a_host[i] + 10
 
-        var a_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](a).reshape[
-            layout
-        ]()
+        var a_tensor = TileTensor(a, layout)
 
         ctx.enqueue_function[add_10_2d, add_10_2d](
             out_tensor,
diff --git a/solutions/p05/p05.mojo b/solutions/p05/p05.mojo
index eeb61d5d..224a57e5 100644
--- a/solutions/p05/p05.mojo
+++ b/solutions/p05/p05.mojo
@@ -1,25 +1,32 @@
-from std.memory import UnsafePointer
 from std.gpu import thread_idx
 from std.gpu.host import DeviceContext
+from layout import TileTensor
+from layout.tile_layout import row_major
 from std.testing import assert_equal
 
 comptime SIZE = 2
 comptime BLOCKS_PER_GRID = 1
 comptime THREADS_PER_BLOCK = (3, 3)
 comptime dtype = DType.float32
+comptime out_layout = row_major[SIZE, SIZE]()
+comptime a_layout = row_major[1, SIZE]()
+comptime b_layout = row_major[SIZE, 1]()
+comptime OutLayout = type_of(out_layout)
+comptime ALayout = type_of(a_layout)
+comptime BLayout = type_of(b_layout)
 
 
 # ANCHOR: broadcast_add_solution
 def broadcast_add(
-    output: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    a: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    b: UnsafePointer[Scalar[dtype], MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, ALayout, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, BLayout, ImmutAnyOrigin],
     size: Int,
 ):
     var row = thread_idx.y
     var col = thread_idx.x
     if row < size and col < size:
-        output[row * size + col] = a[col] + b[row]
+        output[row, col] = a[0, col] + b[row, 0]
 
 
 # ANCHOR_END: broadcast_add_solution
@@ -27,10 +34,15 @@ def broadcast_add(
 
 def main() raises:
     with DeviceContext() as ctx:
-        var out = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
-        out.enqueue_fill(0)
-        var expected = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
-        expected.enqueue_fill(0)
+        var out_buf = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
+        out_buf.enqueue_fill(0)
+        var out_tensor = TileTensor(out_buf, out_layout)
+        print("out shape:", out_tensor.dim[0](), "x", out_tensor.dim[1]())
+
+        var expected_buf = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
+        expected_buf.enqueue_fill(0)
+        var expected_tensor = TileTensor(expected_buf, out_layout)
+
         var a = ctx.enqueue_create_buffer[dtype](SIZE)
         a.enqueue_fill(0)
         var b = ctx.enqueue_create_buffer[dtype](SIZE)
@@ -40,14 +52,17 @@ def main() raises:
                 a_host[i] = Scalar[dtype](i + 1)
                 b_host[i] = Scalar[dtype](i * 10)
 
-            for y in range(SIZE):
-                for x in range(SIZE):
-                    expected[y * SIZE + x] = a_host[x] + b_host[y]
+            for i in range(SIZE):
+                for j in range(SIZE):
+                    expected_tensor[i, j] = a_host[j] + b_host[i]
+
+        var a_tensor = TileTensor[mut=False, dtype, ALayout](a, a_layout)
+        var b_tensor = TileTensor[mut=False, dtype, BLayout](b, b_layout)
 
         ctx.enqueue_function[broadcast_add, broadcast_add](
-            out,
-            a,
-            b,
+            out_tensor,
+            a_tensor,
+            b_tensor,
             SIZE,
             grid_dim=BLOCKS_PER_GRID,
             block_dim=THREADS_PER_BLOCK,
@@ -55,10 +70,12 @@ def main() raises:
 
         ctx.synchronize()
 
-        with out.map_to_host() as out_host:
-            print("out:", out_host)
-            print("expected:", expected)
-            for y in range(SIZE):
-                for x in range(SIZE):
-                    assert_equal(out_host[y * SIZE + x], expected[y * SIZE + x])
+        with out_buf.map_to_host() as out_buf_host:
+            print("out:", out_buf_host)
+            print("expected:", expected_buf)
+            for i in range(SIZE):
+                for j in range(SIZE):
+                    assert_equal(
+                        out_buf_host[i * SIZE + j], expected_buf[i * SIZE + j]
+                    )
             print("Puzzle 05 complete ✅")
diff --git a/solutions/p05/p05_layout_tensor.mojo b/solutions/p05/p05_layout_tensor.mojo
deleted file mode 100644
index 3573c21d..00000000
--- a/solutions/p05/p05_layout_tensor.mojo
+++ /dev/null
@@ -1,84 +0,0 @@
-from std.gpu import thread_idx
-from std.gpu.host import DeviceContext
-from layout import Layout, LayoutTensor
-from std.testing import assert_equal
-
-comptime SIZE = 2
-comptime BLOCKS_PER_GRID = 1
-comptime THREADS_PER_BLOCK = (3, 3)
-comptime dtype = DType.float32
-comptime out_layout = Layout.row_major(SIZE, SIZE)
-comptime a_layout = Layout.row_major(1, SIZE)
-comptime b_layout = Layout.row_major(SIZE, 1)
-
-
-# ANCHOR: broadcast_add_layout_tensor_solution
-def broadcast_add[
-    out_layout: Layout,
-    a_layout: Layout,
-    b_layout: Layout,
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, a_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, b_layout, ImmutAnyOrigin],
-    size: Int,
-):
-    var row = thread_idx.y
-    var col = thread_idx.x
-    if row < size and col < size:
-        output[row, col] = a[0, col] + b[row, 0]
-
-
-# ANCHOR_END: broadcast_add_layout_tensor_solution
-
-
-def main() raises:
-    with DeviceContext() as ctx:
-        var out_buf = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
-        out_buf.enqueue_fill(0)
-        var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out_buf)
-        print("out shape:", out_tensor.shape[0](), "x", out_tensor.shape[1]())
-
-        var expected_buf = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
-        expected_buf.enqueue_fill(0)
-        var expected_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](
-            expected_buf
-        )
-
-        var a = ctx.enqueue_create_buffer[dtype](SIZE)
-        a.enqueue_fill(0)
-        var b = ctx.enqueue_create_buffer[dtype](SIZE)
-        b.enqueue_fill(0)
-        with a.map_to_host() as a_host, b.map_to_host() as b_host:
-            for i in range(SIZE):
-                a_host[i] = Scalar[dtype](i + 1)
-                b_host[i] = Scalar[dtype](i * 10)
-
-            for i in range(SIZE):
-                for j in range(SIZE):
-                    expected_tensor[i, j] = a_host[j] + b_host[i]
-
-        var a_tensor = LayoutTensor[dtype, a_layout, ImmutAnyOrigin](a)
-        var b_tensor = LayoutTensor[dtype, b_layout, ImmutAnyOrigin](b)
-
-        comptime kernel = broadcast_add[out_layout, a_layout, b_layout]
-        ctx.enqueue_function[kernel, kernel](
-            out_tensor,
-            a_tensor,
-            b_tensor,
-            SIZE,
-            grid_dim=BLOCKS_PER_GRID,
-            block_dim=THREADS_PER_BLOCK,
-        )
-
-        ctx.synchronize()
-
-        with out_buf.map_to_host() as out_buf_host:
-            print("out:", out_buf_host)
-            print("expected:", expected_buf)
-            for i in range(SIZE):
-                for j in range(SIZE):
-                    assert_equal(
-                        out_buf_host[i * SIZE + j], expected_buf[i * SIZE + j]
-                    )
-            print("Puzzle 05 complete ✅")
diff --git a/solutions/p07/p07.mojo b/solutions/p07/p07.mojo
index 35639053..9523bb37 100644
--- a/solutions/p07/p07.mojo
+++ b/solutions/p07/p07.mojo
@@ -1,24 +1,29 @@
-from std.memory import UnsafePointer
 from std.gpu import thread_idx, block_idx, block_dim
 from std.gpu.host import DeviceContext
+from layout import TileTensor
+from layout.tile_layout import row_major
 from std.testing import assert_equal
 
 comptime SIZE = 5
 comptime BLOCKS_PER_GRID = (2, 2)
 comptime THREADS_PER_BLOCK = (3, 3)
 comptime dtype = DType.float32
+comptime out_layout = row_major[SIZE, SIZE]()
+comptime a_layout = row_major[SIZE, SIZE]()
+comptime OutLayout = type_of(out_layout)
+comptime ALayout = type_of(a_layout)
 
 
 # ANCHOR: add_10_blocks_2d_solution
 def add_10_blocks_2d(
-    output: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    a: UnsafePointer[Scalar[dtype], MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, ALayout, ImmutAnyOrigin],
     size: Int,
 ):
     var row = block_dim.y * block_idx.y + thread_idx.y
     var col = block_dim.x * block_idx.x + thread_idx.x
     if row < size and col < size:
-        output[row * size + col] = a[row * size + col] + 10.0
+        output[row, col] = a[row, col] + 10.0
 
 
 # ANCHOR_END: add_10_blocks_2d_solution
@@ -26,10 +31,13 @@ def add_10_blocks_2d(
 
 def main() raises:
     with DeviceContext() as ctx:
-        var out = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
-        out.enqueue_fill(0)
-        var expected = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
-        expected.enqueue_fill(1)
+        var out_buf = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
+        out_buf.enqueue_fill(0)
+        var out_tensor = TileTensor(out_buf, out_layout)
+
+        var expected_buf = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
+        expected_buf.enqueue_fill(1)
+
         var a = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
         a.enqueue_fill(1)
 
@@ -38,11 +46,13 @@ def main() raises:
                 for i in range(SIZE):
                     var k = j * SIZE + i
                     a_host[k] = Scalar[dtype](k)
-                    expected[k] = Scalar[dtype](k + 10)
+                    expected_buf[k] = Scalar[dtype](k + 10)
+
+        var a_tensor = TileTensor[mut=False, dtype, ALayout](a, a_layout)
 
         ctx.enqueue_function[add_10_blocks_2d, add_10_blocks_2d](
-            out,
-            a,
+            out_tensor,
+            a_tensor,
             SIZE,
             grid_dim=BLOCKS_PER_GRID,
             block_dim=THREADS_PER_BLOCK,
@@ -50,10 +60,17 @@ def main() raises:
 
         ctx.synchronize()
 
-        with out.map_to_host() as out_host:
-            print("out:", out_host)
-            print("expected:", expected)
+        var expected_tensor = TileTensor(expected_buf, out_layout)
+
+        with out_buf.map_to_host() as out_buf_host:
+            print(
+                "out:",
+                TileTensor(out_buf_host, out_layout),
+            )
+            print("expected:", expected_tensor)
             for i in range(SIZE):
                 for j in range(SIZE):
-                    assert_equal(out_host[i * SIZE + j], expected[i * SIZE + j])
+                    assert_equal(
+                        out_buf_host[i * SIZE + j], expected_buf[i * SIZE + j]
+                    )
             print("Puzzle 07 complete ✅")
diff --git a/solutions/p07/p07_layout_tensor.mojo b/solutions/p07/p07_layout_tensor.mojo
deleted file mode 100644
index 2f1b397f..00000000
--- a/solutions/p07/p07_layout_tensor.mojo
+++ /dev/null
@@ -1,79 +0,0 @@
-from std.gpu import thread_idx, block_idx, block_dim
-from std.gpu.host import DeviceContext
-from layout import Layout, LayoutTensor
-from std.testing import assert_equal
-
-comptime SIZE = 5
-comptime BLOCKS_PER_GRID = (2, 2)
-comptime THREADS_PER_BLOCK = (3, 3)
-comptime dtype = DType.float32
-comptime out_layout = Layout.row_major(SIZE, SIZE)
-comptime a_layout = Layout.row_major(SIZE, SIZE)
-
-
-# ANCHOR: add_10_blocks_2d_layout_tensor_solution
-def add_10_blocks_2d[
-    out_layout: Layout,
-    a_layout: Layout,
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, a_layout, ImmutAnyOrigin],
-    size: Int,
-):
-    var row = block_dim.y * block_idx.y + thread_idx.y
-    var col = block_dim.x * block_idx.x + thread_idx.x
-    if row < size and col < size:
-        output[row, col] = a[row, col] + 10.0
-
-
-# ANCHOR_END: add_10_blocks_2d_layout_tensor_solution
-
-
-def main() raises:
-    with DeviceContext() as ctx:
-        var out_buf = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
-        out_buf.enqueue_fill(0)
-        var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out_buf)
-
-        var expected_buf = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
-        expected_buf.enqueue_fill(1)
-
-        var a = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
-        a.enqueue_fill(1)
-
-        with a.map_to_host() as a_host:
-            for j in range(SIZE):
-                for i in range(SIZE):
-                    var k = j * SIZE + i
-                    a_host[k] = Scalar[dtype](k)
-                    expected_buf[k] = Scalar[dtype](k + 10)
-
-        var a_tensor = LayoutTensor[dtype, a_layout, ImmutAnyOrigin](a)
-
-        comptime kernel = add_10_blocks_2d[out_layout, a_layout]
-        ctx.enqueue_function[kernel, kernel](
-            out_tensor,
-            a_tensor,
-            SIZE,
-            grid_dim=BLOCKS_PER_GRID,
-            block_dim=THREADS_PER_BLOCK,
-        )
-
-        ctx.synchronize()
-
-        var expected_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](
-            expected_buf
-        )
-
-        with out_buf.map_to_host() as out_buf_host:
-            print(
-                "out:",
-                LayoutTensor[dtype, out_layout, MutAnyOrigin](out_buf_host),
-            )
-            print("expected:", expected_tensor)
-            for i in range(SIZE):
-                for j in range(SIZE):
-                    assert_equal(
-                        out_buf_host[i * SIZE + j], expected_buf[i * SIZE + j]
-                    )
-            print("Puzzle 07 complete ✅")
diff --git a/solutions/p08/p08.mojo b/solutions/p08/p08.mojo
index 3349960c..035d744a 100644
--- a/solutions/p08/p08.mojo
+++ b/solutions/p08/p08.mojo
@@ -1,7 +1,9 @@
-from std.memory import UnsafePointer, stack_allocation
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.testing import assert_equal
 
 comptime TPB = 4
@@ -9,33 +11,33 @@ comptime SIZE = 8
 comptime BLOCKS_PER_GRID = (2, 1)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 # ANCHOR: add_10_shared_solution
-def add_10_shared(
-    output: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    a: UnsafePointer[Scalar[dtype], MutAnyOrigin],
+def add_10_shared_tile_tensor(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
+    # Allocate shared memory using stack_allocation
     var shared = stack_allocation[
-        TPB,
-        Scalar[dtype],
-        address_space=AddressSpace.SHARED,
-    ]()
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
+
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
-    # Load local data into shared memory
+
     if global_i < size:
         shared[local_i] = a[global_i]
 
-    # Wait for all threads to complete (works within a thread block).
     # Note: barrier is not strictly needed here since each thread only accesses
     # its own shared memory location. However, it's included to teach proper
     # shared memory synchronization patterns for more complex scenarios where
     # threads need to coordinate access to shared data.
     barrier()
 
-    # process using shared memory
     if global_i < size:
         output[global_i] = shared[local_i] + 10
 
@@ -49,9 +51,15 @@ def main() raises:
         out.enqueue_fill(0)
         var a = ctx.enqueue_create_buffer[dtype](SIZE)
         a.enqueue_fill(1)
-        ctx.enqueue_function[add_10_shared, add_10_shared](
-            out,
-            a,
+
+        var out_tensor = TileTensor(out, layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+
+        ctx.enqueue_function[
+            add_10_shared_tile_tensor, add_10_shared_tile_tensor
+        ](
+            out_tensor,
+            a_tensor,
             SIZE,
             grid_dim=BLOCKS_PER_GRID,
             block_dim=THREADS_PER_BLOCK,
@@ -59,7 +67,6 @@ def main() raises:
 
         var expected = ctx.enqueue_create_host_buffer[dtype](SIZE)
         expected.enqueue_fill(11)
-
         ctx.synchronize()
 
         with out.map_to_host() as out_host:
diff --git a/solutions/p08/p08_layout_tensor.mojo b/solutions/p08/p08_layout_tensor.mojo
deleted file mode 100644
index 9864fe8e..00000000
--- a/solutions/p08/p08_layout_tensor.mojo
+++ /dev/null
@@ -1,78 +0,0 @@
-from std.gpu import thread_idx, block_idx, block_dim, barrier
-from std.gpu.host import DeviceContext
-from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
-from std.testing import assert_equal
-
-comptime TPB = 4
-comptime SIZE = 8
-comptime BLOCKS_PER_GRID = (2, 1)
-comptime THREADS_PER_BLOCK = (TPB, 1)
-comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
-
-
-# ANCHOR: add_10_shared_layout_tensor_solution
-def add_10_shared_layout_tensor[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    size: Int,
-):
-    # Allocate shared memory using tensor builder
-    var shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-
-    var global_i = block_dim.x * block_idx.x + thread_idx.x
-    var local_i = thread_idx.x
-
-    if global_i < size:
-        shared[local_i] = a[global_i]
-
-    # Note: barrier is not strictly needed here since each thread only accesses
-    # its own shared memory location. However, it's included to teach proper
-    # shared memory synchronization patterns for more complex scenarios where
-    # threads need to coordinate access to shared data.
-    barrier()
-
-    if global_i < size:
-        output[global_i] = shared[local_i] + 10
-
-
-# ANCHOR_END: add_10_shared_layout_tensor_solution
-
-
-def main() raises:
-    with DeviceContext() as ctx:
-        var out = ctx.enqueue_create_buffer[dtype](SIZE)
-        out.enqueue_fill(0)
-        var a = ctx.enqueue_create_buffer[dtype](SIZE)
-        a.enqueue_fill(1)
-
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-
-        comptime kernel = add_10_shared_layout_tensor[layout]
-        ctx.enqueue_function[kernel, kernel](
-            out_tensor,
-            a_tensor,
-            SIZE,
-            grid_dim=BLOCKS_PER_GRID,
-            block_dim=THREADS_PER_BLOCK,
-        )
-
-        var expected = ctx.enqueue_create_host_buffer[dtype](SIZE)
-        expected.enqueue_fill(11)
-        ctx.synchronize()
-
-        with out.map_to_host() as out_host:
-            print("out:", out_host)
-            print("expected:", expected)
-            for i in range(SIZE):
-                assert_equal(out_host[i], expected[i])
-            print("Puzzle 08 complete ✅")
diff --git a/solutions/p10/p10.mojo b/solutions/p10/p10.mojo
index fa7bce95..7c25c4ed 100644
--- a/solutions/p10/p10.mojo
+++ b/solutions/p10/p10.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_dim, block_idx, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.testing import assert_equal
 from std.sys import argv
 from std.os.atomic import Atomic
@@ -12,24 +14,22 @@ comptime SIZE = 2
 comptime BLOCKS_PER_GRID = 1
 comptime THREADS_PER_BLOCK = (3, 3)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE, SIZE)
+comptime layout = row_major[SIZE, SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 def shared_memory_race(
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     """Fixed: sequential access with barriers eliminates race conditions."""
     var row = thread_idx.y
     var col = thread_idx.x
 
-    var shared_sum = LayoutTensor[
-        dtype,
-        Layout.row_major(1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_sum = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[1]())
 
     # Only thread 0 does all the accumulation work to prevent races
     if row == 0 and col == 0:
@@ -53,8 +53,8 @@ def shared_memory_race(
 
 # ANCHOR: add_10_2d_solution
 def add_10_2d(
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     var row = thread_idx.y
@@ -79,10 +79,8 @@ def main() raises:
     with DeviceContext() as ctx:
         var out_buf = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
         out_buf.enqueue_fill(0)
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            out_buf
-        ).reshape[layout]()
-        print("out shape:", out_tensor.shape[0](), "x", out_tensor.shape[1]())
+        var out_tensor = TileTensor(out_buf, layout)
+        print("out shape:", out_tensor.dim[0](), "x", out_tensor.dim[1]())
         var expected = ctx.enqueue_create_host_buffer[dtype](SIZE * SIZE)
         expected.enqueue_fill(0)
 
@@ -92,9 +90,7 @@ def main() raises:
             for i in range(SIZE * SIZE):
                 a_host[i] = Scalar[dtype](i)
 
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a).reshape[
-            layout
-        ]()
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
 
         if flag == "--memory-bug":
             print("Running memory bug example (bounds checking issue)...")
diff --git a/solutions/p11/p11.mojo b/solutions/p11/p11.mojo
index de3e243d..89d16c70 100644
--- a/solutions/p11/p11.mojo
+++ b/solutions/p11/p11.mojo
@@ -1,7 +1,9 @@
-from std.memory import UnsafePointer, stack_allocation
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.testing import assert_equal
 
 comptime TPB = 8
@@ -9,30 +11,37 @@ comptime SIZE = 8
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 # ANCHOR: pooling_solution
 def pooling(
-    output: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    a: UnsafePointer[Scalar[dtype], MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
+    # Allocate shared memory using stack_allocation
     var shared = stack_allocation[
-        TPB,
-        Scalar[dtype],
-        address_space=AddressSpace.SHARED,
-    ]()
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
+
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
+
+    # Load data into shared memory
     if global_i < size:
         shared[local_i] = a[global_i]
 
+    # Synchronize threads within block
     barrier()
 
+    # Handle first two special cases
     if global_i == 0:
         output[0] = shared[0]
     elif global_i == 1:
         output[1] = shared[0] + shared[1]
+    # Handle general case
     elif 1 < global_i < size:
         output[global_i] = (
             shared[local_i - 2] + shared[local_i - 1] + shared[local_i]
@@ -48,13 +57,17 @@ def main() raises:
         out.enqueue_fill(0)
         var a = ctx.enqueue_create_buffer[dtype](SIZE)
         a.enqueue_fill(0)
+
         with a.map_to_host() as a_host:
             for i in range(SIZE):
                 a_host[i] = Scalar[dtype](i)
 
+        var out_tensor = TileTensor(out, layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+
         ctx.enqueue_function[pooling, pooling](
-            out,
-            a,
+            out_tensor,
+            a_tensor,
             SIZE,
             grid_dim=BLOCKS_PER_GRID,
             block_dim=THREADS_PER_BLOCK,
@@ -62,7 +75,6 @@ def main() raises:
 
         var expected = ctx.enqueue_create_host_buffer[dtype](SIZE)
         expected.enqueue_fill(0)
-
         ctx.synchronize()
 
         with a.map_to_host() as a_host:
@@ -71,7 +83,6 @@ def main() raises:
                 var s = Scalar[dtype](0)
                 for j in range(max(i - 2, 0), i + 1):
                     s += ptr[j]
-
                 expected[i] = s
 
         with out.map_to_host() as out_host:
diff --git a/solutions/p11/p11_layout_tensor.mojo b/solutions/p11/p11_layout_tensor.mojo
deleted file mode 100644
index 7cfa112c..00000000
--- a/solutions/p11/p11_layout_tensor.mojo
+++ /dev/null
@@ -1,95 +0,0 @@
-from std.gpu import thread_idx, block_idx, block_dim, barrier
-from std.gpu.host import DeviceContext
-from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
-from std.testing import assert_equal
-
-comptime TPB = 8
-comptime SIZE = 8
-comptime BLOCKS_PER_GRID = (1, 1)
-comptime THREADS_PER_BLOCK = (TPB, 1)
-comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
-
-
-# ANCHOR: pooling_layout_tensor_solution
-def pooling[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    size: Int,
-):
-    # Allocate shared memory using tensor builder
-    var shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-
-    var global_i = block_dim.x * block_idx.x + thread_idx.x
-    var local_i = thread_idx.x
-
-    # Load data into shared memory
-    if global_i < size:
-        shared[local_i] = a[global_i]
-
-    # Synchronize threads within block
-    barrier()
-
-    # Handle first two special cases
-    if global_i == 0:
-        output[0] = shared[0]
-    elif global_i == 1:
-        output[1] = shared[0] + shared[1]
-    # Handle general case
-    elif 1 < global_i < size:
-        output[global_i] = (
-            shared[local_i - 2] + shared[local_i - 1] + shared[local_i]
-        )
-
-
-# ANCHOR_END: pooling_layout_tensor_solution
-
-
-def main() raises:
-    with DeviceContext() as ctx:
-        var out = ctx.enqueue_create_buffer[dtype](SIZE)
-        out.enqueue_fill(0)
-        var a = ctx.enqueue_create_buffer[dtype](SIZE)
-        a.enqueue_fill(0)
-
-        with a.map_to_host() as a_host:
-            for i in range(SIZE):
-                a_host[i] = Scalar[dtype](i)
-
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-
-        ctx.enqueue_function[pooling[layout], pooling[layout]](
-            out_tensor,
-            a_tensor,
-            SIZE,
-            grid_dim=BLOCKS_PER_GRID,
-            block_dim=THREADS_PER_BLOCK,
-        )
-
-        var expected = ctx.enqueue_create_host_buffer[dtype](SIZE)
-        expected.enqueue_fill(0)
-        ctx.synchronize()
-
-        with a.map_to_host() as a_host:
-            var ptr = a_host
-            for i in range(SIZE):
-                var s = Scalar[dtype](0)
-                for j in range(max(i - 2, 0), i + 1):
-                    s += ptr[j]
-                expected[i] = s
-
-        with out.map_to_host() as out_host:
-            print("out:", out_host)
-            print("expected:", expected)
-            for i in range(SIZE):
-                assert_equal(out_host[i], expected[i])
-            print("Puzzle 11 complete ✅")
diff --git a/solutions/p12/p12.mojo b/solutions/p12/p12.mojo
index 99393982..b8b962dd 100644
--- a/solutions/p12/p12.mojo
+++ b/solutions/p12/p12.mojo
@@ -1,7 +1,9 @@
-from std.memory import UnsafePointer, stack_allocation
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.testing import assert_equal
 
 comptime TPB = 8
@@ -9,37 +11,33 @@ comptime SIZE = 8
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
+comptime layout = row_major[SIZE]()
+comptime out_layout = row_major[1]()
+comptime LayoutType = type_of(layout)
+comptime OutLayout = type_of(out_layout)
 
 
 # ANCHOR: dot_product_solution
 def dot_product(
-    output: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    a: UnsafePointer[Scalar[dtype], MutAnyOrigin],
-    b: UnsafePointer[Scalar[dtype], MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     var shared = stack_allocation[
-        TPB,
-        Scalar[dtype],
-        address_space=AddressSpace.SHARED,
-    ]()
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
+
+    # Compute element-wise multiplication into shared memory
     if global_i < size:
         shared[local_i] = a[global_i] * b[global_i]
 
+    # Synchronize threads within block
     barrier()
 
-    # The following causes race condition: all threads writing to the same location
-    # out[0] += shared[local_i]
-
-    # Instead can do parallel reduction in shared memory as opposed to
-    # global memory which has no guarantee on synchronization.
-    # Loops using global memory can cause thread divergence because
-    # fundamentally GPUs execute threads in warps (groups of 32 threads typically)
-    # and warps can be scheduled independently.
-    # However, shared memory does not have such issues as long as we use `barrier()`
-    # correctly when we're in the same thread block.
+    # Parallel reduction in shared memory
     var stride = TPB // 2
     while stride > 0:
         if local_i < stride:
@@ -48,7 +46,7 @@ def dot_product(
         barrier()
         stride //= 2
 
-    # only thread 0 writes the final result
+    # Only thread 0 writes the final result
     if local_i == 0:
         output[0] = shared[0]
 
@@ -64,15 +62,20 @@ def main() raises:
         a.enqueue_fill(0)
         var b = ctx.enqueue_create_buffer[dtype](SIZE)
         b.enqueue_fill(0)
+
         with a.map_to_host() as a_host, b.map_to_host() as b_host:
             for i in range(SIZE):
                 a_host[i] = Scalar[dtype](i)
                 b_host[i] = Scalar[dtype](i)
 
+        var out_tensor = TileTensor(out, out_layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+        var b_tensor = TileTensor[mut=False, dtype, LayoutType](b, layout)
+
         ctx.enqueue_function[dot_product, dot_product](
-            out,
-            a,
-            b,
+            out_tensor,
+            a_tensor,
+            b_tensor,
             SIZE,
             grid_dim=BLOCKS_PER_GRID,
             block_dim=THREADS_PER_BLOCK,
@@ -80,7 +83,6 @@ def main() raises:
 
         var expected = ctx.enqueue_create_host_buffer[dtype](1)
         expected.enqueue_fill(0)
-
         ctx.synchronize()
 
         with a.map_to_host() as a_host, b.map_to_host() as b_host:
diff --git a/solutions/p12/p12_layout_tensor.mojo b/solutions/p12/p12_layout_tensor.mojo
deleted file mode 100644
index a5359bb5..00000000
--- a/solutions/p12/p12_layout_tensor.mojo
+++ /dev/null
@@ -1,98 +0,0 @@
-from std.gpu import thread_idx, block_idx, block_dim, barrier
-from std.gpu.host import DeviceContext
-from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
-from std.testing import assert_equal
-
-comptime TPB = 8
-comptime SIZE = 8
-comptime BLOCKS_PER_GRID = (1, 1)
-comptime THREADS_PER_BLOCK = (TPB, 1)
-comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
-comptime out_layout = Layout.row_major(1)
-
-
-# ANCHOR: dot_product_layout_tensor_solution
-def dot_product[
-    in_layout: Layout, out_layout: Layout
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    size: Int,
-):
-    var shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var global_i = block_dim.x * block_idx.x + thread_idx.x
-    var local_i = thread_idx.x
-
-    # Compute element-wise multiplication into shared memory
-    if global_i < size:
-        shared[local_i] = a[global_i] * b[global_i]
-
-    # Synchronize threads within block
-    barrier()
-
-    # Parallel reduction in shared memory
-    var stride = TPB // 2
-    while stride > 0:
-        if local_i < stride:
-            shared[local_i] += shared[local_i + stride]
-
-        barrier()
-        stride //= 2
-
-    # Only thread 0 writes the final result
-    if local_i == 0:
-        output[0] = shared[0]
-
-
-# ANCHOR_END: dot_product_layout_tensor_solution
-
-
-def main() raises:
-    with DeviceContext() as ctx:
-        var out = ctx.enqueue_create_buffer[dtype](1)
-        out.enqueue_fill(0)
-        var a = ctx.enqueue_create_buffer[dtype](SIZE)
-        a.enqueue_fill(0)
-        var b = ctx.enqueue_create_buffer[dtype](SIZE)
-        b.enqueue_fill(0)
-
-        with a.map_to_host() as a_host, b.map_to_host() as b_host:
-            for i in range(SIZE):
-                a_host[i] = Scalar[dtype](i)
-                b_host[i] = Scalar[dtype](i)
-
-        var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-        var b_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](b)
-
-        comptime kernel = dot_product[layout, out_layout]
-        ctx.enqueue_function[kernel, kernel](
-            out_tensor,
-            a_tensor,
-            b_tensor,
-            SIZE,
-            grid_dim=BLOCKS_PER_GRID,
-            block_dim=THREADS_PER_BLOCK,
-        )
-
-        var expected = ctx.enqueue_create_host_buffer[dtype](1)
-        expected.enqueue_fill(0)
-        ctx.synchronize()
-
-        with a.map_to_host() as a_host, b.map_to_host() as b_host:
-            for i in range(SIZE):
-                expected[0] += a_host[i] * b_host[i]
-
-        with out.map_to_host() as out_host:
-            print("out:", out_host)
-            print("expected:", expected)
-            assert_equal(out_host[0], expected[0])
-            print("Puzzle 12 complete ✅")
diff --git a/solutions/p13/p13.mojo b/solutions/p13/p13.mojo
index 7307a6f0..aacf2514 100644
--- a/solutions/p13/p13.mojo
+++ b/solutions/p13/p13.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.sys import argv
 from std.testing import assert_equal
 
@@ -11,33 +13,28 @@ comptime CONV = 3
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
-comptime in_layout = Layout.row_major(SIZE)
-comptime out_layout = Layout.row_major(SIZE)
-comptime conv_layout = Layout.row_major(CONV)
+comptime in_layout = row_major[SIZE]()
+comptime out_layout = row_major[SIZE]()
+comptime conv_layout = row_major[CONV]()
+comptime InLayout = type_of(in_layout)
+comptime OutLayout = type_of(out_layout)
+comptime ConvLayout = type_of(conv_layout)
 
 
 # ANCHOR: conv_1d_simple_solution
-def conv_1d_simple[
-    in_layout: Layout, out_layout: Layout, conv_layout: Layout
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, conv_layout, ImmutAnyOrigin],
+def conv_1d_simple(
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, ConvLayout, ImmutAnyOrigin],
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
-    var shared_a = LayoutTensor[
-        dtype,
-        Layout.row_major(SIZE),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var shared_b = LayoutTensor[
-        dtype,
-        Layout.row_major(CONV),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_a = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[SIZE]())
+    var shared_b = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[CONV]())
     if global_i < SIZE:
         shared_a[local_i] = a[global_i]
 
@@ -58,8 +55,8 @@ def conv_1d_simple[
     # Safe and correct:
     if global_i < SIZE:
         # Note: using `var` allows us to include the type in the type inference
-        # `out.element_type` is available in LayoutTensor
-        var local_sum: output.element_type = 0
+        # `out.ElementType` is available in TileTensor
+        var local_sum: output.ElementType = 0
 
         # Note: `@parameter` decorator unrolls the loop at compile time given `CONV` is a compile-time constant
         # See: https://docs.modular.com/mojo/manual/decorators/parameter/#parametric-for-statement
@@ -77,34 +74,29 @@ comptime SIZE_2 = 15
 comptime CONV_2 = 4
 comptime BLOCKS_PER_GRID_2 = (2, 1)
 comptime THREADS_PER_BLOCK_2 = (TPB, 1)
-comptime in_2_layout = Layout.row_major(SIZE_2)
-comptime out_2_layout = Layout.row_major(SIZE_2)
-comptime conv_2_layout = Layout.row_major(CONV_2)
+comptime in_2_layout = row_major[SIZE_2]()
+comptime out_2_layout = row_major[SIZE_2]()
+comptime conv_2_layout = row_major[CONV_2]()
+comptime In2Layout = type_of(in_2_layout)
+comptime Out2Layout = type_of(out_2_layout)
+comptime Conv2Layout = type_of(conv_2_layout)
 
 
 # ANCHOR: conv_1d_block_boundary_solution
-def conv_1d_block_boundary[
-    in_layout: Layout, out_layout: Layout, conv_layout: Layout, dtype: DType
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, conv_layout, ImmutAnyOrigin],
+def conv_1d_block_boundary(
+    output: TileTensor[mut=True, dtype, Out2Layout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, In2Layout, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, Conv2Layout, ImmutAnyOrigin],
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
     # first: need to account for padding
-    var shared_a = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB + CONV_2 - 1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var shared_b = LayoutTensor[
-        dtype,
-        Layout.row_major(CONV_2),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_a = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB + CONV_2 - 1]())
+    var shared_b = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[CONV_2]())
     if global_i < SIZE_2:
         shared_a[local_i] = a[global_i]
     else:
@@ -127,7 +119,7 @@ def conv_1d_block_boundary[
     barrier()
 
     if global_i < SIZE_2:
-        var local_sum: output.element_type = 0
+        var local_sum: output.ElementType = 0
 
         comptime for j in range(CONV_2):
             if global_i + j < SIZE_2:
@@ -158,11 +150,12 @@ def main() raises:
                 b_host[i] = Scalar[dtype](i)
 
         if argv()[1] == "--simple":
-            var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
-            var a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-            var b_tensor = LayoutTensor[dtype, conv_layout, ImmutAnyOrigin](b)
-            comptime kernel = conv_1d_simple[in_layout, out_layout, conv_layout]
-            ctx.enqueue_function[kernel, kernel](
+            var out_tensor = TileTensor(out, out_layout)
+            var a_tensor = TileTensor[mut=False, dtype, InLayout](a, in_layout)
+            var b_tensor = TileTensor[mut=False, dtype, ConvLayout](
+                b, conv_layout
+            )
+            ctx.enqueue_function[conv_1d_simple, conv_1d_simple](
                 out_tensor,
                 a_tensor,
                 b_tensor,
@@ -170,15 +163,16 @@ def main() raises:
                 block_dim=THREADS_PER_BLOCK,
             )
         elif argv()[1] == "--block-boundary":
-            var out_tensor = LayoutTensor[dtype, out_2_layout, MutAnyOrigin](
-                out
+            var out_tensor = TileTensor(out, out_2_layout)
+            var a_tensor = TileTensor[mut=False, dtype, In2Layout](
+                a, in_2_layout
+            )
+            var b_tensor = TileTensor[mut=False, dtype, Conv2Layout](
+                b, conv_2_layout
             )
-            var a_tensor = LayoutTensor[dtype, in_2_layout, ImmutAnyOrigin](a)
-            var b_tensor = LayoutTensor[dtype, conv_2_layout, ImmutAnyOrigin](b)
-            comptime kernel = conv_1d_block_boundary[
-                in_2_layout, out_2_layout, conv_2_layout, dtype
-            ]
-            ctx.enqueue_function[kernel, kernel](
+            ctx.enqueue_function[
+                conv_1d_block_boundary, conv_1d_block_boundary
+            ](
                 out_tensor,
                 a_tensor,
                 b_tensor,
diff --git a/solutions/p14/p14.mojo b/solutions/p14/p14.mojo
index 55d6a800..794b46ee 100644
--- a/solutions/p14/p14.mojo
+++ b/solutions/p14/p14.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.sys import argv
 from std.math import log2
 from std.testing import assert_equal
@@ -11,25 +13,21 @@ comptime SIZE = 8
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 # ANCHOR: prefix_sum_simple_solution
-def prefix_sum_simple[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def prefix_sum_simple(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     size: Int,
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
-    var shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
     if global_i < size:
         shared[local_i] = a[global_i]
 
@@ -37,7 +35,7 @@ def prefix_sum_simple[
 
     var offset = 1
     for i in range(Int(log2(Scalar[dtype](TPB)))):
-        var current_val: output.element_type = 0
+        var current_val: output.ElementType = 0
         if local_i >= offset and local_i < size:
             current_val = shared[local_i - offset]  # read
 
@@ -59,28 +57,25 @@ comptime SIZE_2 = 15
 comptime BLOCKS_PER_GRID_2 = (2, 1)
 comptime THREADS_PER_BLOCK_2 = (TPB, 1)
 comptime EXTENDED_SIZE = SIZE_2 + 2  # up to 2 blocks
-comptime layout_2 = Layout.row_major(SIZE_2)
-comptime extended_layout = Layout.row_major(EXTENDED_SIZE)
+comptime layout_2 = row_major[SIZE_2]()
+comptime extended_layout = row_major[EXTENDED_SIZE]()
+comptime Layout2Type = type_of(layout_2)
+comptime ExtendedLayout = type_of(extended_layout)
 
 # ANCHOR: prefix_sum_complete_solution
 
 
 # Kernel 1: Compute local prefix sums and store block sums in out
-def prefix_sum_local_phase[
-    out_layout: Layout, in_layout: Layout
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+def prefix_sum_local_phase(
+    output: TileTensor[mut=True, dtype, ExtendedLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, Layout2Type, ImmutAnyOrigin],
     size: Int,
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
-    var shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
 
     # Load data into shared memory
     # Example with SIZE_2=15, TPB=8, BLOCKS=2:
@@ -104,7 +99,7 @@ def prefix_sum_local_phase[
     #   Block 1 follows same pattern to get [8,17,27,38,50,63,77,???]
     var offset = 1
     for i in range(Int(log2(Scalar[dtype](TPB)))):
-        var current_val: output.element_type = 0
+        var current_val: output.ElementType = 0
         if local_i >= offset and local_i < TPB:
             current_val = shared[local_i - offset]  # read
 
@@ -132,9 +127,10 @@ def prefix_sum_local_phase[
 
 
 # Kernel 2: Add block sums to their respective blocks
-def prefix_sum_block_sum_phase[
-    layout: Layout
-](output: LayoutTensor[dtype, layout, MutAnyOrigin], size: Int):
+def prefix_sum_block_sum_phase(
+    output: TileTensor[mut=True, dtype, ExtendedLayout, MutAnyOrigin],
+    size: Int,
+):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
 
     # Second pass: add previous block's sum to each element
@@ -172,11 +168,10 @@ def main() raises:
                 a_host[i] = Scalar[dtype](i)
 
         if use_simple:
-            a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](a)
-            out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
+            a_tensor = TileTensor[mut=False, dtype, LayoutType](a, layout)
+            out_tensor = TileTensor(out, layout)
 
-            comptime kernel = prefix_sum_simple[layout]
-            ctx.enqueue_function[kernel, kernel](
+            ctx.enqueue_function[prefix_sum_simple, prefix_sum_simple](
                 out_tensor,
                 a_tensor,
                 size,
@@ -184,15 +179,16 @@ def main() raises:
                 block_dim=THREADS_PER_BLOCK,
             )
         else:
-            var a_tensor = LayoutTensor[dtype, layout_2, ImmutAnyOrigin](a)
-            var out_tensor = LayoutTensor[dtype, extended_layout, MutAnyOrigin](
-                out
+            var a_tensor = TileTensor[mut=False, dtype, Layout2Type](
+                a, layout_2
             )
+            var out_tensor = TileTensor(out, extended_layout)
 
             # ANCHOR: prefix_sum_complete_block_level_sync
             # Phase 1: Local prefix sums
-            comptime kernel = prefix_sum_local_phase[extended_layout, layout_2]
-            ctx.enqueue_function[kernel, kernel](
+            ctx.enqueue_function[
+                prefix_sum_local_phase, prefix_sum_local_phase
+            ](
                 out_tensor,
                 a_tensor,
                 size,
@@ -201,8 +197,9 @@ def main() raises:
             )
 
             # Phase 2: Add block sums
-            comptime kernel2 = prefix_sum_block_sum_phase[extended_layout]
-            ctx.enqueue_function[kernel2, kernel2](
+            ctx.enqueue_function[
+                prefix_sum_block_sum_phase, prefix_sum_block_sum_phase
+            ](
                 out_tensor,
                 size,
                 grid_dim=BLOCKS_PER_GRID_2,
diff --git a/solutions/p15/p15.mojo b/solutions/p15/p15.mojo
index 218c34b7..df06ed5a 100644
--- a/solutions/p15/p15.mojo
+++ b/solutions/p15/p15.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.testing import assert_equal
 
 comptime TPB = 8
@@ -10,27 +12,24 @@ comptime SIZE = 6
 comptime BLOCKS_PER_GRID = (1, BATCH)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
-comptime in_layout = Layout.row_major(BATCH, SIZE)
-comptime out_layout = Layout.row_major(BATCH, 1)
+comptime in_layout = row_major[BATCH, SIZE]()
+comptime out_layout = row_major[BATCH, 1]()
+comptime InLayout = type_of(in_layout)
+comptime OutLayout = type_of(out_layout)
 
 
 # ANCHOR: axis_sum_solution
-def axis_sum[
-    in_layout: Layout, out_layout: Layout
-](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+def axis_sum(
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin],
     size: Int,
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
     var batch = block_idx.y
-    var cache = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var cache = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
 
     # Visualize:
     # Block(0,0): [T0,T1,T2,T3,T4,T5,T6,T7] -> Row 0: [0,1,2,3,4,5]
@@ -52,7 +51,7 @@ def axis_sum[
     var stride = TPB // 2
     while stride > 0:
         # Read phase: all threads read the values they need first to avoid race conditions
-        var temp_val: output.element_type = 0
+        var temp_val: output.ElementType = 0
         if local_i < stride:
             temp_val = cache[local_i + stride]
 
@@ -84,11 +83,10 @@ def main() raises:
                 for col in range(SIZE):
                     inp_host[row * SIZE + col] = Scalar[dtype](row * SIZE + col)
 
-        var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
-        var inp_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](inp)
+        var out_tensor = TileTensor(out, out_layout)
+        var inp_tensor = TileTensor[mut=False, dtype, InLayout](inp, in_layout)
 
-        comptime kernel = axis_sum[in_layout, out_layout]
-        ctx.enqueue_function[kernel, kernel](
+        ctx.enqueue_function[axis_sum, axis_sum](
             out_tensor,
             inp_tensor,
             SIZE,
diff --git a/solutions/p16/p16.mojo b/solutions/p16/p16.mojo
index 62b76e00..e800a5f1 100644
--- a/solutions/p16/p16.mojo
+++ b/solutions/p16/p16.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.sys import argv
 from std.testing import assert_equal
 
@@ -10,22 +12,23 @@ comptime SIZE = 2
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (TPB, TPB)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE, SIZE)
+comptime layout = row_major[SIZE, SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 # ANCHOR: naive_matmul_solution
 def naive_matmul[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     var row = block_dim.y * block_idx.y + thread_idx.y
     var col = block_dim.x * block_idx.x + thread_idx.x
 
     if row < size and col < size:
-        var acc: output.element_type = 0
+        var acc: output.ElementType = 0
 
         comptime for k in range(size):
             acc += a[row, k] * b[k, col]
@@ -38,29 +41,23 @@ def naive_matmul[
 
 # ANCHOR: single_block_matmul_solution
 def single_block_matmul[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     var row = block_dim.y * block_idx.y + thread_idx.y
     var col = block_dim.x * block_idx.x + thread_idx.x
     var local_row = thread_idx.y
     var local_col = thread_idx.x
 
-    var a_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB, TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var b_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB, TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var a_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB, TPB]())
+    var b_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB, TPB]())
 
     if row < size and col < size:
         a_shared[local_row, local_col] = a[row, col]
@@ -69,7 +66,7 @@ def single_block_matmul[
     barrier()
 
     if row < size and col < size:
-        var acc: output.element_type = 0
+        var acc: output.ElementType = 0
 
         comptime for k in range(size):
             acc += a_shared[local_row, k] * b_shared[k, local_col]
@@ -83,36 +80,31 @@ def single_block_matmul[
 comptime SIZE_TILED = 9
 comptime BLOCKS_PER_GRID_TILED = (3, 3)  # each block covers 3x3 elements
 comptime THREADS_PER_BLOCK_TILED = (TPB, TPB)
-comptime layout_tiled = Layout.row_major(SIZE_TILED, SIZE_TILED)
+comptime layout_tiled = row_major[SIZE_TILED, SIZE_TILED]()
+comptime LayoutTiledType = type_of(layout_tiled)
 
 
 # ANCHOR: matmul_tiled_solution
 def matmul_tiled[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout_tiled, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout_tiled, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, layout_tiled, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutTiledType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutTiledType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutTiledType, ImmutAnyOrigin],
 ):
     var local_row = thread_idx.y
     var local_col = thread_idx.x
     var tiled_row = block_idx.y * TPB + local_row
     var tiled_col = block_idx.x * TPB + local_col
 
-    var a_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB, TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var b_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB, TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-
-    var acc: output.element_type = 0
+    var a_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB, TPB]())
+    var b_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB, TPB]())
+
+    var acc: output.ElementType = 0
 
     # Iterate over tiles to compute matrix product
     comptime for tile in range((size + TPB - 1) // TPB):
@@ -147,17 +139,18 @@ def matmul_tiled[
 # ANCHOR: matmul_idiomatic_tiled_solution
 from std.gpu.memory import async_copy_wait_all
 from layout.layout_tensor import copy_dram_to_sram_async
+from layout import Layout as IntTupleLayout
 
 comptime NUM_THREADS = TPB * TPB
 comptime BLOCK_DIM_COUNT = 2
 
 
 def matmul_idiomatic_tiled[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout_tiled, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout_tiled, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, layout_tiled, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutTiledType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutTiledType, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutTiledType, ImmutAnyOrigin],
 ):
     var local_row = thread_idx.y
     var local_col = thread_idx.x
@@ -166,23 +159,21 @@ def matmul_idiomatic_tiled[
 
     # Get the tile of the output matrix that this thread block is responsible for
     var out_tile = output.tile[TPB, TPB](block_idx.y, block_idx.x)
-    var a_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB, TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var b_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB, TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-
-    var acc: output.element_type = 0
-
-    comptime load_a_layout = Layout.row_major(1, TPB)  # Coalesced loading
-    comptime load_b_layout = Layout.row_major(1, TPB)  # Coalesced loading
+    var a_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB, TPB]())
+    var b_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB, TPB]())
+
+    var acc: output.ElementType = 0
+
+    comptime load_a_layout = IntTupleLayout.row_major(
+        1, TPB
+    )  # Coalesced loading
+    comptime load_b_layout = IntTupleLayout.row_major(
+        1, TPB
+    )  # Coalesced loading
     # Note: Both matrices stored in same orientation for correct matrix multiplication
     # Transposed loading would be useful if B were pre-transposed in global memory
 
@@ -198,12 +189,12 @@ def matmul_idiomatic_tiled[
             thread_layout=load_a_layout,
             num_threads=NUM_THREADS,
             block_dim_count=BLOCK_DIM_COUNT,
-        ](a_shared, a_tile)
+        ](a_shared.to_layout_tensor(), a_tile.to_layout_tensor())
         copy_dram_to_sram_async[
             thread_layout=load_b_layout,
             num_threads=NUM_THREADS,
             block_dim_count=BLOCK_DIM_COUNT,
-        ](b_shared, b_tile)
+        ](b_shared.to_layout_tensor(), b_tile.to_layout_tensor())
 
         # Wait for all async copies to complete
         async_copy_wait_all()
@@ -254,12 +245,12 @@ def main() raises:
                             inp1_host[i * size + k] * inp2_host[k * size + j]
                         )
 
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp1)
-        var b_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp2)
+        var out_tensor = TileTensor(out, layout)
+        var a_tensor = TileTensor[mut=False, dtype, LayoutType](inp1, layout)
+        var b_tensor = TileTensor[mut=False, dtype, LayoutType](inp2, layout)
 
         if argv()[1] == "--naive":
-            comptime kernel = naive_matmul[layout, SIZE]
+            comptime kernel = naive_matmul[SIZE]
             ctx.enqueue_function[kernel, kernel](
                 out_tensor,
                 a_tensor,
@@ -268,7 +259,7 @@ def main() raises:
                 block_dim=THREADS_PER_BLOCK,
             )
         elif argv()[1] == "--single-block":
-            comptime kernel = single_block_matmul[layout, SIZE]
+            comptime kernel = single_block_matmul[SIZE]
             ctx.enqueue_function[kernel, kernel](
                 out_tensor,
                 a_tensor,
@@ -278,17 +269,15 @@ def main() raises:
             )
         elif argv()[1] == "--tiled":
             # Need to update the layout of the tensors to the tiled layout
-            out_tensor_tiled = LayoutTensor[dtype, layout_tiled, MutAnyOrigin](
-                out
-            )
-            a_tensor_tiled = LayoutTensor[dtype, layout_tiled, ImmutAnyOrigin](
-                inp1
+            out_tensor_tiled = TileTensor(out, layout_tiled)
+            a_tensor_tiled = TileTensor[mut=False, dtype, LayoutTiledType](
+                inp1, layout_tiled
             )
-            b_tensor_tiled = LayoutTensor[dtype, layout_tiled, ImmutAnyOrigin](
-                inp2
+            b_tensor_tiled = TileTensor[mut=False, dtype, LayoutTiledType](
+                inp2, layout_tiled
             )
 
-            comptime kernel = matmul_tiled[layout_tiled, SIZE_TILED]
+            comptime kernel = matmul_tiled[SIZE_TILED]
             ctx.enqueue_function[kernel, kernel](
                 out_tensor_tiled,
                 a_tensor_tiled,
@@ -297,17 +286,15 @@ def main() raises:
                 block_dim=THREADS_PER_BLOCK_TILED,
             )
         elif argv()[1] == "--idiomatic-tiled":
-            out_tensor_tiled = LayoutTensor[dtype, layout_tiled, MutAnyOrigin](
-                out
-            )
-            a_tensor_tiled = LayoutTensor[dtype, layout_tiled, ImmutAnyOrigin](
-                inp1
+            out_tensor_tiled = TileTensor(out, layout_tiled)
+            a_tensor_tiled = TileTensor[mut=False, dtype, LayoutTiledType](
+                inp1, layout_tiled
             )
-            b_tensor_tiled = LayoutTensor[dtype, layout_tiled, ImmutAnyOrigin](
-                inp2
+            b_tensor_tiled = TileTensor[mut=False, dtype, LayoutTiledType](
+                inp2, layout_tiled
             )
 
-            comptime kernel = matmul_idiomatic_tiled[layout_tiled, SIZE_TILED]
+            comptime kernel = matmul_idiomatic_tiled[SIZE_TILED]
             ctx.enqueue_function[kernel, kernel](
                 out_tensor_tiled,
                 a_tensor_tiled,
diff --git a/solutions/p17/op/conv1d.mojo b/solutions/p17/op/conv1d.mojo
index 77517480..b83f4a74 100644
--- a/solutions/p17/op/conv1d.mojo
+++ b/solutions/p17/op/conv1d.mojo
@@ -1,7 +1,10 @@
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major, TensorLayout
+from layout.tile_tensor import stack_allocation
+from std.utils import Index
 from std.sys import argv
 from std.testing import assert_equal
 
@@ -10,59 +13,57 @@ comptime BLOCKS_PER_GRID = (2, 1)
 
 
 def conv1d_kernel[
-    in_layout: Layout,
-    out_layout: Layout,
-    conv_layout: Layout,
     input_size: Int,
     conv_size: Int,
+    OutLayout: TensorLayout,
+    InLayout: TensorLayout,
+    ConvLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, in_layout, MutAnyOrigin],
-    kernel: LayoutTensor[dtype, conv_layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    input: TileTensor[mut=True, dtype, InLayout, MutAnyOrigin],
+    kernel: TileTensor[mut=True, dtype, ConvLayout, MutAnyOrigin],
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
+    # Convert generic TileTensors to LayoutTensor for indexing (flat_rank proof required)
+    var input_lt = input.to_layout_tensor()
+    var kernel_lt = kernel.to_layout_tensor()
+    var output_lt = output.to_layout_tensor()
     # first: need to account for padding
-    var shared_a = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB + conv_size - 1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var shared_b = LayoutTensor[
-        dtype,
-        Layout.row_major(conv_size),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_a = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB + conv_size - 1]())
+    var shared_b = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[conv_size]())
     if global_i < input_size:
-        shared_a[local_i] = input[global_i]
+        shared_a[local_i] = rebind[Scalar[dtype]](input_lt[global_i])
 
     # second: load elements needed for convolution at block boundary
     if local_i < conv_size - 1:
         # indices from next block
         var next_idx = global_i + TPB
         if next_idx < input_size:
-            shared_a[TPB + local_i] = input[next_idx]
+            shared_a[TPB + local_i] = rebind[Scalar[dtype]](input_lt[next_idx])
         else:
             # Initialize out-of-bounds elements to 0 to avoid reading from uninitialized memory
             # which is an undefined behavior
             shared_a[TPB + local_i] = 0
 
     if local_i < conv_size:
-        shared_b[local_i] = kernel[local_i]
+        shared_b[local_i] = rebind[Scalar[dtype]](kernel_lt[local_i])
 
     barrier()
 
     if global_i < input_size:
-        var local_sum: output.element_type = 0
+        var local_sum: Scalar[dtype] = 0
 
         comptime for j in range(conv_size):
             if local_i + j < TPB + conv_size - 1:
                 local_sum += shared_a[local_i + j] * shared_b[j]
 
-        output[global_i] = local_sum
+        output_lt.store[1](Index(global_i), local_sum)
 
 
 import compiler
@@ -82,18 +83,26 @@ struct Conv1DCustomOp:
         conv_size: Int,
         dtype: DType = DType.float32,
     ](
-        output: OutputTensor[rank=1, static_spec=_],
-        input: InputTensor[rank=output.rank, static_spec=_],
-        kernel: InputTensor[rank=output.rank, static_spec=_],
+        output: OutputTensor[dtype=dtype, rank=1, static_spec=_],
+        input: InputTensor[dtype=dtype, rank=output.rank, static_spec=_],
+        kernel: InputTensor[dtype=dtype, rank=output.rank, static_spec=_],
         # the context is needed for some GPU calls
         ctx: DeviceContextPtr,
     ) raises:
-        var output_tensor = output.to_layout_tensor()
-        var input_tensor = input.to_layout_tensor()
-        var kernel_tensor = kernel.to_layout_tensor()
-        comptime in_layout = input_tensor.layout
-        comptime out_layout = output_tensor.layout
-        comptime conv_layout = kernel_tensor.layout
+        comptime out_layout_val = row_major[input_size]()
+        comptime OutLayout = type_of(out_layout_val)
+        comptime conv_layout_val = row_major[conv_size]()
+        comptime ConvLayout = type_of(conv_layout_val)
+
+        var output_tensor = TileTensor[
+            mut=True, dtype, OutLayout, MutAnyOrigin
+        ](output.unsafe_ptr(), out_layout_val)
+        var input_tensor = TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin](
+            input.unsafe_ptr(), out_layout_val
+        )
+        var kernel_tensor = TileTensor[
+            mut=True, dtype, ConvLayout, MutAnyOrigin
+        ](kernel.unsafe_ptr(), conv_layout_val)
 
         comptime if target == "gpu":
             var gpu_ctx = ctx.get_device_context()
@@ -101,7 +110,7 @@ struct Conv1DCustomOp:
             gpu_ctx.enqueue_memset(
                 DeviceBuffer[output_tensor.dtype](
                     gpu_ctx,
-                    output_tensor.ptr,
+                    output.unsafe_ptr(),
                     input_size,
                     owning=False,
                 ),
@@ -109,7 +118,7 @@ struct Conv1DCustomOp:
             )
             # ANCHOR: conv1d_custom_op_solution
             comptime kernel = conv1d_kernel[
-                in_layout, out_layout, conv_layout, input_size, conv_size
+                input_size, conv_size, OutLayout, OutLayout, ConvLayout
             ]
             gpu_ctx.enqueue_function[kernel, kernel](
                 output_tensor,
diff --git a/solutions/p18/op/softmax.mojo b/solutions/p18/op/softmax.mojo
index d9674e7a..eea5d67c 100644
--- a/solutions/p18/op/softmax.mojo
+++ b/solutions/p18/op/softmax.mojo
@@ -2,14 +2,17 @@ from std.memory import UnsafePointer
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext, HostBuffer, DeviceBuffer
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.math import exp
 from std.bit import log2_ceil
 from std.utils.numerics import max_finite, min_finite
 
 
 comptime SIZE = 128  # This must be equal to INPUT_SIZE in p18.py
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 comptime GRID_DIM_X = 1
 # Tree-based reduction require the number of threads to be the next power of two >= SIZE for correctness.
 comptime BLOCK_DIM_X = 1 << log2_ceil(SIZE)
@@ -17,28 +20,21 @@ comptime BLOCK_DIM_X = 1 << log2_ceil(SIZE)
 
 # ANCHOR: softmax_gpu_kernel_solution
 def softmax_gpu_kernel[
-    layout: Layout,
     input_size: Int,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
 ):
     comptime assert (
         dtype.is_floating_point()
     ), "dtype must be a floating-point type"
-    var shared_max = LayoutTensor[
-        dtype,
-        Layout.row_major(BLOCK_DIM_X),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var shared_sum = LayoutTensor[
-        dtype,
-        Layout.row_major(BLOCK_DIM_X),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_max = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[BLOCK_DIM_X]())
+    var shared_sum = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[BLOCK_DIM_X]())
     var global_i = thread_idx.x
 
     # Initialize out-of-bounds (shared_max[local_i], global_i >= input_size) shared memory addresses to the minimum
@@ -92,12 +88,11 @@ def softmax_gpu_kernel[
 
 # ANCHOR: softmax_cpu_kernel_solution
 def softmax_cpu_kernel[
-    layout: Layout,
     input_size: Int,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
 ):
     comptime assert (
         dtype.is_floating_point()
@@ -131,32 +126,31 @@ struct SoftmaxCustomOp:
         input_size: Int,
         dtype: DType = DType.float32,
     ](
-        output: OutputTensor[rank=1, static_spec=_],
-        input: InputTensor[rank=output.rank, static_spec=_],
+        output: OutputTensor[dtype=dtype, rank=1, static_spec=_],
+        input: InputTensor[dtype=dtype, rank=output.rank, static_spec=_],
         ctx: DeviceContextPtr,
     ) raises:
-        # Note: rebind is necessary now but it shouldn't be!
-        var output_tensor = rebind[LayoutTensor[dtype, layout, MutAnyOrigin]](
-            output.to_layout_tensor()
-        )
-        var input_tensor = rebind[LayoutTensor[dtype, layout, ImmutAnyOrigin]](
-            input.to_layout_tensor()
-        )
+        var output_tensor = TileTensor[
+            mut=True, dtype, LayoutType, MutAnyOrigin
+        ](output.unsafe_ptr(), layout)
+        var input_tensor = TileTensor[
+            mut=True, dtype, LayoutType, MutAnyOrigin
+        ](input.unsafe_ptr(), layout)
 
         comptime if target == "gpu":
             var gpu_ctx = ctx.get_device_context()
             # making sure the output tensor is zeroed out before the kernel is called
             gpu_ctx.enqueue_memset(
-                DeviceBuffer[output_tensor.dtype](
+                DeviceBuffer[dtype](
                     gpu_ctx,
-                    output_tensor.ptr,
+                    output.unsafe_ptr(),
                     input_size,
                     owning=False,
                 ),
                 0,
             )
 
-            comptime kernel = softmax_gpu_kernel[layout, input_size, dtype]
+            comptime kernel = softmax_gpu_kernel[input_size, dtype]
             gpu_ctx.enqueue_function[kernel, kernel](
                 output_tensor,
                 input_tensor,
@@ -165,8 +159,6 @@ struct SoftmaxCustomOp:
             )
 
         elif target == "cpu":
-            softmax_cpu_kernel[layout, input_size, dtype](
-                output_tensor, input_tensor
-            )
+            softmax_cpu_kernel[input_size, dtype](output_tensor, input_tensor)
         else:
             raise Error("Unsupported target: " + target)
diff --git a/solutions/p18/test/test_softmax.mojo b/solutions/p18/test/test_softmax.mojo
index 70b25871..c506ae79 100644
--- a/solutions/p18/test/test_softmax.mojo
+++ b/solutions/p18/test/test_softmax.mojo
@@ -1,12 +1,14 @@
 from std.gpu.host import DeviceContext
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
 from std.testing import assert_almost_equal
 from std.bit import log2_ceil
 
 from op import softmax_gpu_kernel, softmax_cpu_kernel
 
 comptime SIZE = 128
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 comptime GRID_DIM_X = 1
 comptime BLOCK_DIM_X = 1 << log2_ceil(SIZE)
 comptime dtype = DType.float32
@@ -21,10 +23,11 @@ def test_softmax() raises:
         # for CPU testing
         var expected = ctx.enqueue_create_host_buffer[DType.float32](SIZE)
         expected.enqueue_fill(0)
-        var expected_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            expected
-        )
-        # Initialize input with more reasonable values
+        var expected_tensor = TileTensor[
+            mut=True, dtype, LayoutType, MutAnyOrigin
+        ](expected, layout)
+
+        # Initialize input and compute expected (CPU) inside map_to_host block
         with inp.map_to_host() as inp_host:
             for i in range(SIZE):
                 inp_host[i] = Scalar[dtype](i)
@@ -33,22 +36,21 @@ def test_softmax() raises:
             for i in range(SIZE):
                 print(inp_host[i], end=" ")
             print()
-            # Create layout tensors for CPU calculation
-            input_host_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-                inp_host
-            )
+            # Create layout tensor for CPU calculation (must stay inside with block)
+            var input_host_tensor = TileTensor[
+                mut=True, dtype, LayoutType, MutAnyOrigin
+            ](inp_host, layout)
+            # Compute expected results using our CPU kernel while inp_host is valid
+            softmax_cpu_kernel[SIZE, dtype](expected_tensor, input_host_tensor)
 
         # for GPU testing
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp)
-
-        # Compute expected results using our CPU kernel
-        softmax_cpu_kernel[layout, SIZE, dtype](
-            expected_tensor, input_host_tensor
-        )
+        var output_tensor = TileTensor(out, layout)
+        var input_tensor = TileTensor[
+            mut=True, dtype, LayoutType, MutAnyOrigin
+        ](inp, layout)
 
         # Run GPU kernel
-        comptime kernel = softmax_gpu_kernel[layout, SIZE, dtype]
+        comptime kernel = softmax_gpu_kernel[SIZE, dtype]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
diff --git a/solutions/p19/op/attention.mojo b/solutions/p19/op/attention.mojo
index 600b5ebe..66962e7f 100644
--- a/solutions/p19/op/attention.mojo
+++ b/solutions/p19/op/attention.mojo
@@ -1,9 +1,10 @@
 from std.memory import UnsafePointer
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext, HostBuffer, DeviceBuffer
-from std.gpu.memory import AddressSpace, async_copy_wait_all
-from layout import Layout, LayoutTensor
-from layout.layout_tensor import copy_dram_to_sram_async
+from std.gpu.memory import AddressSpace
+from layout import TileTensor
+from layout.tile_layout import row_major, TensorLayout
+from layout.tile_tensor import stack_allocation
 from std.math import exp
 from std.bit import log2_ceil
 from std.utils.numerics import max_finite, min_finite
@@ -22,24 +23,24 @@ comptime SOFTMAX_BLOCK_DIM_X = 1 << log2_ceil(SEQ_LEN)
 
 
 # Tiled matrix multiplication (from p16), updated to:
-# 1) Support different layouts for input (a, b) and output LayoutTensors.
+# 1) Support different layouts for input (a, b) and output TileTensors.
 # 2) Handle cases where the inner dimension is not a multiple of MATMUL_BLOCK_DIM_XY.
 # 3) Explicitly check for out-of-bounds elements.
-# The approach still tiles all three LayoutTensors (a, b, and output) into identical square tiles
+# The approach still tiles all three TileTensors (a, b, and output) into identical square tiles
 # of size (MATMUL_BLOCK_DIM_XY x MATMUL_BLOCK_DIM_XY) with each thread loading one element
 # from a and b, and writing one element to output.
 def matmul_idiomatic_tiled[
-    a_layout: Layout,
-    b_layout: Layout,
-    out_layout: Layout,
     rows: Int,
     cols: Int,
     inner: Int,
+    OutLayout: TensorLayout,
+    ALayout: TensorLayout,
+    BLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, a_layout, MutAnyOrigin],
-    b: LayoutTensor[dtype, b_layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=True, dtype, ALayout, MutAnyOrigin],
+    b: TileTensor[mut=True, dtype, BLayout, MutAnyOrigin],
 ):
     """Updated idiomatic tiled matrix multiplication from p16."""
     var local_row = thread_idx.y
@@ -51,89 +52,84 @@ def matmul_idiomatic_tiled[
     var out_tile = output.tile[MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY](
         block_idx.y, block_idx.x
     )
-    var a_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var b_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var acc: output.element_type = 0
-
-    comptime load_a_layout = Layout.row_major(
+    comptime shared_layout = row_major[
         MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY
-    )  # Coalesced loading
-    comptime load_b_layout = Layout.row_major(
-        MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY
-    )  # Coalesced loading
+    ]()
+    var a_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](shared_layout)
+    var b_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](shared_layout)
+    var acc: output.ElementType = 0
+
+    var a_lt = a.to_layout_tensor()
+    var b_lt = b.to_layout_tensor()
+    var out_tile_lt = out_tile.to_layout_tensor()
+    var a_shared_lt = a_shared.to_layout_tensor()
+    var b_shared_lt = b_shared.to_layout_tensor()
 
     comptime for idx in range(
         (inner + MATMUL_BLOCK_DIM_XY - 1) // MATMUL_BLOCK_DIM_XY
     ):
         # Get tiles from A and B matrices
-        var a_tile = a.tile[MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY](
-            block_idx.y, idx
-        )
-        var b_tile = b.tile[MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY](
-            idx, block_idx.x
-        )
+        var a_tile_row_start = block_idx.y * MATMUL_BLOCK_DIM_XY
+        var a_tile_col_start = idx * MATMUL_BLOCK_DIM_XY
+        var b_tile_row_start = idx * MATMUL_BLOCK_DIM_XY
+        var b_tile_col_start = block_idx.x * MATMUL_BLOCK_DIM_XY
+
+        # Synchronously load tiles to shared memory - each thread loads one element
+        var a_global_row = a_tile_row_start + local_row
+        var a_global_col = a_tile_col_start + local_col
+        if a_global_row < rows and a_global_col < inner:
+            a_shared_lt[local_row, local_col] = a_lt[a_global_row, a_global_col]
+        else:
+            a_shared_lt[local_row, local_col] = 0
+
+        var b_global_row = b_tile_row_start + local_row
+        var b_global_col = b_tile_col_start + local_col
+        if b_global_row < inner and b_global_col < cols:
+            b_shared_lt[local_row, local_col] = b_lt[b_global_row, b_global_col]
+        else:
+            b_shared_lt[local_row, local_col] = 0
 
-        # Asynchronously copy tiles to shared memory with consistent orientation
-        copy_dram_to_sram_async[
-            thread_layout=load_a_layout,
-            num_threads=MATMUL_NUM_THREADS,
-            block_dim_count=MATMUL_BLOCK_DIM_COUNT,
-        ](a_shared, a_tile)
-        copy_dram_to_sram_async[
-            thread_layout=load_b_layout,
-            num_threads=MATMUL_NUM_THREADS,
-            block_dim_count=MATMUL_BLOCK_DIM_COUNT,
-        ](b_shared, b_tile)
-
-        # Wait for all async copies to complete
-        async_copy_wait_all()
         barrier()
 
         # Compute partial matrix multiplication for this tile
-        comptime for k in range(MATMUL_BLOCK_DIM_XY):
-            if (
-                tiled_row < rows and tiled_col < cols
-            ):  # Only perform calculation for valid outputs
-                if k < a_tile.dim(
-                    1
-                ):  # Only perform calculation on valid inputs
-                    acc += a_shared[local_row, k] * b_shared[k, local_col]
+        comptime k_max = min(
+            MATMUL_BLOCK_DIM_XY, inner - idx * MATMUL_BLOCK_DIM_XY
+        )
+        comptime for k in range(k_max):
+            if tiled_row < rows and tiled_col < cols:
+                acc += rebind[Scalar[dtype]](
+                    a_shared_lt[local_row, k]
+                ) * rebind[Scalar[dtype]](b_shared_lt[k, local_col])
 
         barrier()
 
     # Write final result with bounds checking (needed for attention's variable sizes)
     if tiled_row < rows and tiled_col < cols:
-        out_tile[local_row, local_col] = acc
+        out_tile_lt[local_row, local_col] = acc
 
 
 # ANCHOR: transpose_kernel_solution
 def transpose_kernel[
-    layout_in: Layout,  # Layout for input matrix (seq_len, d)
-    layout_out: Layout,  # Layout for output matrix (d, seq_len)
     rows: Int,
     cols: Int,
+    OutLayout: TensorLayout,
+    InLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, layout_out, MutAnyOrigin],
-    inp: LayoutTensor[dtype, layout_in, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    inp: TileTensor[mut=True, dtype, InLayout, MutAnyOrigin],
 ):
     """Transpose matrix using shared memory tiling for coalesced access."""
-    var shared_tile = LayoutTensor[
-        dtype,
-        Layout.row_major(TRANSPOSE_BLOCK_DIM_XY, TRANSPOSE_BLOCK_DIM_XY),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    comptime shared_layout = row_major[
+        TRANSPOSE_BLOCK_DIM_XY, TRANSPOSE_BLOCK_DIM_XY
+    ]()
+    var shared_tile = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](shared_layout)
 
     var local_row = thread_idx.y
     var local_col = thread_idx.x
@@ -141,8 +137,12 @@ def transpose_kernel[
     var global_row = block_idx.y * TRANSPOSE_BLOCK_DIM_XY + local_row
     var global_col = block_idx.x * TRANSPOSE_BLOCK_DIM_XY + local_col
 
+    var inp_lt = inp.to_layout_tensor()
+    var output_lt = output.to_layout_tensor()
+    var shared_tile_lt = shared_tile.to_layout_tensor()
+
     if global_row < rows and global_col < cols:
-        shared_tile[local_row, local_col] = inp[global_row, global_col]
+        shared_tile_lt[local_row, local_col] = inp_lt[global_row, global_col]
 
     barrier()
 
@@ -152,7 +152,7 @@ def transpose_kernel[
     # Store data from shared memory to global memory (coalesced write)
     # Note: we transpose the shared memory access pattern
     if out_row < cols and out_col < rows:
-        output[out_row, out_col] = shared_tile[local_col, local_row]
+        output_lt[out_row, out_col] = shared_tile_lt[local_col, local_row]
 
 
 # ANCHOR_END: transpose_kernel_solution
@@ -160,36 +160,33 @@ def transpose_kernel[
 
 # Apply softmax to attention scores taken from p16
 def softmax_gpu_kernel[
-    layout: Layout,
     input_size: Int,
+    LayoutType: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
 ):
     comptime assert (
         dtype.is_floating_point()
     ), "dtype must be a floating-point type"
-    var shared_max = LayoutTensor[
-        dtype,
-        Layout.row_major(SOFTMAX_BLOCK_DIM_X),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var shared_sum = LayoutTensor[
-        dtype,
-        Layout.row_major(SOFTMAX_BLOCK_DIM_X),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    comptime softmax_layout = row_major[SOFTMAX_BLOCK_DIM_X]()
+    var shared_max = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](softmax_layout)
+    var shared_sum = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](softmax_layout)
     var global_i = thread_idx.x
+    var input_lt = input.to_layout_tensor()
+    var output_lt = output.to_layout_tensor()
 
     # Initialize out-of-bounds (shared_max[local_i], global_i >= input_size) shared memory addresses to the minimum
     # finite value for dtype, ensuring that if these elements are accessed in the parallel max reduction below they
     # do not influence the result (max(min_finite, x) == x for any x).
     var val: Scalar[dtype] = min_finite[dtype]()
     if global_i < input_size:
-        val = rebind[Scalar[dtype]](input[global_i])
+        val = rebind[Scalar[dtype]](input_lt[global_i])
     shared_max[global_i] = val
 
     barrier()
@@ -227,25 +224,29 @@ def softmax_gpu_kernel[
 
     # Normalize by sum
     if global_i < input_size:
-        output[global_i] = exp_val / block_sum
+        output_lt[global_i] = exp_val / block_sum
 
 
 # CPU implementation for vector attention
 def attention_cpu_kernel[
-    layout_q: Layout,
-    layout_k: Layout,
-    layout_v: Layout,
-    layout_out: Layout,
     seq_len: Int,
     d: Int,
+    OutLayout: TensorLayout,
+    QLayout: TensorLayout,
+    KLayout: TensorLayout,
+    VLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, layout_out, MutAnyOrigin],
-    q: LayoutTensor[dtype, layout_q, MutAnyOrigin],
-    k: LayoutTensor[dtype, layout_k, ImmutAnyOrigin],
-    v: LayoutTensor[dtype, layout_v, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    q: TileTensor[mut=True, dtype, QLayout, MutAnyOrigin],
+    k: TileTensor[mut=True, dtype, KLayout, MutAnyOrigin],
+    v: TileTensor[mut=True, dtype, VLayout, MutAnyOrigin],
 ):
     """CPU implementation of vector attention."""
+    var output_lt = output.to_layout_tensor()
+    var q_lt = q.to_layout_tensor()
+    var k_lt = k.to_layout_tensor()
+    var v_lt = v.to_layout_tensor()
     var scores = List[Float32]()
     var weights = List[Float32]()
     for _ in range(seq_len):
@@ -256,7 +257,9 @@ def attention_cpu_kernel[
     for i in range(seq_len):
         var score: Float32 = 0.0
         for dim in range(d):
-            score = score + rebind[Float32](q[dim]) * rebind[Float32](k[i, dim])
+            score = score + rebind[Float32](q_lt[dim]) * rebind[Float32](
+                k_lt[i, dim]
+            )
         scores[i] = score
 
     var max_score: Float32 = scores[0]
@@ -276,9 +279,9 @@ def attention_cpu_kernel[
         var weighted_sum: Float32 = 0.0
         for i in range(seq_len):
             weighted_sum = weighted_sum + weights[i] * rebind[Float32](
-                v[i, dim]
+                v_lt[i, dim]
             )
-        output[dim] = rebind[Scalar[dtype]](weighted_sum)
+        output_lt[dim] = rebind[Scalar[dtype]](weighted_sum)
 
 
 @compiler.register("attention")
@@ -290,31 +293,42 @@ struct AttentionCustomOp:
         d: Int,
         dtype: DType = DType.float32,
     ](
-        output: OutputTensor[rank=1, static_spec=_],  # Output vector (d,)
-        q: InputTensor[rank=1, static_spec=_],  # Query vector (d,)
-        k: InputTensor[rank=2, static_spec=_],  # Key matrix (seq_len, d)
-        v: InputTensor[rank=2, static_spec=_],  # Value matrix (seq_len, d)
+        output: OutputTensor[
+            dtype=dtype, rank=1, static_spec=_
+        ],  # Output vector (d,)
+        q: InputTensor[dtype=dtype, rank=1, static_spec=_],  # Query vector (d,)
+        k: InputTensor[
+            dtype=dtype, rank=2, static_spec=_
+        ],  # Key matrix (seq_len, d)
+        v: InputTensor[
+            dtype=dtype, rank=2, static_spec=_
+        ],  # Value matrix (seq_len, d)
         ctx: DeviceContextPtr,
     ) raises:
         # Define layouts
-        comptime layout_q = Layout.row_major(d)
-        comptime layout_k = Layout.row_major(seq_len, d)
-        comptime layout_v = Layout.row_major(seq_len, d)
-        comptime layout_out = Layout.row_major(d)
-        comptime layout_scores = Layout.row_major(seq_len)
+        comptime layout_q = row_major[d]()
+        comptime layout_k = row_major[seq_len, d]()
+        comptime layout_v = row_major[seq_len, d]()
+        comptime layout_out = row_major[d]()
+        comptime layout_scores = row_major[seq_len]()
+        comptime QLayout = type_of(layout_q)
+        comptime KLayout = type_of(layout_k)
+        comptime VLayout = type_of(layout_v)
+        comptime OutLayout = type_of(layout_out)
+        comptime ScoresLayout = type_of(layout_scores)
 
         # Convert to layout tensors
-        var output_tensor = rebind[
-            LayoutTensor[dtype, layout_out, MutAnyOrigin]
-        ](output.to_layout_tensor())
-        var q_tensor = rebind[LayoutTensor[dtype, layout_q, MutAnyOrigin]](
-            q.to_layout_tensor()
+        var output_tensor = TileTensor[
+            mut=True, dtype, OutLayout, MutAnyOrigin
+        ](output.unsafe_ptr(), layout_out)
+        var q_tensor = TileTensor[mut=True, dtype, QLayout, MutAnyOrigin](
+            q.unsafe_ptr(), layout_q
         )
-        var k_tensor = rebind[LayoutTensor[dtype, layout_k, ImmutAnyOrigin]](
-            k.to_layout_tensor()
+        var k_tensor = TileTensor[mut=True, dtype, KLayout, MutAnyOrigin](
+            k.unsafe_ptr(), layout_k
         )
-        var v_tensor = rebind[LayoutTensor[dtype, layout_v, MutAnyOrigin]](
-            v.to_layout_tensor()
+        var v_tensor = TileTensor[mut=True, dtype, VLayout, MutAnyOrigin](
+            v.unsafe_ptr(), layout_v
         )
 
         comptime if target == "gpu":
@@ -322,15 +336,20 @@ struct AttentionCustomOp:
 
             # Define layouts for matrix multiplication
             # Q reshaped to (1, d)
-            comptime layout_q_2d = Layout.row_major(1, d)
+            comptime layout_q_2d = row_major[1, d]()
+            comptime Q2DLayout = type_of(layout_q_2d)
             # K^T is (d, seq_len)
-            comptime layout_k_t = Layout.row_major(d, seq_len)
+            comptime layout_k_t = row_major[d, seq_len]()
+            comptime KTLayout = type_of(layout_k_t)
             # Scores as (1, seq_len)
-            comptime layout_scores_2d = Layout.row_major(1, seq_len)
+            comptime layout_scores_2d = row_major[1, seq_len]()
+            comptime Scores2DLayout = type_of(layout_scores_2d)
             # Weights as (1, seq_len)
-            comptime layout_weights_2d = Layout.row_major(1, seq_len)
+            comptime layout_weights_2d = row_major[1, seq_len]()
+            comptime Weights2DLayout = type_of(layout_weights_2d)
             # Result as (1, d)
-            comptime layout_result_2d = Layout.row_major(1, d)
+            comptime layout_result_2d = row_major[1, d]()
+            comptime Result2DLayout = type_of(layout_result_2d)
 
             # Transpose implementation limited to square (TRANSPOSE_BLOCK_DIM_XY x TRANSPOSE_BLOCK_DIM_XY) thread blocks
             comptime transpose_threads_per_block = (
@@ -367,16 +386,16 @@ struct AttentionCustomOp:
                 seq_len
             )  # Reused for scores and weights
 
-            var k_t = LayoutTensor[dtype, layout_k_t, MutAnyOrigin](k_t_buf)
+            var k_t = TileTensor(k_t_buf, layout_k_t)
 
             # ANCHOR: attention_orchestration_solution
 
             # Step 1: Reshape Q from (d,) to (1, d) - no buffer needed
-            var q_2d = q_tensor.reshape[layout_q_2d]()
+            var q_2d = q_tensor.reshape(layout_q_2d)
 
             # Step 2: Transpose K from (seq_len, d) to K^T (d, seq_len)\
             comptime kernel = transpose_kernel[
-                layout_k, layout_k_t, seq_len, d, dtype
+                seq_len, d, KTLayout, KLayout, dtype
             ]
             gpu_ctx.enqueue_function[kernel, kernel](
                 k_t,
@@ -388,16 +407,14 @@ struct AttentionCustomOp:
             # Step 3: Compute attention scores using matmul: Q @ K^T = (1, d) @ (d, seq_len) -> (1, seq_len)
             # This computes Q · K^T[i] = Q · K[i] for each column i of K^T (which is row i of K)
             # Reuse scores_weights_buf as (1, seq_len) for scores
-            var scores_2d = LayoutTensor[dtype, layout_scores_2d, MutAnyOrigin](
-                scores_weights_buf
-            )
+            var scores_2d = TileTensor(scores_weights_buf, layout_scores_2d)
             comptime kernel2 = matmul_idiomatic_tiled[
-                layout_q_2d,
-                layout_k_t,
-                layout_scores_2d,
                 1,
                 seq_len,
                 d,
+                Scores2DLayout,
+                Q2DLayout,
+                KTLayout,
                 dtype,
             ]
             gpu_ctx.enqueue_function[kernel2, kernel2](
@@ -409,30 +426,38 @@ struct AttentionCustomOp:
             )
 
             # Step 4: Reshape scores from (1, seq_len) to (seq_len,) for softmax
-            var weights = scores_2d.reshape[layout_scores]()
-
-            # Step 5: Apply softmax to get attention weights
-            comptime kernel3 = softmax_gpu_kernel[layout_scores, seq_len, dtype]
+            var weights = scores_2d.reshape(layout_scores)
+
+            # Step 5: Apply softmax to get attention weights (in-place)
+            comptime ScoresLayout = type_of(layout_scores)
+            comptime kernel3 = softmax_gpu_kernel[seq_len, ScoresLayout, dtype]
+            # Create two TileTensor views from the underlying buffer to avoid aliasing error
+            var weights_out = TileTensor[
+                mut=True, dtype, ScoresLayout, MutAnyOrigin
+            ](scores_weights_buf, layout_scores)
+            var weights_in = TileTensor[
+                mut=True, dtype, ScoresLayout, MutAnyOrigin
+            ](scores_weights_buf, layout_scores)
             gpu_ctx.enqueue_function[kernel3, kernel3](
-                weights,
-                weights,
+                weights_out,
+                weights_in,
                 grid_dim=softmax_blocks_per_grid,
                 block_dim=softmax_threads,
             )
 
             # Step 6: Reshape weights from (seq_len,) to (1, seq_len) for final matmul
-            var weights_2d = weights.reshape[layout_weights_2d]()
+            var weights_2d = weights.reshape(layout_weights_2d)
 
             # Step 7: Compute final result using matmul: weights @ V = (1, seq_len) @ (seq_len, d) -> (1, d)
             # Reuse out_tensor reshaped as (1, d) for result
-            var result_2d = output_tensor.reshape[layout_result_2d]()
+            var result_2d = output_tensor.reshape(layout_result_2d)
             comptime kernel4 = matmul_idiomatic_tiled[
-                layout_weights_2d,
-                layout_v,
-                layout_result_2d,
                 1,
                 d,
                 seq_len,
+                Result2DLayout,
+                Weights2DLayout,
+                VLayout,
                 dtype,
             ]
             gpu_ctx.enqueue_function[kernel4, kernel4](
@@ -447,7 +472,7 @@ struct AttentionCustomOp:
 
         elif target == "cpu":
             attention_cpu_kernel[
-                layout_q, layout_k, layout_v, layout_out, seq_len, d, dtype
+                seq_len, d, OutLayout, QLayout, KLayout, VLayout, dtype
             ](output_tensor, q_tensor, k_tensor, v_tensor)
 
         else:
diff --git a/solutions/p20/op/conv1d.mojo b/solutions/p20/op/conv1d.mojo
index eb9d86af..63ea3ee4 100644
--- a/solutions/p20/op/conv1d.mojo
+++ b/solutions/p20/op/conv1d.mojo
@@ -2,7 +2,10 @@
 from std.gpu import thread_idx, block_idx, block_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major, TensorLayout
+from layout.tile_tensor import stack_allocation
+from std.utils import Index
 from std.sys import argv
 from std.testing import assert_equal
 
@@ -11,59 +14,56 @@ comptime BLOCKS_PER_GRID = (2, 1)
 
 
 def conv1d_kernel[
-    in_layout: Layout,
-    out_layout: Layout,
-    conv_layout: Layout,
     input_size: Int,
     conv_size: Int,
+    OutLayout: TensorLayout,
+    InLayout: TensorLayout,
+    ConvLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, in_layout, MutAnyOrigin],
-    kernel: LayoutTensor[dtype, conv_layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    input: TileTensor[mut=True, dtype, InLayout, MutAnyOrigin],
+    kernel: TileTensor[mut=True, dtype, ConvLayout, MutAnyOrigin],
 ):
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
+    var input_lt = input.to_layout_tensor()
+    var kernel_lt = kernel.to_layout_tensor()
+    var output_lt = output.to_layout_tensor()
     # first: need to account for padding
-    var shared_a = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB + conv_size - 1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var shared_b = LayoutTensor[
-        dtype,
-        Layout.row_major(conv_size),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_a = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB + conv_size - 1]())
+    var shared_b = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[conv_size]())
     if global_i < input_size:
-        shared_a[local_i] = input[global_i]
+        shared_a[local_i] = rebind[Scalar[dtype]](input_lt[global_i])
 
     # second: load elements needed for convolution at block boundary
     if local_i < conv_size - 1:
         # indices from next block
         var next_idx = global_i + TPB
         if next_idx < input_size:
-            shared_a[TPB + local_i] = input[next_idx]
+            shared_a[TPB + local_i] = rebind[Scalar[dtype]](input_lt[next_idx])
         else:
             # Initialize out-of-bounds elements to 0 to avoid reading from uninitialized memory
             # which is an undefined behavior
             shared_a[TPB + local_i] = 0
 
     if local_i < conv_size:
-        shared_b[local_i] = kernel[local_i]
+        shared_b[local_i] = rebind[Scalar[dtype]](kernel_lt[local_i])
 
     barrier()
 
     if global_i < input_size:
-        var local_sum: output.element_type = 0
+        var local_sum: Scalar[dtype] = 0
 
         comptime for j in range(conv_size):
             if local_i + j < TPB + conv_size - 1:
                 local_sum += shared_a[local_i + j] * shared_b[j]
 
-        output[global_i] = local_sum
+        output_lt.store[1](Index(global_i), local_sum)
 
 
 import compiler
@@ -89,12 +89,20 @@ struct Conv1DCustomOp:
         # the context is needed for some GPU calls
         ctx: DeviceContextPtr,
     ) raises:
-        var out_tensor = output.to_layout_tensor()
-        var input_tensor = input.to_layout_tensor()
-        var kernel_tensor = kernel.to_layout_tensor()
-        comptime in_layout = input_tensor.layout
-        comptime out_layout = out_tensor.layout
-        comptime conv_layout = kernel_tensor.layout
+        comptime out_layout_val = row_major[input_size]()
+        comptime OutLayout = type_of(out_layout_val)
+        comptime conv_layout_val = row_major[conv_size]()
+        comptime ConvLayout = type_of(conv_layout_val)
+
+        var out_tensor = TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin](
+            output.unsafe_ptr(), out_layout_val
+        )
+        var input_tensor = TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin](
+            input.unsafe_ptr(), out_layout_val
+        )
+        var kernel_tensor = TileTensor[
+            mut=True, dtype, ConvLayout, MutAnyOrigin
+        ](kernel.unsafe_ptr(), conv_layout_val)
 
         comptime if target == "gpu":
             var gpu_ctx = ctx.get_device_context()
@@ -102,7 +110,7 @@ struct Conv1DCustomOp:
             gpu_ctx.enqueue_memset(
                 DeviceBuffer[output.dtype](
                     gpu_ctx,
-                    out_tensor.ptr,
+                    output.unsafe_ptr(),
                     input_size,
                     owning=False,
                 ),
@@ -110,7 +118,7 @@ struct Conv1DCustomOp:
             )
             # ANCHOR: conv1d_custom_op_solution
             comptime kernel = conv1d_kernel[
-                in_layout, out_layout, conv_layout, input_size, conv_size
+                input_size, conv_size, OutLayout, OutLayout, ConvLayout
             ]
             gpu_ctx.enqueue_function[kernel, kernel](
                 out_tensor,
diff --git a/solutions/p21/op/embedding.mojo b/solutions/p21/op/embedding.mojo
index 10487336..6f8a47be 100644
--- a/solutions/p21/op/embedding.mojo
+++ b/solutions/p21/op/embedding.mojo
@@ -1,7 +1,8 @@
 from std.math import ceildiv
 from std.gpu import thread_idx, block_idx, block_dim, grid_dim, barrier
 from std.gpu.host import DeviceContext
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major, TensorLayout
 from std.sys import argv
 from std.testing import assert_equal
 
@@ -10,18 +11,18 @@ comptime THREADS_PER_BLOCK = 256
 
 # ANCHOR: embedding_kernel_coalesced_solution
 def embedding_kernel_coalesced[
-    indices_layout: Layout,
-    weights_layout: Layout,
-    out_layout: Layout,
     batch_size: Int,
     seq_len: Int,
     vocab_size: Int,
     embed_dim: Int,
+    OutLayout: TensorLayout,
+    IndicesLayout: TensorLayout,
+    WeightsLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    indices: LayoutTensor[DType.int32, indices_layout, MutAnyOrigin],
-    weights: LayoutTensor[dtype, weights_layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    indices: TileTensor[mut=True, DType.int32, IndicesLayout, MutAnyOrigin],
+    weights: TileTensor[mut=True, dtype, WeightsLayout, MutAnyOrigin],
 ):
     """
     Memory-coalescing focused embedding kernel.
@@ -39,6 +40,10 @@ def embedding_kernel_coalesced[
     if global_idx >= total_elements:
         return
 
+    var output_lt = output.to_layout_tensor()
+    var indices_lt = indices.to_layout_tensor()
+    var weights_lt = weights.to_layout_tensor()
+
     # Convert to (batch, seq, embed) coordinates
     var batch_idx = global_idx // (seq_len * embed_dim)
     var remaining = global_idx % (seq_len * embed_dim)
@@ -46,15 +51,15 @@ def embedding_kernel_coalesced[
     var embed_idx = remaining % embed_dim
 
     # Get token index
-    var token_idx_val = Int(indices[batch_idx, seq_idx])
+    var token_idx_val = Int(indices_lt[batch_idx, seq_idx])
 
     # Simple, correct assignment
     if token_idx_val >= 0 and token_idx_val < vocab_size:
-        output[batch_idx, seq_idx, embed_idx] = weights[
+        output_lt[batch_idx, seq_idx, embed_idx] = weights_lt[
             token_idx_val, embed_idx
         ]
     else:
-        output[batch_idx, seq_idx, embed_idx] = 0
+        output_lt[batch_idx, seq_idx, embed_idx] = 0
 
 
 # ANCHOR_END: embedding_kernel_coalesced_solution
@@ -62,18 +67,18 @@ def embedding_kernel_coalesced[
 
 # ANCHOR: embedding_kernel_2d_solution
 def embedding_kernel_2d[
-    indices_layout: Layout,
-    weights_layout: Layout,
-    out_layout: Layout,
     batch_size: Int,
     seq_len: Int,
     vocab_size: Int,
     embed_dim: Int,
+    OutLayout: TensorLayout,
+    IndicesLayout: TensorLayout,
+    WeightsLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    indices: LayoutTensor[DType.int32, indices_layout, MutAnyOrigin],
-    weights: LayoutTensor[dtype, weights_layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    indices: TileTensor[mut=True, DType.int32, IndicesLayout, MutAnyOrigin],
+    weights: TileTensor[mut=True, dtype, WeightsLayout, MutAnyOrigin],
 ):
     """
     2D grid non-coalesced embedding kernel.
@@ -94,20 +99,24 @@ def embedding_kernel_2d[
     if batch_seq_idx >= total_positions or embed_idx >= embed_dim:
         return
 
+    var output_lt = output.to_layout_tensor()
+    var indices_lt = indices.to_layout_tensor()
+    var weights_lt = weights.to_layout_tensor()
+
     # Convert to (batch, seq) coordinates
     var batch_idx = batch_seq_idx // seq_len
     var seq_idx = batch_seq_idx % seq_len
 
     # Get token index
-    var token_idx_val = Int(indices[batch_idx, seq_idx])
+    var token_idx_val = Int(indices_lt[batch_idx, seq_idx])
 
     # Assignment with 2D grid pattern
     if token_idx_val >= 0 and token_idx_val < vocab_size:
-        output[batch_idx, seq_idx, embed_idx] = weights[
+        output_lt[batch_idx, seq_idx, embed_idx] = weights_lt[
             token_idx_val, embed_idx
         ]
     else:
-        output[batch_idx, seq_idx, embed_idx] = 0
+        output_lt[batch_idx, seq_idx, embed_idx] = 0
 
 
 # ANCHOR_END: embedding_kernel_2d_solution
@@ -141,13 +150,22 @@ struct EmbeddingCustomOp:
         ],  # [vocab_size, embed_dim]
         ctx: DeviceContextPtr,
     ) raises:
-        var output_tensor = output.to_layout_tensor()
-        var indices_tensor = indices.to_layout_tensor()
-        var weights_tensor = weights.to_layout_tensor()
-
-        comptime indices_layout = indices_tensor.layout
-        comptime weights_layout = weights_tensor.layout
-        comptime out_layout = output_tensor.layout
+        comptime out_layout_val = row_major[batch_size, seq_len, embed_dim]()
+        comptime OutLayout = type_of(out_layout_val)
+        comptime indices_layout_val = row_major[batch_size, seq_len]()
+        comptime IndicesLayout = type_of(indices_layout_val)
+        comptime weights_layout_val = row_major[vocab_size, embed_dim]()
+        comptime WeightsLayout = type_of(weights_layout_val)
+
+        var output_tensor = TileTensor[
+            mut=True, output.dtype, OutLayout, MutAnyOrigin
+        ](output.unsafe_ptr(), out_layout_val)
+        var indices_tensor = TileTensor[
+            mut=True, DType.int32, IndicesLayout, MutAnyOrigin
+        ](indices.unsafe_ptr(), indices_layout_val)
+        var weights_tensor = TileTensor[
+            mut=True, output.dtype, WeightsLayout, MutAnyOrigin
+        ](weights.unsafe_ptr(), weights_layout_val)
 
         comptime if target == "gpu":
             var gpu_ctx = ctx.get_device_context()
@@ -156,7 +174,7 @@ struct EmbeddingCustomOp:
             gpu_ctx.enqueue_memset(
                 DeviceBuffer[output.dtype](
                     gpu_ctx,
-                    output_tensor.ptr,
+                    output.unsafe_ptr(),
                     batch_size * seq_len * embed_dim,
                     owning=False,
                 ),
@@ -169,13 +187,13 @@ struct EmbeddingCustomOp:
 
             # Compile and launch optimized kernel
             comptime kernel = embedding_kernel_coalesced[
-                indices_layout,
-                weights_layout,
-                out_layout,
                 batch_size,
                 seq_len,
                 vocab_size,
                 embed_dim,
+                OutLayout,
+                IndicesLayout,
+                WeightsLayout,
                 output.dtype,
             ]
             var compiled_kernel = gpu_ctx.compile_function[kernel, kernel]()
@@ -227,13 +245,22 @@ struct Embedding2DCustomOp:
         ],  # [vocab_size, embed_dim]
         ctx: DeviceContextPtr,
     ) raises:
-        var output_tensor = output.to_layout_tensor()
-        var indices_tensor = indices.to_layout_tensor()
-        var weights_tensor = weights.to_layout_tensor()
-
-        comptime indices_layout = indices_tensor.layout
-        comptime weights_layout = weights_tensor.layout
-        comptime out_layout = output_tensor.layout
+        comptime out_layout_val = row_major[batch_size, seq_len, embed_dim]()
+        comptime OutLayout = type_of(out_layout_val)
+        comptime indices_layout_val = row_major[batch_size, seq_len]()
+        comptime IndicesLayout = type_of(indices_layout_val)
+        comptime weights_layout_val = row_major[vocab_size, embed_dim]()
+        comptime WeightsLayout = type_of(weights_layout_val)
+
+        var output_tensor = TileTensor[
+            mut=True, output.dtype, OutLayout, MutAnyOrigin
+        ](output.unsafe_ptr(), out_layout_val)
+        var indices_tensor = TileTensor[
+            mut=True, DType.int32, IndicesLayout, MutAnyOrigin
+        ](indices.unsafe_ptr(), indices_layout_val)
+        var weights_tensor = TileTensor[
+            mut=True, output.dtype, WeightsLayout, MutAnyOrigin
+        ](weights.unsafe_ptr(), weights_layout_val)
 
         comptime if target == "gpu":
             var gpu_ctx = ctx.get_device_context()
@@ -242,7 +269,7 @@ struct Embedding2DCustomOp:
             gpu_ctx.enqueue_memset(
                 DeviceBuffer[output.dtype](
                     gpu_ctx,
-                    output_tensor.ptr,
+                    output.unsafe_ptr(),
                     batch_size * seq_len * embed_dim,
                     owning=False,
                 ),
@@ -258,13 +285,13 @@ struct Embedding2DCustomOp:
 
             # Compile and launch 2D kernel
             comptime kernel = embedding_kernel_2d[
-                indices_layout,
-                weights_layout,
-                out_layout,
                 batch_size,
                 seq_len,
                 vocab_size,
                 embed_dim,
+                OutLayout,
+                IndicesLayout,
+                WeightsLayout,
                 output.dtype,
             ]
 
diff --git a/solutions/p22/op/layernorm_linear.mojo b/solutions/p22/op/layernorm_linear.mojo
index 3e5a4153..fe9fea3e 100644
--- a/solutions/p22/op/layernorm_linear.mojo
+++ b/solutions/p22/op/layernorm_linear.mojo
@@ -1,9 +1,10 @@
 from std.math import sqrt
 from std.gpu import thread_idx, block_idx, block_dim, barrier
-from std.gpu.memory import async_copy_wait_all, AddressSpace
+from std.gpu.memory import AddressSpace
 from std.os.atomic import Atomic
-from layout import Layout, LayoutTensor
-from layout.layout_tensor import copy_dram_to_sram_async
+from layout import TileTensor
+from layout.tile_layout import row_major, TensorLayout
+from layout.tile_tensor import stack_allocation
 import compiler
 from std.runtime.asyncrt import DeviceContextPtr
 from tensor import InputTensor, OutputTensor
@@ -18,17 +19,17 @@ comptime TRANSPOSE_BLOCK_DIM_XY = 16  # Square blocks for input and output
 # ANCHOR: matmul_idiomatic_tiled
 # Idiomatic tiled matmul from p19.mojo
 def matmul_idiomatic_tiled[
-    a_layout: Layout,
-    b_layout: Layout,
-    out_layout: Layout,
     rows: Int,
     cols: Int,
     inner: Int,
+    OutLayout: TensorLayout,
+    ALayout: TensorLayout,
+    BLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, a_layout, MutAnyOrigin],
-    b: LayoutTensor[dtype, b_layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=True, dtype, ALayout, MutAnyOrigin],
+    b: TileTensor[mut=True, dtype, BLayout, MutAnyOrigin],
 ):
     """Idiomatic tiled matrix multiplication from p19."""
     var local_row = thread_idx.y
@@ -40,69 +41,63 @@ def matmul_idiomatic_tiled[
     var out_tile = output.tile[MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY](
         block_idx.y, block_idx.x
     )
-    var a_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var b_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var acc: output.element_type = 0
-
-    comptime load_a_layout = Layout.row_major(
+    comptime shared_layout = row_major[
         MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY
-    )  # Coalesced loading
-    comptime load_b_layout = Layout.row_major(
-        MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY
-    )  # Coalesced loading
+    ]()
+    var a_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](shared_layout)
+    var b_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](shared_layout)
+    var acc: output.ElementType = 0
+
+    var a_lt = a.to_layout_tensor()
+    var b_lt = b.to_layout_tensor()
+    var out_tile_lt = out_tile.to_layout_tensor()
+    var a_shared_lt = a_shared.to_layout_tensor()
+    var b_shared_lt = b_shared.to_layout_tensor()
 
     comptime for idx in range(
         (inner + MATMUL_BLOCK_DIM_XY - 1) // MATMUL_BLOCK_DIM_XY
     ):
-        # Get tiles from A and B matrices
-        var a_tile = a.tile[MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY](
-            block_idx.y, idx
-        )
-        var b_tile = b.tile[MATMUL_BLOCK_DIM_XY, MATMUL_BLOCK_DIM_XY](
-            idx, block_idx.x
-        )
+        # Synchronously load tiles to shared memory - each thread loads one element
+        var a_tile_row_start = block_idx.y * MATMUL_BLOCK_DIM_XY
+        var a_tile_col_start = idx * MATMUL_BLOCK_DIM_XY
+        var b_tile_row_start = idx * MATMUL_BLOCK_DIM_XY
+        var b_tile_col_start = block_idx.x * MATMUL_BLOCK_DIM_XY
+
+        var a_global_row = a_tile_row_start + local_row
+        var a_global_col = a_tile_col_start + local_col
+        if a_global_row < rows and a_global_col < inner:
+            a_shared_lt[local_row, local_col] = a_lt[a_global_row, a_global_col]
+        else:
+            a_shared_lt[local_row, local_col] = 0
+
+        var b_global_row = b_tile_row_start + local_row
+        var b_global_col = b_tile_col_start + local_col
+        if b_global_row < inner and b_global_col < cols:
+            b_shared_lt[local_row, local_col] = b_lt[b_global_row, b_global_col]
+        else:
+            b_shared_lt[local_row, local_col] = 0
 
-        # Asynchronously copy tiles to shared memory with consistent orientation
-        copy_dram_to_sram_async[
-            thread_layout=load_a_layout,
-            num_threads=MATMUL_NUM_THREADS,
-            block_dim_count=MATMUL_BLOCK_DIM_COUNT,
-        ](a_shared, a_tile)
-        copy_dram_to_sram_async[
-            thread_layout=load_b_layout,
-            num_threads=MATMUL_NUM_THREADS,
-            block_dim_count=MATMUL_BLOCK_DIM_COUNT,
-        ](b_shared, b_tile)
-
-        # Wait for all async copies to complete
-        async_copy_wait_all()
         barrier()
 
         # Compute partial matrix multiplication for this tile
-        comptime for k in range(MATMUL_BLOCK_DIM_XY):
-            if (
-                tiled_row < rows and tiled_col < cols
-            ):  # Only perform calculation for valid outputs
-                if k < a_tile.dim(
-                    1
-                ):  # Only perform calculation on valid inputs
-                    acc += a_shared[local_row, k] * b_shared[k, local_col]
+        comptime k_max = min(
+            MATMUL_BLOCK_DIM_XY, inner - idx * MATMUL_BLOCK_DIM_XY
+        )
+        comptime for k in range(k_max):
+            if tiled_row < rows and tiled_col < cols:
+                acc += rebind[Scalar[dtype]](
+                    a_shared_lt[local_row, k]
+                ) * rebind[Scalar[dtype]](b_shared_lt[k, local_col])
 
         barrier()
 
     # Write final result with bounds checking (needed for variable matrix sizes)
     if tiled_row < rows and tiled_col < cols:
-        out_tile[local_row, local_col] = acc
+        out_tile_lt[local_row, local_col] = acc
 
 
 # ANCHOR_END: matmul_idiomatic_tiled
@@ -110,18 +105,18 @@ def matmul_idiomatic_tiled[
 
 # ANCHOR: layernorm_kernel_solution
 def layernorm_kernel[
-    input_layout: Layout,
-    ln_params_layout: Layout,
-    output_layout: Layout,
     batch_size: Int,
     seq_len: Int,
     hidden_dim: Int,
+    OutputLayout: TensorLayout,
+    InputLayout: TensorLayout,
+    LnParamsLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, output_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, input_layout, ImmutAnyOrigin],
-    ln_weight: LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin],
-    ln_bias: LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutputLayout, MutAnyOrigin],
+    input: TileTensor[mut=True, dtype, InputLayout, MutAnyOrigin],
+    ln_weight: TileTensor[mut=True, dtype, LnParamsLayout, MutAnyOrigin],
+    ln_bias: TileTensor[mut=True, dtype, LnParamsLayout, MutAnyOrigin],
 ):
     var batch_idx = block_idx.x
     var seq_idx = block_idx.y
@@ -134,12 +129,17 @@ def layernorm_kernel[
     ):
         return
 
+    var output_lt = output.to_layout_tensor()
+    var input_lt = input.to_layout_tensor()
+    var ln_weight_lt = ln_weight.to_layout_tensor()
+    var ln_bias_lt = ln_bias.to_layout_tensor()
+
     # Compute statistics for this sequence position (redundant but simple)
     var sum_val: Scalar[dtype] = 0
     var sq_sum: Scalar[dtype] = 0
 
     comptime for h in range(hidden_dim):
-        var val = input[batch_idx, seq_idx, h]
+        var val = input_lt[batch_idx, seq_idx, h]
         sum_val += rebind[Scalar[dtype]](val)
         sq_sum += rebind[Scalar[dtype]](val * val)
 
@@ -148,11 +148,11 @@ def layernorm_kernel[
     var inv_std = 1.0 / sqrt(var_val + 1e-5)
 
     # Apply LayerNorm to this element
-    var input_val = input[batch_idx, seq_idx, hidden_idx]
+    var input_val = input_lt[batch_idx, seq_idx, hidden_idx]
     var normalized = (input_val - mean_val) * inv_std * rebind[Scalar[dtype]](
-        ln_weight[hidden_idx]
-    ) + rebind[Scalar[dtype]](ln_bias[hidden_idx])
-    output[batch_idx, seq_idx, hidden_idx] = normalized
+        ln_weight_lt[hidden_idx]
+    ) + rebind[Scalar[dtype]](ln_bias_lt[hidden_idx])
+    output_lt[batch_idx, seq_idx, hidden_idx] = normalized
 
 
 # ANCHOR_END: layernorm_kernel_solution
@@ -160,33 +160,37 @@ def layernorm_kernel[
 
 # ANCHOR: transpose_kernel_solution
 def transpose_kernel[
-    layout_in: Layout,
-    layout_out: Layout,
     rows: Int,
     cols: Int,
+    OutLayout: TensorLayout,
+    InLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, layout_out, MutAnyOrigin],
-    inp: LayoutTensor[dtype, layout_in, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    inp: TileTensor[mut=True, dtype, InLayout, MutAnyOrigin],
 ):
     """Transpose matrix using shared memory tiling for coalesced access.
     We will learn more about coalesced access in the next part.
     """
-    var shared_tile = LayoutTensor[
-        dtype,
-        Layout.row_major(TRANSPOSE_BLOCK_DIM_XY, TRANSPOSE_BLOCK_DIM_XY),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    comptime shared_layout = row_major[
+        TRANSPOSE_BLOCK_DIM_XY, TRANSPOSE_BLOCK_DIM_XY
+    ]()
+    var shared_tile = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](shared_layout)
 
     var local_row = thread_idx.y
     var local_col = thread_idx.x
 
+    var inp_lt = inp.to_layout_tensor()
+    var output_lt = output.to_layout_tensor()
+    var shared_tile_lt = shared_tile.to_layout_tensor()
+
     var global_row = block_idx.y * TRANSPOSE_BLOCK_DIM_XY + local_row
     var global_col = block_idx.x * TRANSPOSE_BLOCK_DIM_XY + local_col
 
     if global_row < rows and global_col < cols:
-        shared_tile[local_row, local_col] = inp[global_row, global_col]
+        shared_tile_lt[local_row, local_col] = inp_lt[global_row, global_col]
 
     barrier()
 
@@ -196,7 +200,7 @@ def transpose_kernel[
     # Store data from shared memory to global memory (coalesced write)
     # Note: we transpose the shared memory access pattern
     if out_row < cols and out_col < rows:
-        output[out_row, out_col] = shared_tile[local_col, local_row]
+        output_lt[out_row, out_col] = shared_tile_lt[local_col, local_row]
 
 
 # ANCHOR_END: transpose_kernel_solution
@@ -204,17 +208,17 @@ def transpose_kernel[
 
 # ANCHOR: add_bias_kernel
 def add_bias_kernel[
-    input_layout: Layout,
-    bias_layout: Layout,
-    output_layout: Layout,
     batch_size: Int,
     seq_len: Int,
     output_dim: Int,
+    OutputLayout: TensorLayout,
+    InputLayout: TensorLayout,
+    BiasLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, output_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, input_layout, MutAnyOrigin],
-    bias: LayoutTensor[dtype, bias_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutputLayout, MutAnyOrigin],
+    input: TileTensor[mut=True, dtype, InputLayout, MutAnyOrigin],
+    bias: TileTensor[mut=True, dtype, BiasLayout, MutAnyOrigin],
 ):
     """Simple bias addition."""
     var batch_idx = block_idx.x
@@ -224,9 +228,13 @@ def add_bias_kernel[
     if batch_idx >= batch_size or seq_idx >= seq_len or out_idx >= output_dim:
         return
 
-    output[batch_idx, seq_idx, out_idx] = input[
+    var output_lt = output.to_layout_tensor()
+    var input_lt = input.to_layout_tensor()
+    var bias_lt = bias.to_layout_tensor()
+
+    output_lt[batch_idx, seq_idx, out_idx] = input_lt[
         batch_idx, seq_idx, out_idx
-    ] + rebind[Scalar[dtype]](bias[out_idx])
+    ] + rebind[Scalar[dtype]](bias_lt[out_idx])
 
 
 # ANCHOR_END: add_bias_kernel
@@ -234,23 +242,23 @@ def add_bias_kernel[
 
 # ANCHOR: minimal_fused_forward_kernel_solution
 def minimal_fused_kernel[
-    input_layout: Layout,
-    ln_params_layout: Layout,
-    weight_layout: Layout,
-    bias_layout: Layout,
-    output_layout: Layout,
     batch_size: Int,
     seq_len: Int,
     hidden_dim: Int,
     output_dim: Int,
+    OutputLayout: TensorLayout,
+    InputLayout: TensorLayout,
+    LnParamsLayout: TensorLayout,
+    WeightLayout: TensorLayout,
+    BiasLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    output: LayoutTensor[dtype, output_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, input_layout, ImmutAnyOrigin],
-    ln_weight: LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin],
-    ln_bias: LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin],
-    linear_weight: LayoutTensor[dtype, weight_layout, ImmutAnyOrigin],
-    linear_bias: LayoutTensor[dtype, bias_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutputLayout, MutAnyOrigin],
+    input: TileTensor[mut=True, dtype, InputLayout, MutAnyOrigin],
+    ln_weight: TileTensor[mut=True, dtype, LnParamsLayout, MutAnyOrigin],
+    ln_bias: TileTensor[mut=True, dtype, LnParamsLayout, MutAnyOrigin],
+    linear_weight: TileTensor[mut=True, dtype, WeightLayout, MutAnyOrigin],
+    linear_bias: TileTensor[mut=True, dtype, BiasLayout, MutAnyOrigin],
 ):
     """Minimal fused kernel - one thread per sequence position to avoid redundancy.
     """
@@ -262,12 +270,19 @@ def minimal_fused_kernel[
     if batch_idx >= batch_size or seq_idx >= seq_len:
         return
 
+    var output_lt = output.to_layout_tensor()
+    var input_lt = input.to_layout_tensor()
+    var ln_weight_lt = ln_weight.to_layout_tensor()
+    var ln_bias_lt = ln_bias.to_layout_tensor()
+    var linear_weight_lt = linear_weight.to_layout_tensor()
+    var linear_bias_lt = linear_bias.to_layout_tensor()
+
     # Step 1: Compute LayerNorm statistics once per sequence position
     var sum_val: Scalar[dtype] = 0
     var sq_sum: Scalar[dtype] = 0
 
     comptime for h in range(hidden_dim):
-        var val = input[batch_idx, seq_idx, h]
+        var val = input_lt[batch_idx, seq_idx, h]
         sum_val += rebind[Scalar[dtype]](val)
         sq_sum += rebind[Scalar[dtype]](val * val)
 
@@ -280,14 +295,16 @@ def minimal_fused_kernel[
         var acc: Scalar[dtype] = 0
 
         comptime for h in range(hidden_dim):
-            var input_val = input[batch_idx, seq_idx, h]
+            var input_val = input_lt[batch_idx, seq_idx, h]
             var normalized = (input_val - mean_val) * inv_std * rebind[
                 Scalar[dtype]
-            ](ln_weight[h]) + rebind[Scalar[dtype]](ln_bias[h])
-            acc += rebind[Scalar[dtype]](normalized * linear_weight[out_idx, h])
+            ](ln_weight_lt[h]) + rebind[Scalar[dtype]](ln_bias_lt[h])
+            acc += rebind[Scalar[dtype]](
+                normalized * linear_weight_lt[out_idx, h]
+            )
 
-        output[batch_idx, seq_idx, out_idx] = acc + rebind[Scalar[dtype]](
-            linear_bias[out_idx]
+        output_lt[batch_idx, seq_idx, out_idx] = acc + rebind[Scalar[dtype]](
+            linear_bias_lt[out_idx]
         )
 
 
@@ -296,31 +313,33 @@ def minimal_fused_kernel[
 
 # ANCHOR: minimal_fused_backward_kernel_solution
 def minimal_fused_kernel_backward[
-    grad_output_layout: Layout,
-    input_layout: Layout,
-    ln_params_layout: Layout,
-    weight_layout: Layout,
-    grad_input_layout: Layout,
-    grad_ln_weight_layout: Layout,
-    grad_ln_bias_layout: Layout,
-    grad_weight_layout: Layout,
-    grad_bias_layout: Layout,
     batch_size: Int,
     seq_len: Int,
     hidden_dim: Int,
     output_dim: Int,
+    GradInputLayout: TensorLayout,
+    GradLnWeightLayout: TensorLayout,
+    GradLnBiasLayout: TensorLayout,
+    GradWeightLayout: TensorLayout,
+    GradBiasLayout: TensorLayout,
+    GradOutputLayout: TensorLayout,
+    InputLayout: TensorLayout,
+    LnParamsLayout: TensorLayout,
+    WeightLayout: TensorLayout,
     dtype: DType = DType.float32,
 ](
-    grad_input: LayoutTensor[dtype, grad_input_layout, MutAnyOrigin],
-    grad_ln_weight: LayoutTensor[dtype, grad_ln_weight_layout, MutAnyOrigin],
-    grad_ln_bias: LayoutTensor[dtype, grad_ln_bias_layout, MutAnyOrigin],
-    grad_weight: LayoutTensor[dtype, grad_weight_layout, MutAnyOrigin],
-    grad_bias: LayoutTensor[dtype, grad_bias_layout, MutAnyOrigin],
-    grad_output: LayoutTensor[dtype, grad_output_layout, ImmutAnyOrigin],
-    input: LayoutTensor[dtype, input_layout, ImmutAnyOrigin],
-    ln_weight: LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin],
-    ln_bias: LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin],
-    linear_weight: LayoutTensor[dtype, weight_layout, ImmutAnyOrigin],
+    grad_input: TileTensor[mut=True, dtype, GradInputLayout, MutAnyOrigin],
+    grad_ln_weight: TileTensor[
+        mut=True, dtype, GradLnWeightLayout, MutAnyOrigin
+    ],
+    grad_ln_bias: TileTensor[mut=True, dtype, GradLnBiasLayout, MutAnyOrigin],
+    grad_weight: TileTensor[mut=True, dtype, GradWeightLayout, MutAnyOrigin],
+    grad_bias: TileTensor[mut=True, dtype, GradBiasLayout, MutAnyOrigin],
+    grad_output: TileTensor[mut=True, dtype, GradOutputLayout, MutAnyOrigin],
+    input: TileTensor[mut=True, dtype, InputLayout, MutAnyOrigin],
+    ln_weight: TileTensor[mut=True, dtype, LnParamsLayout, MutAnyOrigin],
+    ln_bias: TileTensor[mut=True, dtype, LnParamsLayout, MutAnyOrigin],
+    linear_weight: TileTensor[mut=True, dtype, WeightLayout, MutAnyOrigin],
 ):
     """Fused backward kernel using atomic operations for safe gradient accumulation.
     """
@@ -332,6 +351,17 @@ def minimal_fused_kernel_backward[
     if batch_idx >= batch_size or seq_idx >= seq_len:
         return
 
+    var grad_input_lt = grad_input.to_layout_tensor()
+    var grad_ln_weight_lt = grad_ln_weight.to_layout_tensor()
+    var grad_ln_bias_lt = grad_ln_bias.to_layout_tensor()
+    var grad_weight_lt = grad_weight.to_layout_tensor()
+    var grad_bias_lt = grad_bias.to_layout_tensor()
+    var grad_output_lt = grad_output.to_layout_tensor()
+    var input_lt = input.to_layout_tensor()
+    var ln_weight_lt = ln_weight.to_layout_tensor()
+    var ln_bias_lt = ln_bias.to_layout_tensor()
+    var linear_weight_lt = linear_weight.to_layout_tensor()
+
     # Initialize gradient tensors to zero (block 0,0 only to avoid UB with atomic ops)
     if batch_idx == 0 and seq_idx == 0:
         # Initialize grad_ln_weight and grad_ln_bias
@@ -356,7 +386,7 @@ def minimal_fused_kernel_backward[
     var sq_sum: Scalar[dtype] = 0
 
     comptime for h in range(hidden_dim):
-        var val = input[batch_idx, seq_idx, h]
+        var val = input_lt[batch_idx, seq_idx, h]
         sum_val += rebind[Scalar[dtype]](val)
         sq_sum += rebind[Scalar[dtype]](val * val)
 
@@ -369,28 +399,28 @@ def minimal_fused_kernel_backward[
         var grad_bias_ptr = grad_bias.ptr + out_idx
         _ = Atomic[dtype].fetch_add(
             grad_bias_ptr,
-            rebind[Scalar[dtype]](grad_output[batch_idx, seq_idx, out_idx]),
+            rebind[Scalar[dtype]](grad_output_lt[batch_idx, seq_idx, out_idx]),
         )
 
     # Step 3: Atomically accumulate gradients w.r.t. linear weight
     comptime for out_idx in range(output_dim):
         comptime for h in range(hidden_dim):
-            var input_val = input[batch_idx, seq_idx, h]
+            var input_val = input_lt[batch_idx, seq_idx, h]
             var normalized = (input_val - mean_val) * inv_std
             var ln_output_val = normalized * rebind[Scalar[dtype]](
-                ln_weight[h]
-            ) + rebind[Scalar[dtype]](ln_bias[h])
+                ln_weight_lt[h]
+            ) + rebind[Scalar[dtype]](ln_bias_lt[h])
 
             # Atomic gradient accumulation for linear weight
             var grad_w = (
-                grad_output[batch_idx, seq_idx, out_idx] * ln_output_val
+                grad_output_lt[batch_idx, seq_idx, out_idx] * ln_output_val
             )
             var grad_weight_ptr = grad_weight.ptr + out_idx * hidden_dim + h
             _ = Atomic.fetch_add(grad_weight_ptr, rebind[Scalar[dtype]](grad_w))
 
     # Step 4: Atomically accumulate gradients w.r.t. LayerNorm parameters
     comptime for h in range(hidden_dim):
-        input_val = input[batch_idx, seq_idx, h]
+        input_val = input_lt[batch_idx, seq_idx, h]
         normalized = (input_val - mean_val) * inv_std
 
         # Compute gradient w.r.t. LayerNorm output for this h
@@ -398,8 +428,8 @@ def minimal_fused_kernel_backward[
 
         comptime for out_idx in range(output_dim):
             grad_ln_out = grad_ln_out + rebind[Scalar[dtype]](
-                grad_output[batch_idx, seq_idx, out_idx]
-                * linear_weight[out_idx, h]
+                grad_output_lt[batch_idx, seq_idx, out_idx]
+                * linear_weight_lt[out_idx, h]
             )
 
         # Atomic accumulation of LayerNorm parameter gradients
@@ -418,18 +448,18 @@ def minimal_fused_kernel_backward[
     var sum_grad_normalized_times_normalized: Scalar[dtype] = 0
 
     comptime for h in range(hidden_dim):
-        h_input_val = input[batch_idx, seq_idx, h]
+        h_input_val = input_lt[batch_idx, seq_idx, h]
         h_normalized = (h_input_val - mean_val) * inv_std
 
         var h_grad_ln_out: Scalar[dtype] = 0
 
         comptime for out_idx in range(output_dim):
             h_grad_ln_out = h_grad_ln_out + rebind[Scalar[dtype]](
-                grad_output[batch_idx, seq_idx, out_idx]
-                * linear_weight[out_idx, h]
+                grad_output_lt[batch_idx, seq_idx, out_idx]
+                * linear_weight_lt[out_idx, h]
             )
 
-        h_grad_norm = h_grad_ln_out * rebind[Scalar[dtype]](ln_weight[h])
+        h_grad_norm = h_grad_ln_out * rebind[Scalar[dtype]](ln_weight_lt[h])
         sum_grad_normalized = sum_grad_normalized + rebind[Scalar[dtype]](
             h_grad_norm
         )
@@ -440,19 +470,19 @@ def minimal_fused_kernel_backward[
 
     # Compute actual input gradients (no race conditions here - each thread writes to different positions)
     comptime for h in range(hidden_dim):
-        h_input_val = input[batch_idx, seq_idx, h]
+        h_input_val = input_lt[batch_idx, seq_idx, h]
         h_normalized = (h_input_val - mean_val) * inv_std
 
         var h_grad_ln_out: Scalar[dtype] = 0
 
         comptime for out_idx in range(output_dim):
             h_grad_ln_out = h_grad_ln_out + rebind[Scalar[dtype]](
-                grad_output[batch_idx, seq_idx, out_idx]
-                * linear_weight[out_idx, h]
+                grad_output_lt[batch_idx, seq_idx, out_idx]
+                * linear_weight_lt[out_idx, h]
             )
 
-        h_grad_norm = h_grad_ln_out * rebind[Scalar[dtype]](ln_weight[h])
-        grad_input[batch_idx, seq_idx, h] = inv_std * (
+        h_grad_norm = h_grad_ln_out * rebind[Scalar[dtype]](ln_weight_lt[h])
+        grad_input_lt[batch_idx, seq_idx, h] = inv_std * (
             h_grad_norm
             - (sum_grad_normalized / hidden_dim)
             - (h_normalized * sum_grad_normalized_times_normalized / hidden_dim)
@@ -482,31 +512,37 @@ struct LayerNormLinearCustomOp:
         linear_bias: InputTensor[dtype=dtype, rank=1, static_spec=_],
         ctx: DeviceContextPtr,
     ) raises:
-        comptime input_layout = input.static_spec.to_layout()
-        comptime ln_params_layout = ln_weight.static_spec.to_layout()
-        comptime weight_layout = linear_weight.static_spec.to_layout()
-        comptime bias_layout = linear_bias.static_spec.to_layout()
-        comptime output_layout = output.static_spec.to_layout()
-
-        # Note: rebind is necessary now but it shouldn't be!
-        var output_tensor = rebind[
-            LayoutTensor[dtype, output_layout, MutAnyOrigin]
-        ](output.to_layout_tensor())
-        var input_tensor = rebind[
-            LayoutTensor[dtype, input_layout, ImmutAnyOrigin]
-        ](input.to_layout_tensor())
-        var ln_weight_tensor = rebind[
-            LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin]
-        ](ln_weight.to_layout_tensor())
-        var ln_bias_tensor = rebind[
-            LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin]
-        ](ln_bias.to_layout_tensor())
-        var linear_weight_tensor = rebind[
-            LayoutTensor[dtype, weight_layout, ImmutAnyOrigin]
-        ](linear_weight.to_layout_tensor())
-        var linear_bias_tensor = rebind[
-            LayoutTensor[dtype, bias_layout, ImmutAnyOrigin]
-        ](linear_bias.to_layout_tensor())
+        comptime input_layout_val = row_major[batch_size, seq_len, hidden_dim]()
+        comptime ln_params_layout_val = row_major[hidden_dim]()
+        comptime weight_layout_val = row_major[output_dim, hidden_dim]()
+        comptime bias_layout_val = row_major[output_dim]()
+        comptime output_layout_val = row_major[
+            batch_size, seq_len, output_dim
+        ]()
+        comptime InputLayout = type_of(input_layout_val)
+        comptime LnParamsLayout = type_of(ln_params_layout_val)
+        comptime WeightLayout = type_of(weight_layout_val)
+        comptime BiasLayout = type_of(bias_layout_val)
+        comptime OutputLayout = type_of(output_layout_val)
+
+        var output_tensor = TileTensor[
+            mut=True, dtype, OutputLayout, MutAnyOrigin
+        ](output.unsafe_ptr(), output_layout_val)
+        var input_tensor = TileTensor[
+            mut=True, dtype, InputLayout, MutAnyOrigin
+        ](input.unsafe_ptr(), input_layout_val)
+        var ln_weight_tensor = TileTensor[
+            mut=True, dtype, LnParamsLayout, MutAnyOrigin
+        ](ln_weight.unsafe_ptr(), ln_params_layout_val)
+        var ln_bias_tensor = TileTensor[
+            mut=True, dtype, LnParamsLayout, MutAnyOrigin
+        ](ln_bias.unsafe_ptr(), ln_params_layout_val)
+        var linear_weight_tensor = TileTensor[
+            mut=True, dtype, WeightLayout, MutAnyOrigin
+        ](linear_weight.unsafe_ptr(), weight_layout_val)
+        var linear_bias_tensor = TileTensor[
+            mut=True, dtype, BiasLayout, MutAnyOrigin
+        ](linear_bias.unsafe_ptr(), bias_layout_val)
 
         comptime if target == "gpu":
             var gpu_ctx = ctx.get_device_context()
@@ -515,15 +551,15 @@ struct LayerNormLinearCustomOp:
             comptime if algorithm == "fused":
                 # fused case - one thread per sequence position
                 comptime kernel = minimal_fused_kernel[
-                    input_layout,
-                    ln_params_layout,
-                    weight_layout,
-                    bias_layout,
-                    output_layout,
                     batch_size,
                     seq_len,
                     hidden_dim,
                     output_dim,
+                    OutputLayout,
+                    InputLayout,
+                    LnParamsLayout,
+                    WeightLayout,
+                    BiasLayout,
                 ]
                 gpu_ctx.enqueue_function[kernel, kernel](
                     output_tensor,
@@ -541,18 +577,18 @@ struct LayerNormLinearCustomOp:
                 var normalized_buffer = gpu_ctx.enqueue_create_buffer[dtype](
                     batch_size * seq_len * hidden_dim
                 )
-                var normalized_tensor = LayoutTensor[
-                    dtype, input_layout, MutAnyOrigin
-                ](normalized_buffer)
+                var normalized_tensor = TileTensor[
+                    mut=True, dtype, InputLayout, MutAnyOrigin
+                ](normalized_buffer, input_layout_val)
 
                 # Step 1: LayerNorm kernel
                 comptime kernel = layernorm_kernel[
-                    input_layout,
-                    ln_params_layout,
-                    input_layout,
                     batch_size,
                     seq_len,
                     hidden_dim,
+                    InputLayout,
+                    InputLayout,
+                    LnParamsLayout,
                 ]
                 gpu_ctx.enqueue_function[kernel, kernel](
                     normalized_tensor,
@@ -577,19 +613,26 @@ struct LayerNormLinearCustomOp:
                 var matmul_buffer = gpu_ctx.enqueue_create_buffer[dtype](
                     batch_size * seq_len * output_dim
                 )
-                var matmul_tensor = LayoutTensor[
-                    dtype, output_layout, MutAnyOrigin
-                ](matmul_buffer)
+                var matmul_tensor = TileTensor[
+                    mut=True, dtype, OutputLayout, MutAnyOrigin
+                ](matmul_buffer, output_layout_val)
 
                 # Create transposed weight matrix: [output_dim, hidden_dim] -> [hidden_dim, output_dim]
                 var transposed_weight_buffer = gpu_ctx.enqueue_create_buffer[
                     dtype
                 ](hidden_dim * output_dim)
-                var transposed_weight_tensor = LayoutTensor[
+                comptime transposed_weight_layout = row_major[
+                    hidden_dim, output_dim
+                ]()
+                comptime TransposedWeightLayout = type_of(
+                    transposed_weight_layout
+                )
+                var transposed_weight_tensor = TileTensor[
+                    mut=True,
                     dtype,
-                    Layout.row_major(hidden_dim, output_dim),
+                    TransposedWeightLayout,
                     MutAnyOrigin,
-                ](transposed_weight_buffer)
+                ](transposed_weight_buffer, transposed_weight_layout)
 
                 # Transpose the weight matrix
                 var transpose_blocks_x = (
@@ -599,10 +642,10 @@ struct LayerNormLinearCustomOp:
                     output_dim + TRANSPOSE_BLOCK_DIM_XY - 1
                 ) // TRANSPOSE_BLOCK_DIM_XY
                 comptime kernel2 = transpose_kernel[
-                    weight_layout,
-                    transposed_weight_tensor.layout,
                     output_dim,
                     hidden_dim,
+                    TransposedWeightLayout,
+                    WeightLayout,
                 ]
                 gpu_ctx.enqueue_function[kernel2, kernel2](
                     transposed_weight_tensor,
@@ -612,20 +655,26 @@ struct LayerNormLinearCustomOp:
                 )
 
                 # Reshape tensors for matmul: [batch*seq, hidden] @ [hidden, output] -> [batch*seq, output]
-                var flat_normalized = normalized_tensor.reshape[
-                    Layout.row_major(batch_size * seq_len, hidden_dim)
+                comptime flat_normalized_layout = row_major[
+                    batch_size * seq_len, hidden_dim
                 ]()
-                var flat_matmul = matmul_tensor.reshape[
-                    Layout.row_major(batch_size * seq_len, output_dim)
+                comptime FlatNormalizedLayout = type_of(flat_normalized_layout)
+                comptime flat_matmul_layout = row_major[
+                    batch_size * seq_len, output_dim
                 ]()
+                comptime FlatMatmulLayout = type_of(flat_matmul_layout)
+                var flat_normalized = normalized_tensor.reshape(
+                    flat_normalized_layout
+                )
+                var flat_matmul = matmul_tensor.reshape(flat_matmul_layout)
 
                 comptime kernel3 = matmul_idiomatic_tiled[
-                    flat_normalized.layout,
-                    transposed_weight_tensor.layout,
-                    flat_matmul.layout,
                     batch_size * seq_len,
                     output_dim,
                     hidden_dim,
+                    FlatMatmulLayout,
+                    FlatNormalizedLayout,
+                    TransposedWeightLayout,
                 ]
                 gpu_ctx.enqueue_function[kernel3, kernel3](
                     flat_matmul,
@@ -636,17 +685,21 @@ struct LayerNormLinearCustomOp:
                 )
 
                 # Step 3: Add bias - reshape matmul result back to 3D for bias addition
-                var reshaped_matmul = matmul_tensor.reshape[
-                    Layout.row_major(batch_size, seq_len, output_dim)
+                comptime reshaped_matmul_layout = row_major[
+                    batch_size, seq_len, output_dim
                 ]()
+                comptime ReshapedMatmulLayout = type_of(reshaped_matmul_layout)
+                var reshaped_matmul = matmul_tensor.reshape(
+                    reshaped_matmul_layout
+                )
 
                 comptime kernel4 = add_bias_kernel[
-                    reshaped_matmul.layout,
-                    bias_layout,
-                    output_layout,
                     batch_size,
                     seq_len,
                     output_dim,
+                    OutputLayout,
+                    ReshapedMatmulLayout,
+                    BiasLayout,
                 ]
                 gpu_ctx.enqueue_function[kernel4, kernel4](
                     output_tensor,
@@ -722,65 +775,78 @@ struct LayerNormLinearBackwardCustomOp:
         linear_weight: InputTensor[dtype=dtype, rank=2, static_spec=_],
         ctx: DeviceContextPtr,
     ) raises:
-        comptime grad_output_layout = grad_output.static_spec.to_layout()
-        comptime input_layout = input.static_spec.to_layout()
-        comptime ln_params_layout = ln_weight.static_spec.to_layout()
-        comptime weight_layout = linear_weight.static_spec.to_layout()
-        comptime grad_input_layout = grad_input.static_spec.to_layout()
-        comptime grad_ln_weight_layout = grad_ln_weight.static_spec.to_layout()
-        comptime grad_ln_bias_layout = grad_ln_bias.static_spec.to_layout()
-        comptime grad_weight_layout = grad_weight.static_spec.to_layout()
-        comptime grad_bias_layout = grad_bias.static_spec.to_layout()
-
-        var grad_input_tensor = rebind[
-            LayoutTensor[dtype, grad_input_layout, MutAnyOrigin]
-        ](grad_input.to_layout_tensor())
-        var grad_ln_weight_tensor = rebind[
-            LayoutTensor[dtype, grad_ln_weight_layout, MutAnyOrigin]
-        ](grad_ln_weight.to_layout_tensor())
-        var grad_ln_bias_tensor = rebind[
-            LayoutTensor[dtype, grad_ln_bias_layout, MutAnyOrigin]
-        ](grad_ln_bias.to_layout_tensor())
-        var grad_weight_tensor = rebind[
-            LayoutTensor[dtype, grad_weight_layout, MutAnyOrigin]
-        ](grad_weight.to_layout_tensor())
-        var grad_bias_tensor = rebind[
-            LayoutTensor[dtype, grad_bias_layout, MutAnyOrigin]
-        ](grad_bias.to_layout_tensor())
-        var grad_output_tensor = rebind[
-            LayoutTensor[dtype, grad_output_layout, ImmutAnyOrigin]
-        ](grad_output.to_layout_tensor())
-        var input_tensor = rebind[
-            LayoutTensor[dtype, input_layout, ImmutAnyOrigin]
-        ](input.to_layout_tensor())
-        var ln_weight_tensor = rebind[
-            LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin]
-        ](ln_weight.to_layout_tensor())
-        var ln_bias_tensor = rebind[
-            LayoutTensor[dtype, ln_params_layout, ImmutAnyOrigin]
-        ](ln_bias.to_layout_tensor())
-        var linear_weight_tensor = rebind[
-            LayoutTensor[dtype, weight_layout, ImmutAnyOrigin]
-        ](linear_weight.to_layout_tensor())
+        comptime input_layout_val = row_major[batch_size, seq_len, hidden_dim]()
+        comptime ln_params_layout_val = row_major[hidden_dim]()
+        comptime weight_layout_val = row_major[output_dim, hidden_dim]()
+        comptime grad_input_layout_val = row_major[
+            batch_size, seq_len, hidden_dim
+        ]()
+        comptime grad_ln_weight_layout_val = row_major[hidden_dim]()
+        comptime grad_ln_bias_layout_val = row_major[hidden_dim]()
+        comptime grad_weight_layout_val = row_major[output_dim, hidden_dim]()
+        comptime grad_bias_layout_val = row_major[output_dim]()
+        comptime grad_output_layout_val = row_major[
+            batch_size, seq_len, output_dim
+        ]()
+        comptime GradOutputLayout = type_of(grad_output_layout_val)
+        comptime InputLayout = type_of(input_layout_val)
+        comptime LnParamsLayout = type_of(ln_params_layout_val)
+        comptime WeightLayout = type_of(weight_layout_val)
+        comptime GradInputLayout = type_of(grad_input_layout_val)
+        comptime GradLnWeightLayout = type_of(grad_ln_weight_layout_val)
+        comptime GradLnBiasLayout = type_of(grad_ln_bias_layout_val)
+        comptime GradWeightLayout = type_of(grad_weight_layout_val)
+        comptime GradBiasLayout = type_of(grad_bias_layout_val)
+
+        var grad_input_tensor = TileTensor[
+            mut=True, dtype, GradInputLayout, MutAnyOrigin
+        ](grad_input.unsafe_ptr(), grad_input_layout_val)
+        var grad_ln_weight_tensor = TileTensor[
+            mut=True, dtype, GradLnWeightLayout, MutAnyOrigin
+        ](grad_ln_weight.unsafe_ptr(), grad_ln_weight_layout_val)
+        var grad_ln_bias_tensor = TileTensor[
+            mut=True, dtype, GradLnBiasLayout, MutAnyOrigin
+        ](grad_ln_bias.unsafe_ptr(), grad_ln_bias_layout_val)
+        var grad_weight_tensor = TileTensor[
+            mut=True, dtype, GradWeightLayout, MutAnyOrigin
+        ](grad_weight.unsafe_ptr(), grad_weight_layout_val)
+        var grad_bias_tensor = TileTensor[
+            mut=True, dtype, GradBiasLayout, MutAnyOrigin
+        ](grad_bias.unsafe_ptr(), grad_bias_layout_val)
+        var grad_output_tensor = TileTensor[
+            mut=True, dtype, GradOutputLayout, MutAnyOrigin
+        ](grad_output.unsafe_ptr(), grad_output_layout_val)
+        var input_tensor = TileTensor[
+            mut=True, dtype, InputLayout, MutAnyOrigin
+        ](input.unsafe_ptr(), input_layout_val)
+        var ln_weight_tensor = TileTensor[
+            mut=True, dtype, LnParamsLayout, MutAnyOrigin
+        ](ln_weight.unsafe_ptr(), ln_params_layout_val)
+        var ln_bias_tensor = TileTensor[
+            mut=True, dtype, LnParamsLayout, MutAnyOrigin
+        ](ln_bias.unsafe_ptr(), ln_params_layout_val)
+        var linear_weight_tensor = TileTensor[
+            mut=True, dtype, WeightLayout, MutAnyOrigin
+        ](linear_weight.unsafe_ptr(), weight_layout_val)
 
         comptime if target == "gpu":
             var gpu_ctx = ctx.get_device_context()
 
             # Launch backward kernel
             comptime kernel = minimal_fused_kernel_backward[
-                grad_output_layout,
-                input_layout,
-                ln_params_layout,
-                weight_layout,
-                grad_input_layout,
-                grad_ln_weight_layout,
-                grad_ln_bias_layout,
-                grad_weight_layout,
-                grad_bias_layout,
                 batch_size,
                 seq_len,
                 hidden_dim,
                 output_dim,
+                GradInputLayout,
+                GradLnWeightLayout,
+                GradLnBiasLayout,
+                GradWeightLayout,
+                GradBiasLayout,
+                GradOutputLayout,
+                InputLayout,
+                LnParamsLayout,
+                WeightLayout,
             ]
             gpu_ctx.enqueue_function[kernel, kernel](
                 grad_input_tensor,
diff --git a/solutions/p23/p23.mojo b/solutions/p23/p23.mojo
index 49a1c04a..9ab446a6 100644
--- a/solutions/p23/p23.mojo
+++ b/solutions/p23/p23.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_dim, block_idx, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.host.compile import get_gpu_target
-from layout import Layout, LayoutTensor
+from layout import TileTensor, LayoutTensor
+from layout.tile_layout import row_major, TensorLayout
+from layout.tile_tensor import stack_allocation
 from std.utils import Index, IndexList
 from std.math import log2
 from std.algorithm.functional import elementwise, vectorize
@@ -11,18 +13,19 @@ from std.benchmark import Bench, BenchConfig, Bencher, BenchId, keep
 
 comptime SIZE = 1024
 comptime rank = 1
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 comptime dtype = DType.float32
 comptime SIMD_WIDTH = simd_width_of[dtype, target=get_gpu_target()]()
 
 
 # ANCHOR: elementwise_add_solution
 def elementwise_add[
-    layout: Layout, dtype: DType, simd_width: Int, rank: Int, size: Int
+    LayoutT: TensorLayout, dtype: DType, simd_width: Int, rank: Int, size: Int
 ](
-    output: LayoutTensor[mut=True, dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
-    b: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutT, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
     ctx: DeviceContext,
 ) raises:
     @parameter
@@ -31,18 +34,19 @@ def elementwise_add[
         simd_width: Int, rank: Int, alignment: Int = align_of[dtype]()
     ](indices: IndexList[rank]) capturing -> None:
         var idx = indices[0]
+        # Convert inside GPU kernel to avoid host-captured LayoutTensor issues
+        var a_lt = a.to_layout_tensor()
+        var b_lt = b.to_layout_tensor()
+        var out_lt = output.to_layout_tensor()
         # Note: This is thread-local SIMD - each thread processes its own vector of data
         # we'll later better see this hierarchy in Mojo:
         # SIMD within threads, warp across threads, block across warps
-        var a_simd = a.aligned_load[width=simd_width](Index(idx))
-        var b_simd = b.aligned_load[width=simd_width](Index(idx))
+        var a_simd = a_lt.aligned_load[width=simd_width](Index(idx))
+        var b_simd = b_lt.aligned_load[width=simd_width](Index(idx))
         var ret = a_simd + b_simd
-        # print(
-        #     "idx:", idx, ", a_simd:", a_simd, ", b_simd:", b_simd, " sum:", ret
-        # )
-        output.store[simd_width](Index(idx), ret)
+        out_lt.store[simd_width](Index(idx), ret)
 
-    elementwise[add, SIMD_WIDTH, target="gpu"](a.size(), ctx)
+    elementwise[add, SIMD_WIDTH, target="gpu"](size, ctx)
 
 
 # ANCHOR_END: elementwise_add_solution
@@ -53,16 +57,16 @@ comptime TILE_SIZE = 32
 
 
 def tiled_elementwise_add[
-    layout: Layout,
+    LayoutT: TensorLayout,
     dtype: DType,
     simd_width: Int,
     rank: Int,
     size: Int,
     tile_size: Int,
 ](
-    output: LayoutTensor[mut=True, dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
-    b: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutT, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
     ctx: DeviceContext,
 ) raises:
     @parameter
@@ -72,13 +76,13 @@ def tiled_elementwise_add[
     ](indices: IndexList[rank]) capturing -> None:
         var tile_id = indices[0]
 
-        var output_tile = output.tile[tile_size](tile_id)
-        var a_tile = a.tile[tile_size](tile_id)
-        var b_tile = b.tile[tile_size](tile_id)
+        var output_tile = output.tile[tile_size](tile_id).to_layout_tensor()
+        var a_tile = a.tile[tile_size](tile_id).to_layout_tensor()
+        var b_tile = b.tile[tile_size](tile_id).to_layout_tensor()
 
         comptime for i in range(tile_size):
-            var a_vec = a_tile.load[simd_width](Index(i))
-            var b_vec = b_tile.load[simd_width](Index(i))
+            var a_vec = a_tile.aligned_load[width=simd_width](Index(i))
+            var b_vec = b_tile.aligned_load[width=simd_width](Index(i))
             var ret = a_vec + b_vec
             output_tile.store[simd_width](Index(i), ret)
 
@@ -91,7 +95,7 @@ def tiled_elementwise_add[
 
 # ANCHOR: manual_vectorized_tiled_elementwise_add_solution
 def manual_vectorized_tiled_elementwise_add[
-    layout: Layout,
+    LayoutT: TensorLayout,
     dtype: DType,
     simd_width: Int,
     num_threads_per_tile: Int,
@@ -99,9 +103,9 @@ def manual_vectorized_tiled_elementwise_add[
     size: Int,
     tile_size: Int,
 ](
-    output: LayoutTensor[mut=True, dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
-    b: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutT, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
     ctx: DeviceContext,
 ) raises:
     # Each tile contains tile_size groups of simd_width elements
@@ -113,20 +117,18 @@ def manual_vectorized_tiled_elementwise_add[
         num_threads_per_tile: Int, rank: Int, alignment: Int = align_of[dtype]()
     ](indices: IndexList[rank]) capturing -> None:
         var tile_id = indices[0]
-
-        var output_tile = output.tile[chunk_size](tile_id)
-        var a_tile = a.tile[chunk_size](tile_id)
-        var b_tile = b.tile[chunk_size](tile_id)
+        # Convert inside GPU kernel to avoid host-captured LayoutTensor issues
+        var a_lt = a.to_layout_tensor()
+        var b_lt = b.to_layout_tensor()
+        var out_lt = output.to_layout_tensor()
 
         comptime for i in range(tile_size):
             var global_start = tile_id * chunk_size + i * simd_width
 
-            var a_vec = a.aligned_load[simd_width](Index(global_start))
-            var b_vec = b.aligned_load[simd_width](Index(global_start))
+            var a_vec = a_lt.aligned_load[width=simd_width](Index(global_start))
+            var b_vec = b_lt.aligned_load[width=simd_width](Index(global_start))
             var ret = a_vec + b_vec
-            # print("tile:", tile_id, "simd_group:", i, "global_start:", global_start, "a_vec:", a_vec, "b_vec:", b_vec, "result:", ret)
-
-            output.store[simd_width](Index(global_start), ret)
+            out_lt.store[simd_width](Index(global_start), ret)
 
     # Number of tiles needed: each tile processes chunk_size elements
     var num_tiles = (size + chunk_size - 1) // chunk_size
@@ -140,7 +142,7 @@ def manual_vectorized_tiled_elementwise_add[
 
 # ANCHOR: vectorize_within_tiles_elementwise_add_solution
 def vectorize_within_tiles_elementwise_add[
-    layout: Layout,
+    LayoutT: TensorLayout,
     dtype: DType,
     simd_width: Int,
     num_threads_per_tile: Int,
@@ -148,9 +150,9 @@ def vectorize_within_tiles_elementwise_add[
     size: Int,
     tile_size: Int,
 ](
-    output: LayoutTensor[mut=True, dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
-    b: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutT, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutT, MutAnyOrigin],
     ctx: DeviceContext,
 ) raises:
     # Each tile contains tile_size elements (not SIMD groups)
@@ -163,16 +165,20 @@ def vectorize_within_tiles_elementwise_add[
         var tile_start = tile_id * tile_size
         var tile_end = min(tile_start + tile_size, size)
         var actual_tile_size = tile_end - tile_start
+        # Convert inside GPU kernel to avoid host-captured LayoutTensor issues
+        var a_lt = a.to_layout_tensor()
+        var b_lt = b.to_layout_tensor()
+        var out_lt = output.to_layout_tensor()
 
         def vectorized_add[
             width: Int
-        ](i: Int) unified {read tile_start, read a, read b, mut output}:
+        ](i: Int) unified {read tile_start, read a_lt, read b_lt, mut out_lt}:
             var global_idx = tile_start + i
             if global_idx + width <= size:
-                var a_vec = a.aligned_load[width](Index(global_idx))
-                var b_vec = b.aligned_load[width](Index(global_idx))
+                var a_vec = a_lt.aligned_load[width](Index(global_idx))
+                var b_vec = b_lt.aligned_load[width](Index(global_idx))
                 var result = a_vec + b_vec
-                output.store[width](Index(global_idx), result)
+                out_lt.store[width](Index(global_idx), result)
 
         # Use vectorize within each tile
         vectorize[simd_width](actual_tile_size, vectorized_add)
@@ -192,7 +198,8 @@ def benchmark_elementwise_parameterized[
     test_size: Int, tile_size: Int
 ](mut b: Bencher) raises:
     var bench_ctx = DeviceContext()
-    comptime layout = Layout.row_major(test_size)
+    comptime bench_layout = row_major[test_size]()
+    comptime BenchLayoutType = type_of(bench_layout)
     var out = bench_ctx.enqueue_create_buffer[dtype](test_size)
     out.enqueue_fill(0)
     var a = bench_ctx.enqueue_create_buffer[dtype](test_size)
@@ -205,20 +212,20 @@ def benchmark_elementwise_parameterized[
             a_host[i] = Scalar[dtype](2 * i)
             b_host[i] = Scalar[dtype](2 * i + 1)
 
-    var a_tensor = LayoutTensor[mut=False, dtype, layout, MutAnyOrigin](
-        a.unsafe_ptr()
-    )
-    var b_tensor = LayoutTensor[mut=False, dtype, layout, MutAnyOrigin](
-        b_buf.unsafe_ptr()
-    )
-    var out_tensor = LayoutTensor[mut=True, dtype, layout, MutAnyOrigin](
-        out.unsafe_ptr()
+    var a_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](a, bench_layout)
+    var b_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](b_buf, bench_layout)
+    var out_tensor = TileTensor[mut=True, dtype, BenchLayoutType, MutAnyOrigin](
+        out, bench_layout
     )
 
     @parameter
     @always_inline
     def elementwise_workflow(ctx: DeviceContext) raises:
-        elementwise_add[layout, dtype, SIMD_WIDTH, rank, test_size](
+        elementwise_add[BenchLayoutType, dtype, SIMD_WIDTH, rank, test_size](
             out_tensor, a_tensor, b_tensor, ctx
         )
 
@@ -233,7 +240,8 @@ def benchmark_tiled_parameterized[
     test_size: Int, tile_size: Int
 ](mut b: Bencher) raises:
     var bench_ctx = DeviceContext()
-    comptime layout = Layout.row_major(test_size)
+    comptime bench_layout = row_major[test_size]()
+    comptime BenchLayoutType = type_of(bench_layout)
     var out = bench_ctx.enqueue_create_buffer[dtype](test_size)
     out.enqueue_fill(0)
     var a = bench_ctx.enqueue_create_buffer[dtype](test_size)
@@ -246,15 +254,21 @@ def benchmark_tiled_parameterized[
             a_host[i] = Scalar[dtype](2 * i)
             b_host[i] = Scalar[dtype](2 * i + 1)
 
-    var a_tensor = LayoutTensor[mut=False, dtype, layout](a.unsafe_ptr())
-    var b_tensor = LayoutTensor[mut=False, dtype, layout](b_buf.unsafe_ptr())
-    var out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
+    var a_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](a, bench_layout)
+    var b_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](b_buf, bench_layout)
+    var out_tensor = TileTensor[mut=True, dtype, BenchLayoutType, MutAnyOrigin](
+        out, bench_layout
+    )
 
     @parameter
     @always_inline
     def tiled_workflow(ctx: DeviceContext) raises:
         tiled_elementwise_add[
-            layout, dtype, SIMD_WIDTH, rank, test_size, tile_size
+            BenchLayoutType, dtype, SIMD_WIDTH, rank, test_size, tile_size
         ](out_tensor, a_tensor, b_tensor, ctx)
 
     b.iter_custom[tiled_workflow](bench_ctx)
@@ -268,7 +282,8 @@ def benchmark_manual_vectorized_parameterized[
     test_size: Int, tile_size: Int
 ](mut b: Bencher) raises:
     var bench_ctx = DeviceContext()
-    comptime layout = Layout.row_major(test_size)
+    comptime bench_layout = row_major[test_size]()
+    comptime BenchLayoutType = type_of(bench_layout)
     var out = bench_ctx.enqueue_create_buffer[dtype](test_size)
     out.enqueue_fill(0)
     var a = bench_ctx.enqueue_create_buffer[dtype](test_size)
@@ -281,15 +296,21 @@ def benchmark_manual_vectorized_parameterized[
             a_host[i] = Scalar[dtype](2 * i)
             b_host[i] = Scalar[dtype](2 * i + 1)
 
-    var a_tensor = LayoutTensor[mut=False, dtype, layout](a.unsafe_ptr())
-    var b_tensor = LayoutTensor[mut=False, dtype, layout](b_buf.unsafe_ptr())
-    var out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
+    var a_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](a, bench_layout)
+    var b_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](b_buf, bench_layout)
+    var out_tensor = TileTensor[mut=True, dtype, BenchLayoutType, MutAnyOrigin](
+        out, bench_layout
+    )
 
     @parameter
     @always_inline
     def manual_vectorized_workflow(ctx: DeviceContext) raises:
         manual_vectorized_tiled_elementwise_add[
-            layout, dtype, SIMD_WIDTH, 1, rank, test_size, tile_size
+            BenchLayoutType, dtype, SIMD_WIDTH, 1, rank, test_size, tile_size
         ](out_tensor, a_tensor, b_tensor, ctx)
 
     b.iter_custom[manual_vectorized_workflow](bench_ctx)
@@ -303,7 +324,8 @@ def benchmark_vectorized_parameterized[
     test_size: Int, tile_size: Int
 ](mut b: Bencher) raises:
     var bench_ctx = DeviceContext()
-    comptime layout = Layout.row_major(test_size)
+    comptime bench_layout = row_major[test_size]()
+    comptime BenchLayoutType = type_of(bench_layout)
     var out = bench_ctx.enqueue_create_buffer[dtype](test_size)
     out.enqueue_fill(0)
     var a = bench_ctx.enqueue_create_buffer[dtype](test_size)
@@ -316,15 +338,21 @@ def benchmark_vectorized_parameterized[
             a_host[i] = Scalar[dtype](2 * i)
             b_host[i] = Scalar[dtype](2 * i + 1)
 
-    var a_tensor = LayoutTensor[mut=False, dtype, layout](a.unsafe_ptr())
-    var b_tensor = LayoutTensor[mut=False, dtype, layout](b_buf.unsafe_ptr())
-    var out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
+    var a_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](a, bench_layout)
+    var b_tensor = TileTensor[
+        mut=False, dtype, BenchLayoutType, ImmutAnyOrigin
+    ](b_buf, bench_layout)
+    var out_tensor = TileTensor[mut=True, dtype, BenchLayoutType, MutAnyOrigin](
+        out, bench_layout
+    )
 
     @parameter
     @always_inline
     def vectorized_workflow(ctx: DeviceContext) raises:
         vectorize_within_tiles_elementwise_add[
-            layout, dtype, SIMD_WIDTH, 1, rank, test_size, tile_size
+            BenchLayoutType, dtype, SIMD_WIDTH, 1, rank, test_size, tile_size
         ](out_tensor, a_tensor, b_tensor, ctx)
 
     b.iter_custom[vectorized_workflow](bench_ctx)
@@ -349,8 +377,12 @@ def main() raises:
             b_host[i] = Scalar[dtype](2 * i + 1)
             expected[i] = a_host[i] + b_host[i]
 
-    var a_tensor = LayoutTensor[mut=False, dtype, layout](a.unsafe_ptr())
-    var b_tensor = LayoutTensor[mut=False, dtype, layout](b.unsafe_ptr())
+    var a_tensor = TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin](
+        a, layout
+    )
+    var b_tensor = TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin](
+        b, layout
+    )
 
     ctx.synchronize()
 
@@ -358,8 +390,10 @@ def main() raises:
     print("simd_width:", SIMD_WIDTH)
 
     if argv()[1] == "--elementwise":
-        out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
-        elementwise_add[layout, dtype, SIMD_WIDTH, rank, SIZE](
+        var out_tensor = TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin](
+            out, layout
+        )
+        elementwise_add[LayoutType, dtype, SIMD_WIDTH, rank, SIZE](
             out_tensor, a_tensor, b_tensor, ctx
         )
 
@@ -371,11 +405,13 @@ def main() raises:
             print("Puzzle 23 complete ✅")
 
     elif argv()[1] == "--tiled":
-        out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
-        print("tile size:", TILE_SIZE)
-        tiled_elementwise_add[layout, dtype, SIMD_WIDTH, rank, SIZE, TILE_SIZE](
-            out_tensor, a_tensor, b_tensor, ctx
+        var out_tensor = TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin](
+            out, layout
         )
+        print("tile size:", TILE_SIZE)
+        tiled_elementwise_add[
+            LayoutType, dtype, SIMD_WIDTH, rank, SIZE, TILE_SIZE
+        ](out_tensor, a_tensor, b_tensor, ctx)
 
         with out.map_to_host() as out_host:
             print("out:", out_host)
@@ -385,10 +421,12 @@ def main() raises:
             print("Puzzle 23 complete ✅")
 
     elif argv()[1] == "--manual-vectorized":
-        out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
+        var out_tensor = TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin](
+            out, layout
+        )
         print("tile size:", TILE_SIZE)
         manual_vectorized_tiled_elementwise_add[
-            layout, dtype, SIMD_WIDTH, 1, rank, SIZE, TILE_SIZE
+            LayoutType, dtype, SIMD_WIDTH, 1, rank, SIZE, TILE_SIZE
         ](out_tensor, a_tensor, b_tensor, ctx)
 
         with out.map_to_host() as out_host:
@@ -399,10 +437,12 @@ def main() raises:
             print("Puzzle 23 complete ✅")
 
     elif argv()[1] == "--vectorized":
-        out_tensor = LayoutTensor[mut=True, dtype, layout](out.unsafe_ptr())
+        var out_tensor = TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin](
+            out, layout
+        )
         print("tile size:", TILE_SIZE)
         vectorize_within_tiles_elementwise_add[
-            layout, dtype, SIMD_WIDTH, 1, rank, SIZE, TILE_SIZE
+            LayoutType, dtype, SIMD_WIDTH, 1, rank, SIZE, TILE_SIZE
         ](out_tensor, a_tensor, b_tensor, ctx)
 
         with out.map_to_host() as out_host:
diff --git a/solutions/p24/p24.mojo b/solutions/p24/p24.mojo
index c2f77764..55c3efc8 100644
--- a/solutions/p24/p24.mojo
+++ b/solutions/p24/p24.mojo
@@ -4,7 +4,9 @@ from std.gpu.host import DeviceContext, HostBuffer, DeviceBuffer
 from std.gpu.primitives.warp import sum as warp_sum, WARP_SIZE
 from std.gpu.memory import AddressSpace
 from std.algorithm.functional import elementwise
-from layout import Layout, LayoutTensor
+from layout import TileTensor, LayoutTensor
+from layout.tile_layout import row_major, TensorLayout
+from layout.tile_tensor import stack_allocation
 from std.utils import Index, IndexList
 from std.sys import argv, simd_width_of, align_of
 from std.testing import assert_equal
@@ -26,32 +28,36 @@ comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (WARP_SIZE, 1)  # optimal choice for warp kernel
 comptime dtype = DType.float32
 comptime SIMD_WIDTH = simd_width_of[dtype]()
-comptime in_layout = Layout.row_major(SIZE)
-comptime out_layout = Layout.row_major(1)
+comptime in_layout = row_major[SIZE]()
+comptime out_layout = row_major[1]()
+comptime InLayout = type_of(in_layout)
+comptime OutLayout = type_of(out_layout)
 
 
 # ANCHOR: traditional_approach_from_p12
 def traditional_dot_product_p12_style[
-    in_layout: Layout, out_layout: Layout, size: Int
+    InLayoutT: TensorLayout, OutLayoutT: TensorLayout, size: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayoutT, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayoutT, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, InLayoutT, MutAnyOrigin],
 ):
     """
     This is the complex approach from p12_layout_tensor.mojo - kept for comparison.
     """
-    var shared = LayoutTensor[
-        dtype,
-        Layout.row_major(WARP_SIZE),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var a_lt = a.to_layout_tensor()
+    var b_lt = b.to_layout_tensor()
+    var out_lt = output.to_layout_tensor()
+    var shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[WARP_SIZE]())
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
 
     if global_i < size:
-        shared[local_i] = (a[global_i] * b[global_i]).reduce_add()
+        shared[local_i] = rebind[Scalar[dtype]](a_lt[global_i]) * rebind[
+            Scalar[dtype]
+        ](b_lt[global_i])
     else:
         shared[local_i] = 0.0
 
@@ -65,7 +71,7 @@ def traditional_dot_product_p12_style[
         stride //= 2
 
     if local_i == 0:
-        output[global_i // WARP_SIZE] = shared[0]
+        out_lt.store[1](Index(global_i // WARP_SIZE), shared[0])
 
 
 # ANCHOR_END: traditional_approach_from_p12
@@ -73,25 +79,30 @@ def traditional_dot_product_p12_style[
 
 # ANCHOR: simple_warp_kernel_solution
 def simple_warp_dot_product[
-    in_layout: Layout, out_layout: Layout, size: Int
+    InLayoutT: TensorLayout, OutLayoutT: TensorLayout, size: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayoutT, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayoutT, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, InLayoutT, MutAnyOrigin],
 ):
+    var a_lt = a.to_layout_tensor()
+    var b_lt = b.to_layout_tensor()
+    var out_lt = output.to_layout_tensor()
     var global_i = block_dim.x * block_idx.x + thread_idx.x
 
     # Each thread computes one partial product using vectorized approach as values in Mojo are SIMD based
     var partial_product: Scalar[dtype] = 0
     if global_i < size:
-        partial_product = (a[global_i] * b[global_i]).reduce_add()
+        partial_product = rebind[Scalar[dtype]](a_lt[global_i]) * rebind[
+            Scalar[dtype]
+        ](b_lt[global_i])
 
     # warp_sum() replaces all the shared memory + barriers + tree reduction
     var total = warp_sum(partial_product)
 
     # Only lane 0 writes the result (all lanes have the same total)
     if lane_id() == 0:
-        output[global_i // WARP_SIZE] = total
+        out_lt.store[1](Index(global_i // WARP_SIZE), total)
 
 
 # ANCHOR_END: simple_warp_kernel_solution
@@ -99,16 +110,16 @@ def simple_warp_dot_product[
 
 # ANCHOR: functional_warp_approach_solution
 def functional_warp_dot_product[
-    layout: Layout,
-    out_layout: Layout,
+    InLayoutT: TensorLayout,
+    OutLayoutT: TensorLayout,
     dtype: DType,
     simd_width: Int,
     rank: Int,
     size: Int,
 ](
-    output: LayoutTensor[mut=True, dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
-    b: LayoutTensor[mut=False, dtype, layout, MutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayoutT, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayoutT, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, InLayoutT, MutAnyOrigin],
     ctx: DeviceContext,
 ) raises:
     @parameter
@@ -117,13 +128,19 @@ def functional_warp_dot_product[
         simd_width: Int, rank: Int, alignment: Int = align_of[dtype]()
     ](indices: IndexList[rank]) capturing -> None:
         var idx = indices[0]
+        # Convert inside GPU kernel to avoid host-captured LayoutTensor issues
+        var a_lt = a.to_layout_tensor()
+        var b_lt = b.to_layout_tensor()
+        var out_lt = output.to_layout_tensor()
 
         # Each thread computes one partial product
         var partial_product: Scalar[dtype] = 0.0
         if idx < size:
-            var a_val = a.load[1](Index(idx))
-            var b_val = b.load[1](Index(idx))
-            partial_product = a_val * b_val
+            var a_val = a_lt.load[1](Index(idx))
+            var b_val = b_lt.load[1](Index(idx))
+            partial_product = rebind[Scalar[dtype]](a_val) * rebind[
+                Scalar[dtype]
+            ](b_val)
         else:
             partial_product = 0.0
 
@@ -132,7 +149,7 @@ def functional_warp_dot_product[
 
         # Only lane 0 writes the result (all lanes have the same total)
         if lane_id() == 0:
-            output.store[1](Index(idx // WARP_SIZE), total)
+            out_lt.store[1](Index(idx // WARP_SIZE), total)
 
     # Launch exactly size == WARP_SIZE threads (one warp) to process all elements
     elementwise[compute_dot_product, 1, target="gpu"](size, ctx)
@@ -187,8 +204,10 @@ def benchmark_simple_warp_parameterized[
     test_size: Int
 ](mut bencher: Bencher) raises:
     comptime n_warps = test_size // WARP_SIZE
-    comptime in_layout = Layout.row_major(test_size)
-    comptime out_layout = Layout.row_major(n_warps)
+    comptime bench_in_layout = row_major[test_size]()
+    comptime bench_out_layout = row_major[n_warps]()
+    comptime BenchInLayout = type_of(bench_in_layout)
+    comptime BenchOutLayout = type_of(bench_out_layout)
     comptime n_threads = WARP_SIZE
     comptime n_blocks = (ceildiv(test_size, n_threads), 1)
 
@@ -207,15 +226,21 @@ def benchmark_simple_warp_parameterized[
     rand_int[dtype, test_size](b)
     expected_output[dtype, n_warps](expected, a, b)
 
-    var a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-    var b_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](b)
-    var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
+    var a_tensor = TileTensor[mut=False, dtype, BenchInLayout](
+        a, bench_in_layout
+    )
+    var b_tensor = TileTensor[mut=False, dtype, BenchInLayout](
+        b, bench_in_layout
+    )
+    var out_tensor = TileTensor[mut=True, dtype, BenchOutLayout](
+        out, bench_out_layout
+    )
 
     @parameter
     @always_inline
     def traditional_workflow(ctx: DeviceContext) raises:
         comptime kernel = simple_warp_dot_product[
-            in_layout, out_layout, test_size
+            BenchInLayout, BenchOutLayout, test_size
         ]
         ctx.enqueue_function[kernel, kernel](
             out_tensor,
@@ -239,8 +264,10 @@ def benchmark_functional_warp_parameterized[
     test_size: Int
 ](mut bencher: Bencher) raises:
     comptime n_warps = test_size // WARP_SIZE
-    comptime in_layout = Layout.row_major(test_size)
-    comptime out_layout = Layout.row_major(n_warps)
+    comptime bench_in_layout = row_major[test_size]()
+    comptime bench_out_layout = row_major[n_warps]()
+    comptime BenchInLayout = type_of(bench_in_layout)
+    comptime BenchOutLayout = type_of(bench_out_layout)
 
     var bench_ctx = DeviceContext()
 
@@ -257,15 +284,21 @@ def benchmark_functional_warp_parameterized[
     rand_int[dtype, test_size](b)
     expected_output[dtype, n_warps](expected, a, b)
 
-    var a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-    var b_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](b)
-    var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
+    var a_tensor = rebind[
+        TileTensor[mut=False, dtype, BenchInLayout, ImmutAnyOrigin]
+    ](TileTensor[mut=False, dtype, BenchInLayout](a, bench_in_layout))
+    var b_tensor = rebind[
+        TileTensor[mut=False, dtype, BenchInLayout, ImmutAnyOrigin]
+    ](TileTensor[mut=False, dtype, BenchInLayout](b, bench_in_layout))
+    var out_tensor = rebind[
+        TileTensor[mut=True, dtype, BenchOutLayout, MutAnyOrigin]
+    ](TileTensor[mut=True, dtype, BenchOutLayout](out, bench_out_layout))
 
     @parameter
     @always_inline
     def functional_warp_workflow(ctx: DeviceContext) raises:
         functional_warp_dot_product[
-            in_layout, out_layout, dtype, SIMD_WIDTH, 1, test_size
+            BenchInLayout, BenchOutLayout, dtype, SIMD_WIDTH, 1, test_size
         ](out_tensor, a_tensor, b_tensor, ctx)
 
     bencher.iter_custom[functional_warp_workflow](bench_ctx)
@@ -282,8 +315,10 @@ def benchmark_traditional_parameterized[
     test_size: Int
 ](mut bencher: Bencher) raises:
     comptime n_warps = test_size // WARP_SIZE
-    comptime in_layout = Layout.row_major(test_size)
-    comptime out_layout = Layout.row_major(n_warps)
+    comptime bench_in_layout = row_major[test_size]()
+    comptime bench_out_layout = row_major[n_warps]()
+    comptime BenchInLayout = type_of(bench_in_layout)
+    comptime BenchOutLayout = type_of(bench_out_layout)
     comptime n_blocks = (ceildiv(test_size, WARP_SIZE), 1)
 
     var bench_ctx = DeviceContext()
@@ -301,16 +336,26 @@ def benchmark_traditional_parameterized[
     rand_int[dtype, test_size](b)
     expected_output[dtype, n_warps](expected, a, b)
 
-    var a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-    var b_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](b)
-    var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
+    var a_tensor = TileTensor[mut=False, dtype, BenchInLayout](
+        a, bench_in_layout
+    )
+    var b_tensor = TileTensor[mut=False, dtype, BenchInLayout](
+        b, bench_in_layout
+    )
+    var out_tensor = TileTensor[mut=True, dtype, BenchOutLayout](
+        out, bench_out_layout
+    )
 
     @parameter
     @always_inline
     def traditional_workflow(ctx: DeviceContext) raises:
         ctx.enqueue_function[
-            traditional_dot_product_p12_style[in_layout, out_layout, test_size],
-            traditional_dot_product_p12_style[in_layout, out_layout, test_size],
+            traditional_dot_product_p12_style[
+                BenchInLayout, BenchOutLayout, test_size
+            ],
+            traditional_dot_product_p12_style[
+                BenchInLayout, BenchOutLayout, test_size
+            ],
         ](
             out_tensor,
             a_tensor,
@@ -333,6 +378,8 @@ def main() raises:
         print("WARP_SIZE:", WARP_SIZE)
         print("SIMD_WIDTH:", SIMD_WIDTH)
         comptime n_warps = SIZE // WARP_SIZE
+        comptime main_out_layout = row_major[n_warps]()
+        comptime MainOutLayout = type_of(main_out_layout)
         with DeviceContext() as ctx:
             var out = ctx.enqueue_create_buffer[dtype](n_warps)
             out.enqueue_fill(0)
@@ -343,9 +390,15 @@ def main() raises:
             var expected = ctx.enqueue_create_host_buffer[dtype](n_warps)
             expected.enqueue_fill(0)
 
-            var out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
-            var a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-            var b_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](b)
+            var out_tensor = rebind[
+                TileTensor[mut=True, dtype, MainOutLayout, MutAnyOrigin]
+            ](TileTensor[mut=True, dtype, MainOutLayout](out, main_out_layout))
+            var a_tensor = rebind[
+                TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin]
+            ](TileTensor[mut=False, dtype, InLayout](a, in_layout))
+            var b_tensor = rebind[
+                TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin]
+            ](TileTensor[mut=False, dtype, InLayout](b, in_layout))
 
             with a.map_to_host() as a_host, b.map_to_host() as b_host:
                 for i in range(SIZE):
@@ -355,10 +408,10 @@ def main() raises:
             if argv()[1] == "--traditional":
                 ctx.enqueue_function[
                     traditional_dot_product_p12_style[
-                        in_layout, out_layout, SIZE
+                        InLayout, MainOutLayout, SIZE
                     ],
                     traditional_dot_product_p12_style[
-                        in_layout, out_layout, SIZE
+                        InLayout, MainOutLayout, SIZE
                     ],
                 ](
                     out_tensor,
@@ -369,8 +422,8 @@ def main() raises:
                 )
             elif argv()[1] == "--kernel":
                 ctx.enqueue_function[
-                    simple_warp_dot_product[in_layout, out_layout, SIZE],
-                    simple_warp_dot_product[in_layout, out_layout, SIZE],
+                    simple_warp_dot_product[InLayout, MainOutLayout, SIZE],
+                    simple_warp_dot_product[InLayout, MainOutLayout, SIZE],
                 ](
                     out_tensor,
                     a_tensor,
@@ -380,7 +433,7 @@ def main() raises:
                 )
             elif argv()[1] == "--functional":
                 functional_warp_dot_product[
-                    in_layout, out_layout, dtype, SIMD_WIDTH, 1, SIZE
+                    InLayout, MainOutLayout, dtype, SIMD_WIDTH, 1, SIZE
                 ](out_tensor, a_tensor, b_tensor, ctx)
             expected_output[dtype, n_warps](expected, a, b)
             check_result[dtype, n_warps, True](out, expected)
diff --git a/solutions/p25/p25.mojo b/solutions/p25/p25.mojo
index 36130776..c33da7f8 100644
--- a/solutions/p25/p25.mojo
+++ b/solutions/p25/p25.mojo
@@ -1,7 +1,8 @@
 from std.gpu import thread_idx, block_idx, block_dim, lane_id
 from std.gpu.host import DeviceContext
 from std.gpu.primitives.warp import shuffle_down, broadcast, WARP_SIZE
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major, TensorLayout
 from std.sys import argv
 from std.testing import assert_equal, assert_almost_equal
 
@@ -10,15 +11,16 @@ comptime SIZE = WARP_SIZE
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (WARP_SIZE, 1)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 # ANCHOR: neighbor_difference_solution
 def neighbor_difference[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, MutAnyOrigin],
 ):
     """
     Compute finite differences: output[i] = input[i+1] - input[i]
@@ -52,15 +54,16 @@ def neighbor_difference[
 comptime SIZE_2 = 64
 comptime BLOCKS_PER_GRID_2 = (2, 1)
 comptime THREADS_PER_BLOCK_2 = (WARP_SIZE, 1)
-comptime layout_2 = Layout.row_major(SIZE_2)
+comptime layout_2 = row_major[SIZE_2]()
+comptime Layout2Type = type_of(layout_2)
 
 
 # ANCHOR: moving_average_3_solution
 def moving_average_3[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, Layout2Type, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, Layout2Type, MutAnyOrigin],
 ):
     """
     Compute 3-point moving average: output[i] = (input[i] + input[i+1] + input[i+2]) / 3
@@ -92,10 +95,10 @@ def moving_average_3[
 
 # ANCHOR: broadcast_shuffle_coordination_solution
 def broadcast_shuffle_coordination[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, MutAnyOrigin],
 ):
     """
     Combine broadcast() and shuffle_down() for advanced warp coordination.
@@ -107,11 +110,11 @@ def broadcast_shuffle_coordination[
 
     if global_i < size:
         # Step 1: Lane 0 computes block-local scaling factor
-        var scale_factor: output.element_type = 0.0
+        var scale_factor: output.ElementType = 0.0
         if lane == 0:
             # Compute average of first 4 elements in this block's data
             var block_start = block_idx.x * block_dim.x
-            var sum: output.element_type = 0.0
+            var sum: output.ElementType = 0.0
             for i in range(4):
                 if block_start + i < size:
                     sum += input[block_start + i]
@@ -138,10 +141,10 @@ def broadcast_shuffle_coordination[
 
 # ANCHOR: basic_broadcast_solution
 def basic_broadcast[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, MutAnyOrigin],
 ):
     """
     Basic broadcast: Lane 0 computes a block-local value, broadcasts it to all lanes.
@@ -152,10 +155,10 @@ def basic_broadcast[
 
     if global_i < size:
         # Step 1: Lane 0 computes special value (sum of first 4 elements in this block)
-        var broadcast_value: output.element_type = 0.0
+        var broadcast_value: output.ElementType = 0.0
         if lane == 0:
             var block_start = block_idx.x * block_dim.x
-            var sum: output.element_type = 0.0
+            var sum: output.ElementType = 0.0
             for i in range(4):
                 if block_start + i < size:
                     sum += input[block_start + i]
@@ -173,10 +176,10 @@ def basic_broadcast[
 
 # ANCHOR: conditional_broadcast_solution
 def conditional_broadcast[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, MutAnyOrigin],
 ):
     """
     Conditional broadcast: Lane 0 makes a decision based on block-local data, broadcasts it to all lanes.
@@ -187,7 +190,7 @@ def conditional_broadcast[
 
     if global_i < size:
         # Step 1: Lane 0 analyzes block-local data and makes decision (find max of first 8 in block)
-        var decision_value: output.element_type = 0.0
+        var decision_value: output.ElementType = 0.0
         if lane == 0:
             var block_start = block_idx.x * block_dim.x
             decision_value = input[block_start] if block_start < size else 0.0
@@ -224,14 +227,14 @@ def test_neighbor_difference() raises:
             for i in range(SIZE):
                 input_host[i] = Scalar[dtype](i * i)
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
+        var input_tensor = TileTensor[mut=False, dtype, LayoutType](
+            input_buf, layout
         )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
+        var output_tensor = TileTensor[mut=True, dtype, LayoutType](
+            output_buf, layout
         )
 
-        comptime kernel = neighbor_difference[layout, SIZE]
+        comptime kernel = neighbor_difference[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -273,14 +276,14 @@ def test_moving_average() raises:
             for i in range(1, SIZE_2):
                 input_host[i] = input_host[i - 1] + Scalar[dtype](i + 1)
 
-        var input_tensor = LayoutTensor[dtype, layout_2, ImmutAnyOrigin](
-            input_buf
+        var input_tensor = TileTensor[mut=False, dtype, Layout2Type](
+            input_buf, layout_2
         )
-        var output_tensor = LayoutTensor[dtype, layout_2, MutAnyOrigin](
-            output_buf
+        var output_tensor = TileTensor[mut=True, dtype, Layout2Type](
+            output_buf, layout_2
         )
 
-        comptime kernel = moving_average_3[layout_2, SIZE_2]
+        comptime kernel = moving_average_3[SIZE_2]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -344,14 +347,14 @@ def test_broadcast_shuffle_coordination() raises:
                 else:
                     input_host[i] = Scalar[dtype](((i - 4) % 4) * 2 + 1)
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
+        var input_tensor = TileTensor[mut=False, dtype, LayoutType](
+            input_buf, layout
         )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
+        var output_tensor = TileTensor[mut=True, dtype, LayoutType](
+            output_buf, layout
         )
 
-        comptime kernel = broadcast_shuffle_coordination[layout, SIZE]
+        comptime kernel = broadcast_shuffle_coordination[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -399,14 +402,14 @@ def test_basic_broadcast() raises:
             for i in range(SIZE):
                 input_host[i] = Scalar[dtype](i + 1)
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
+        var input_tensor = TileTensor[mut=False, dtype, LayoutType](
+            input_buf, layout
         )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
+        var output_tensor = TileTensor[mut=True, dtype, LayoutType](
+            output_buf, layout
         )
 
-        comptime kernel = basic_broadcast[layout, SIZE]
+        comptime kernel = basic_broadcast[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -460,14 +463,14 @@ def test_conditional_broadcast() raises:
             for i in range(SIZE):
                 input_host[i] = test_values[i % len(test_values)]
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
+        var input_tensor = TileTensor[mut=False, dtype, LayoutType](
+            input_buf, layout
         )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
+        var output_tensor = TileTensor[mut=True, dtype, LayoutType](
+            output_buf, layout
         )
 
-        comptime kernel = conditional_broadcast[layout, SIZE]
+        comptime kernel = conditional_broadcast[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
diff --git a/solutions/p26/p26.mojo b/solutions/p26/p26.mojo
index ebf102b6..f3a68270 100644
--- a/solutions/p26/p26.mojo
+++ b/solutions/p26/p26.mojo
@@ -1,7 +1,8 @@
 from std.gpu import thread_idx, block_idx, block_dim, lane_id
 from std.gpu.host import DeviceContext
 from std.gpu.primitives.warp import shuffle_xor, prefix_sum, WARP_SIZE
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
 from std.sys import argv
 from std.testing import assert_equal, assert_almost_equal
 
@@ -10,15 +11,16 @@ comptime SIZE = WARP_SIZE
 comptime BLOCKS_PER_GRID = (1, 1)
 comptime THREADS_PER_BLOCK = (WARP_SIZE, 1)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 
 # ANCHOR: butterfly_pair_swap_solution
 def butterfly_pair_swap[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     """
     Basic butterfly pair swap: Exchange values between adjacent pairs using XOR pattern.
@@ -45,10 +47,10 @@ def butterfly_pair_swap[
 
 # ANCHOR: butterfly_parallel_max_solution
 def butterfly_parallel_max[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     """
     Parallel maximum reduction using butterfly pattern.
@@ -78,15 +80,16 @@ def butterfly_parallel_max[
 comptime SIZE_2 = 64
 comptime BLOCKS_PER_GRID_2 = (2, 1)
 comptime THREADS_PER_BLOCK_2 = (WARP_SIZE, 1)
-comptime layout_2 = Layout.row_major(SIZE_2)
+comptime layout_2 = row_major[SIZE_2]()
+comptime Layout2Type = type_of(layout_2)
 
 
 # ANCHOR: butterfly_conditional_max_solution
 def butterfly_conditional_max[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, Layout2Type, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, Layout2Type, ImmutAnyOrigin],
 ):
     """
     Conditional butterfly maximum: Perform butterfly max reduction, but only store result
@@ -123,10 +126,10 @@ def butterfly_conditional_max[
 
 # ANCHOR: warp_inclusive_prefix_sum_solution
 def warp_inclusive_prefix_sum[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
 ):
     """
     Inclusive prefix sum using warp primitive: Each thread gets sum of all elements up to and including its position.
@@ -166,10 +169,10 @@ def warp_inclusive_prefix_sum[
 
 # ANCHOR: warp_partition_solution
 def warp_partition[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, ImmutAnyOrigin],
     pivot: Float32,
 ):
     """
@@ -237,14 +240,12 @@ def test_butterfly_pair_swap() raises:
             for i in range(SIZE):
                 input_host[i] = Scalar[dtype](i)
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
+        var input_tensor = TileTensor[mut=False, dtype, LayoutType](
+            input_buf, layout
         )
+        var output_tensor = TileTensor(output_buf, layout)
 
-        comptime kernel = butterfly_pair_swap[layout, SIZE]
+        comptime kernel = butterfly_pair_swap[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -288,14 +289,12 @@ def test_butterfly_parallel_max() raises:
             # Make sure we have a clear maximum
             input_host[SIZE - 1] = 1000.0
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
+        var input_tensor = TileTensor[mut=False, dtype, LayoutType](
+            input_buf, layout
         )
+        var output_tensor = TileTensor(output_buf, layout)
 
-        comptime kernel = butterfly_parallel_max[layout, SIZE]
+        comptime kernel = butterfly_parallel_max[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -334,14 +333,12 @@ def test_butterfly_conditional_max() raises:
                 else:
                     input_host[i] = Scalar[dtype](i % 10)
 
-        var input_tensor = LayoutTensor[dtype, layout_2, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout_2, MutAnyOrigin](
-            output_buf
+        var input_tensor = TileTensor[mut=False, dtype, Layout2Type](
+            input_buf, layout_2
         )
+        var output_tensor = TileTensor(output_buf, layout_2)
 
-        comptime kernel = butterfly_conditional_max[layout_2, SIZE_2]
+        comptime kernel = butterfly_conditional_max[SIZE_2]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -394,14 +391,12 @@ def test_warp_inclusive_prefix_sum() raises:
             for i in range(SIZE):
                 input_host[i] = Scalar[dtype](i + 1)
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
+        var input_tensor = TileTensor[mut=False, dtype, LayoutType](
+            input_buf, layout
         )
+        var output_tensor = TileTensor(output_buf, layout)
 
-        comptime kernel = warp_inclusive_prefix_sum[layout, SIZE]
+        comptime kernel = warp_inclusive_prefix_sum[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
@@ -461,14 +456,12 @@ def test_warp_partition() raises:
             for i in range(SIZE):
                 input_host[i] = Scalar[dtype](test_values[i % len(test_values)])
 
-        var input_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](
-            input_buf
-        )
-        var output_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](
-            output_buf
+        var input_tensor = TileTensor[mut=False, dtype, LayoutType](
+            input_buf, layout
         )
+        var output_tensor = TileTensor(output_buf, layout)
 
-        comptime kernel = warp_partition[layout, SIZE]
+        comptime kernel = warp_partition[SIZE]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
diff --git a/solutions/p27/p27.mojo b/solutions/p27/p27.mojo
index 7d2c6206..2f095125 100644
--- a/solutions/p27/p27.mojo
+++ b/solutions/p27/p27.mojo
@@ -4,7 +4,9 @@ from std.gpu.primitives.warp import WARP_SIZE
 from std.gpu.primitives import block
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.sys import argv
 from std.testing import assert_equal
 from std.math import floor
@@ -12,18 +14,20 @@ from std.math import floor
 comptime SIZE = 128
 comptime TPB = 128
 comptime NUM_BINS = 8
-comptime in_layout = Layout.row_major(SIZE)
-comptime out_layout = Layout.row_major(1)
+comptime in_layout = row_major[SIZE]()
+comptime out_layout = row_major[1]()
 comptime dtype = DType.float32
+comptime InLayout = type_of(in_layout)
+comptime OutLayout = type_of(out_layout)
 
 
 # ANCHOR: block_sum_dot_product_solution
 def block_sum_dot_product[
-    in_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin],
     size: Int,
 ):
     """Dot product using block.sum() - convenience function like warp.sum()!
@@ -35,7 +39,7 @@ def block_sum_dot_product[
     # Each thread computes partial product
     var partial_product: Scalar[dtype] = 0.0
     if global_i < size:
-        # LayoutTensor indexing `[0]` returns the underlying SIMD value
+        # TileTensor indexing `[0]` returns the underlying SIMD value
         partial_product = a[global_i][0] * b[global_i][0]
 
     # The magic: block.sum() replaces 15+ lines of manual reduction!
@@ -54,22 +58,19 @@ def block_sum_dot_product[
 
 # ANCHOR: traditional_dot_product_solution
 def traditional_dot_product[
-    in_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin],
+    b: TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin],
     size: Int,
 ):
     """Traditional dot product using shared memory + barriers + tree reduction.
     Educational but complex - shows the manual coordination needed."""
 
-    var shared = LayoutTensor[
-        dtype,
-        Layout.row_major(tpb),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[tpb]())
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
 
@@ -96,16 +97,17 @@ def traditional_dot_product[
 
 # ANCHOR_END: traditional_dot_product_solution
 
-comptime bin_layout = Layout.row_major(SIZE)  # Max SIZE elements per bin
+comptime bin_layout = row_major[SIZE]()  # Max SIZE elements per bin
+comptime BinLayout = type_of(bin_layout)
 
 
 # ANCHOR: block_histogram_solution
 def block_histogram_bin_extract[
-    in_layout: Layout, bin_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    input_data: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    bin_output: LayoutTensor[dtype, bin_layout, MutAnyOrigin],
-    count_output: LayoutTensor[DType.int32, out_layout, MutAnyOrigin],
+    input_data: TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin],
+    bin_output: TileTensor[mut=True, dtype, BinLayout, MutAnyOrigin],
+    count_output: TileTensor[mut=True, DType.int32, OutLayout, MutAnyOrigin],
     size: Int,
     target_bin: Int,
     num_bins: Int,
@@ -160,23 +162,24 @@ def block_histogram_bin_extract[
 
 # ANCHOR_END: block_histogram_solution
 
-comptime vector_layout = Layout.row_major(SIZE)  # For full vector output
+comptime vector_layout = row_major[SIZE]()  # For full vector output
+comptime VectorLayout = type_of(vector_layout)
 
 
 # ANCHOR: block_normalize_solution
 def block_normalize_vector[
-    in_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    input_data: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    output_data: LayoutTensor[dtype, out_layout, MutAnyOrigin],
+    input_data: TileTensor[mut=False, dtype, InLayout, ImmutAnyOrigin],
+    output_data: TileTensor[mut=True, dtype, VectorLayout, MutAnyOrigin],
     size: Int,
 ):
     """Vector mean normalization using block.sum() + block.broadcast() combination.
 
     This demonstrates the complete block operations workflow:
-    1. Use block.sum() to compute sum of all elements (all → one)
+    1. Use block.sum() to compute sum of all elements (all -> one)
     2. Thread 0 computes mean = sum / size
-    3. Use block.broadcast() to share mean to all threads (one → all)
+    3. Use block.broadcast() to share mean to all threads (one -> all)
     4. Each thread normalizes: output[i] = input[i] / mean
     """
 
@@ -242,20 +245,18 @@ def main() raises:
             print("TPB:", TPB)
             print("Expected result:", expected)
 
-            a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-            b_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](b_buf)
-            out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
+            a_tensor = TileTensor[mut=False, dtype, InLayout](a, in_layout)
+            b_tensor = TileTensor[mut=False, dtype, InLayout](b_buf, in_layout)
+            out_tensor = TileTensor(out, out_layout)
 
             # Traditional approach: works perfectly when size == TPB
-            comptime kernel = traditional_dot_product[
-                in_layout, out_layout, TPB
-            ]
+            comptime kernel = traditional_dot_product[TPB]
             ctx.enqueue_function[kernel, kernel](
                 out_tensor,
                 a_tensor,
                 b_tensor,
                 SIZE,
-                grid_dim=(1, 1),  # ✅ Single block works when size == TPB
+                grid_dim=(1, 1),
                 block_dim=(TPB, 1),
             )
 
@@ -287,12 +288,12 @@ def main() raises:
             print("TPB:", TPB)
             print("Expected result:", expected)
 
-            a_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](a)
-            b_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](b_buf)
-            out_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](out)
+            a_tensor = TileTensor[mut=False, dtype, InLayout](a, in_layout)
+            b_tensor = TileTensor[mut=False, dtype, InLayout](b_buf, in_layout)
+            out_tensor = TileTensor(out, out_layout)
 
             # Block.sum(): Same result with dramatically simpler code!
-            comptime kernel = block_sum_dot_product[in_layout, out_layout, TPB]
+            comptime kernel = block_sum_dot_product[TPB]
             ctx.enqueue_function[kernel, kernel](
                 out_tensor,
                 a_tensor,
@@ -341,8 +342,8 @@ def main() raises:
             print("...")
             print()
 
-            input_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](
-                input_buf
+            input_tensor = TileTensor[mut=False, dtype, InLayout](
+                input_buf, in_layout
             )
 
             # Demonstrate histogram for each bin using block.prefix_sum()
@@ -363,17 +364,11 @@ def main() raises:
                 var bin_count = ctx.enqueue_create_buffer[DType.int32](1)
                 bin_count.enqueue_fill(0)
 
-                var bin_tensor = LayoutTensor[dtype, bin_layout, MutAnyOrigin](
-                    bin_data
-                )
-                var count_tensor = LayoutTensor[
-                    DType.int32, out_layout, MutAnyOrigin
-                ](bin_count)
+                var bin_tensor = TileTensor(bin_data, bin_layout)
+                var count_tensor = TileTensor(bin_count, out_layout)
 
                 # Execute histogram kernel for this specific bin
-                comptime kernel = block_histogram_bin_extract[
-                    in_layout, bin_layout, out_layout, TPB
-                ]
+                comptime kernel = block_histogram_bin_extract[TPB]
                 ctx.enqueue_function[kernel, kernel](
                     input_tensor,
                     bin_tensor,
@@ -439,17 +434,13 @@ def main() raises:
             print("Mean value:", mean_value)
             print()
 
-            input_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](
-                input_buf
+            input_tensor = TileTensor[mut=False, dtype, InLayout](
+                input_buf, in_layout
             )
-            var output_tensor = LayoutTensor[
-                dtype, vector_layout, MutAnyOrigin
-            ](output_buf)
+            var output_tensor = TileTensor(output_buf, vector_layout)
 
             # Execute vector normalization kernel
-            comptime kernel = block_normalize_vector[
-                in_layout, vector_layout, TPB
-            ]
+            comptime kernel = block_normalize_vector[TPB]
             ctx.enqueue_function[kernel, kernel](
                 input_tensor,
                 output_tensor,
diff --git a/solutions/p28/p28.mojo b/solutions/p28/p28.mojo
index 047e8b94..a6438d95 100644
--- a/solutions/p28/p28.mojo
+++ b/solutions/p28/p28.mojo
@@ -1,7 +1,9 @@
 from std.gpu import thread_idx, block_idx, block_dim, grid_dim, barrier
 from std.gpu.host import DeviceContext
 from std.gpu.memory import async_copy_wait_all, AddressSpace
-from layout import Layout, LayoutTensor
+from layout import Layout, LayoutTensor, TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from layout.layout_tensor import copy_dram_to_sram_async
 from std.sys import argv, info
 from std.testing import assert_equal, assert_almost_equal
@@ -17,16 +19,18 @@ comptime BLOCKS_PER_GRID_ASYNC = (
 ) // CONV_TILE_SIZE
 comptime THREADS_PER_BLOCK_ASYNC = 256
 comptime dtype = DType.float32
-comptime layout_async = Layout.row_major(VECTOR_SIZE)
+comptime layout_async = row_major[VECTOR_SIZE]()
+comptime AsyncLayoutType = type_of(layout_async)
+comptime kernel_layout = Layout.row_major(KERNEL_SIZE)
 
 
 # ANCHOR: async_copy_overlap_convolution_solution
 def async_copy_overlap_convolution[
-    dtype: DType, layout: Layout
+    dtype: DType
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    kernel: LayoutTensor[dtype, Layout.row_major(KERNEL_SIZE), ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, AsyncLayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, AsyncLayoutType, MutAnyOrigin],
+    kernel: LayoutTensor[dtype, kernel_layout, ImmutAnyOrigin],
 ):
     """Demonstrates async copy operations building on p14 patterns.
 
@@ -52,7 +56,7 @@ def async_copy_overlap_convolution[
 
     # Phase 1: Launch async copy for input tile
     # Note: tile() does NOT perform bounds checking - ensure valid tile bounds
-    var input_tile = input.tile[CONV_TILE_SIZE](block_idx.x)
+    var input_tile = input.tile[CONV_TILE_SIZE](block_idx.x).to_layout_tensor()
 
     # Use async copy with thread layout matching p14 pattern
     comptime load_layout = Layout.row_major(THREADS_PER_BLOCK_ASYNC)
@@ -68,8 +72,8 @@ def async_copy_overlap_convolution[
 
     # Phase 4: Compute convolution
     var global_i = block_idx.x * CONV_TILE_SIZE + local_i
-    if local_i < CONV_TILE_SIZE and global_i < output.shape[0]():
-        var result: output.element_type = 0
+    if local_i < CONV_TILE_SIZE and global_i < Int(output.dim[0]()):
+        var result: output.ElementType = 0
 
         # Simple convolution avoiding boundary issues
         if local_i >= HALO_SIZE and local_i < CONV_TILE_SIZE - HALO_SIZE:
@@ -77,10 +81,12 @@ def async_copy_overlap_convolution[
             for k in range(KERNEL_SIZE):
                 var input_idx = local_i + k - HALO_SIZE
                 if input_idx >= 0 and input_idx < CONV_TILE_SIZE:
-                    result += input_shared[input_idx] * kernel_shared[k]
+                    result += rebind[Scalar[dtype]](
+                        input_shared[input_idx]
+                    ) * rebind[Scalar[dtype]](kernel_shared[k])
         else:
             # For boundary elements, just copy input (no convolution)
-            result = input_shared[local_i]
+            result = rebind[Scalar[dtype]](input_shared[local_i])
 
         output[global_i] = result
 
@@ -108,17 +114,17 @@ def test_async_copy_overlap_convolution() raises:
             for i in range(KERNEL_SIZE):
                 kernel_host[i] = Scalar[dtype](i + 1)
 
-        var input_tensor = LayoutTensor[dtype, layout_async, ImmutAnyOrigin](
-            input_buf
+        var input_tensor = TileTensor[mut=False, dtype, AsyncLayoutType](
+            input_buf, layout_async
         )
-        var output_tensor = LayoutTensor[dtype, layout_async, MutAnyOrigin](
-            output_buf
+        var output_tensor = TileTensor[mut=True, dtype, AsyncLayoutType](
+            output_buf, layout_async
+        )
+        var kernel_tensor = LayoutTensor[dtype, kernel_layout, ImmutAnyOrigin](
+            kernel_buf
         )
-        var kernel_tensor = LayoutTensor[
-            mut=False, dtype, Layout.row_major(KERNEL_SIZE)
-        ](kernel_buf)
 
-        comptime kernel = async_copy_overlap_convolution[dtype, layout_async]
+        comptime kernel = async_copy_overlap_convolution[dtype]
         ctx.enqueue_function[kernel, kernel](
             output_tensor,
             input_tensor,
diff --git a/solutions/p29/p29.mojo b/solutions/p29/p29.mojo
index 31a9d858..9d92a2eb 100644
--- a/solutions/p29/p29.mojo
+++ b/solutions/p29/p29.mojo
@@ -6,7 +6,9 @@ from std.gpu.sync import (
 )
 from std.gpu.host import DeviceContext
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from layout.layout_tensor import copy_dram_to_sram_async
 from std.sys import argv, info
 from std.testing import assert_true, assert_almost_equal
@@ -16,7 +18,8 @@ comptime SIZE = 1024  # Image size (1D for simplicity)
 comptime BLOCKS_PER_GRID = (4, 1)
 comptime THREADS_PER_BLOCK = (TPB, 1)
 comptime dtype = DType.float32
-comptime layout = Layout.row_major(SIZE)
+comptime layout = row_major[SIZE]()
+comptime LayoutType = type_of(layout)
 
 # Multi-stage processing configuration
 comptime STAGE1_THREADS = TPB // 2
@@ -25,11 +28,9 @@ comptime BLUR_RADIUS = 2
 
 
 # ANCHOR: multi_stage_pipeline_solution
-def multi_stage_image_blur_pipeline[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def multi_stage_image_blur_pipeline(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, MutAnyOrigin],
     size: Int,
 ):
     """Multi-stage image blur pipeline with barrier coordination.
@@ -40,18 +41,12 @@ def multi_stage_image_blur_pipeline[
     """
 
     # Shared memory buffers for pipeline stages
-    var input_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var blur_shared = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var input_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
+    var blur_shared = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
 
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
@@ -133,11 +128,9 @@ comptime BUFFER_COUNT = 2
 
 
 # ANCHOR: double_buffered_stencil_solution
-def double_buffered_stencil_computation[
-    layout: Layout
-](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+def double_buffered_stencil_computation(
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, LayoutType, MutAnyOrigin],
     size: Int,
 ):
     """Double-buffered stencil computation with memory barrier coordination.
@@ -147,38 +140,23 @@ def double_buffered_stencil_computation[
     """
 
     # Double-buffering: Two shared memory buffers
-    var buffer_A = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var buffer_B = LayoutTensor[
-        dtype,
-        Layout.row_major(TPB),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var buffer_A = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
+    var buffer_B = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[TPB]())
 
     # Memory barriers for coordinating buffer swaps
-    var init_barrier = LayoutTensor[
-        DType.uint64,
-        Layout.row_major(1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var iter_barrier = LayoutTensor[
-        DType.uint64,
-        Layout.row_major(1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
-    var final_barrier = LayoutTensor[
-        DType.uint64,
-        Layout.row_major(1),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var init_barrier = stack_allocation[
+        dtype=DType.uint64, address_space=AddressSpace.SHARED
+    ](row_major[1]())
+    var iter_barrier = stack_allocation[
+        dtype=DType.uint64, address_space=AddressSpace.SHARED
+    ](row_major[1]())
+    var final_barrier = stack_allocation[
+        dtype=DType.uint64, address_space=AddressSpace.SHARED
+    ](row_major[1]())
 
     var global_i = block_dim.x * block_idx.x + thread_idx.x
     var local_i = thread_idx.x
@@ -284,11 +262,11 @@ def test_multi_stage_pipeline() raises:
                 # Create a simple wave pattern for blurring
                 inp_host[i] = Scalar[dtype](i % 10) + Scalar[dtype](i) / 100.0
 
-        # Create LayoutTensors
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var inp_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp)
+        # Create TileTensors
+        var out_tensor = TileTensor[mut=True, dtype, LayoutType](out, layout)
+        var inp_tensor = TileTensor[mut=False, dtype, LayoutType](inp, layout)
 
-        comptime kernel = multi_stage_image_blur_pipeline[layout]
+        comptime kernel = multi_stage_image_blur_pipeline
         ctx.enqueue_function[kernel, kernel](
             out_tensor,
             inp_tensor,
@@ -346,11 +324,11 @@ def test_double_buffered_stencil() raises:
                 # Create a step pattern that will be smoothed by stencil
                 inp_host[i] = Scalar[dtype](1.0 if i % 20 < 10 else 0.0)
 
-        # Create LayoutTensors for Puzzle 26B
-        var out_tensor = LayoutTensor[dtype, layout, MutAnyOrigin](out)
-        var inp_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp)
+        # Create TileTensors for Puzzle 26B
+        var out_tensor = TileTensor[mut=True, dtype, LayoutType](out, layout)
+        var inp_tensor = TileTensor[mut=False, dtype, LayoutType](inp, layout)
 
-        comptime kernel = double_buffered_stencil_computation[layout]
+        comptime kernel = double_buffered_stencil_computation
         ctx.enqueue_function[kernel, kernel](
             out_tensor,
             inp_tensor,
diff --git a/solutions/p33/p33.mojo b/solutions/p33/p33.mojo
index 0e57b8fd..6d6c4a10 100644
--- a/solutions/p33/p33.mojo
+++ b/solutions/p33/p33.mojo
@@ -1,6 +1,7 @@
 from std.gpu import thread_idx, block_idx, block_dim, barrier, WARP_SIZE
 from std.gpu.host import DeviceContext
-from layout import Layout, LayoutTensor
+from layout import Layout, LayoutTensor, TileTensor
+from layout.tile_layout import row_major
 from layout.tensor_core import TensorCore
 from layout.layout_tensor import copy_dram_to_sram_async
 from std.gpu.memory import async_copy_wait_all, AddressSpace
@@ -10,7 +11,8 @@ from std.testing import assert_equal, assert_almost_equal
 
 comptime dtype = DType.float32
 comptime SIZE = 1024
-comptime layout = Layout.row_major(SIZE, SIZE)
+comptime layout = row_major[SIZE, SIZE]()
+comptime LayoutType = type_of(layout)
 comptime BLOCK_DIM_COUNT = 2
 
 comptime TILE_SIZE = 32
@@ -23,11 +25,11 @@ comptime THREADS_PER_BLOCK_TILED = (TILE_SIZE, TILE_SIZE)
 
 # ANCHOR: matmul_idiomatic_tiled_solution
 def matmul_idiomatic_tiled[
-    layout: Layout, size: Int
+    size: Int
 ](
-    output: LayoutTensor[dtype, layout, MutAnyOrigin],
-    a: LayoutTensor[dtype, layout, ImmutAnyOrigin],
-    b: LayoutTensor[dtype, layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, LayoutType, MutAnyOrigin],
+    a: TileTensor[mut=False, dtype, LayoutType, MutAnyOrigin],
+    b: TileTensor[mut=False, dtype, LayoutType, MutAnyOrigin],
 ):
     # Use block_dim to get actual tile size dynamically
     var tile_size_x = block_dim.x
@@ -53,7 +55,7 @@ def matmul_idiomatic_tiled[
         address_space=AddressSpace.SHARED,
     ].stack_allocation()
 
-    var acc: output.element_type = 0
+    var acc: output.ElementType = 0
 
     comptime load_a_layout = Layout.row_major(1, TILE_SIZE)  # Coalesced loading
     comptime load_b_layout = Layout.row_major(1, TILE_SIZE)  # Coalesced loading
@@ -62,8 +64,12 @@ def matmul_idiomatic_tiled[
 
     for idx in range(size // TILE_SIZE):  # Iterate over K tiles
         # Get tiles from A and B matrices
-        var a_tile = a.tile[TILE_SIZE, TILE_SIZE](block_idx.y, idx)
-        var b_tile = b.tile[TILE_SIZE, TILE_SIZE](idx, block_idx.x)
+        var a_tile = a.tile[TILE_SIZE, TILE_SIZE](
+            block_idx.y, idx
+        ).to_layout_tensor()
+        var b_tile = b.tile[TILE_SIZE, TILE_SIZE](
+            idx, block_idx.x
+        ).to_layout_tensor()
 
         # Asynchronously copy tiles to shared memory with consistent orientation
         copy_dram_to_sram_async[
@@ -87,7 +93,9 @@ def matmul_idiomatic_tiled[
                 and local_col < TILE_SIZE
                 and k < TILE_SIZE
             ):
-                acc += a_shared[local_row, k] * b_shared[k, local_col]
+                acc += rebind[Scalar[dtype]](a_shared[local_row, k]) * rebind[
+                    Scalar[dtype]
+                ](b_shared[k, local_col])
 
         barrier()
 
@@ -289,19 +297,29 @@ def main() raises:
                             inp1_host[i * SIZE + k] * inp2_host[k * SIZE + j]
                         )
         # Create layout tensors
-        var out_tensor_core_layout = LayoutTensor[dtype, layout](
+        comptime old_layout = Layout.row_major(SIZE, SIZE)
+        var out_tensor_core_layout = LayoutTensor[dtype, old_layout](
             out_tensor_core.unsafe_ptr()
         )
-        var a_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp1)
-        var b_tensor = LayoutTensor[dtype, layout, ImmutAnyOrigin](inp2)
+        var a_tensor = LayoutTensor[dtype, old_layout, ImmutAnyOrigin](inp1)
+        var b_tensor = LayoutTensor[dtype, old_layout, ImmutAnyOrigin](inp2)
+
+        # Create TileTensors for the tiled kernel
+        var out_tile_tensor = TileTensor(out_tensor_core, layout)
+        var a_tile_tensor = TileTensor[mut=False, dtype, LayoutType](
+            inp1, layout
+        )
+        var b_tile_tensor = TileTensor[mut=False, dtype, LayoutType](
+            inp2, layout
+        )
 
         if mode == "--tensor-core":
             print("\n=== Running ACTUAL Tensor Core Matrix Multiplication ===")
             comptime kernel = tensor_core_matrix_multiplication[
                 dtype,
-                layout,
-                layout,
-                layout,
+                old_layout,
+                old_layout,
+                old_layout,
                 BM,
                 BN,
                 BK,
@@ -328,16 +346,14 @@ def main() raises:
             # Create separate buffer for tiled result
             out_tiled = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
             out_tiled.enqueue_fill(0)
-            out_tiled_layout = LayoutTensor[dtype, layout](
-                out_tiled.unsafe_ptr()
-            )
+            out_tiled_layout = TileTensor(out_tiled, layout)
 
             # Run idiomatic tiled version with proper 2D block configuration
-            comptime kernel = matmul_idiomatic_tiled[layout, SIZE]
+            comptime kernel = matmul_idiomatic_tiled[SIZE]
             ctx.enqueue_function[kernel, kernel](
                 out_tiled_layout,
-                a_tensor,
-                b_tensor,
+                a_tile_tensor,
+                b_tile_tensor,
                 grid_dim=BLOCK_PER_GRID_TILED,
                 block_dim=THREADS_PER_BLOCK_TILED,
             )
@@ -356,9 +372,9 @@ def main() raises:
             print("\n--- Test 1: Tensor Core vs CPU Reference ---")
             comptime kernel = tensor_core_matrix_multiplication[
                 dtype,
-                layout,
-                layout,
-                layout,
+                old_layout,
+                old_layout,
+                old_layout,
                 BM,
                 BN,
                 BK,
@@ -435,15 +451,13 @@ def main() raises:
             print("\n--- Test 2: Idiomatic Tiled vs CPU Reference ---")
             out_tiled = ctx.enqueue_create_buffer[dtype](SIZE * SIZE)
             out_tiled.enqueue_fill(0)
-            out_tiled_layout = LayoutTensor[dtype, layout](
-                out_tiled.unsafe_ptr()
-            )
+            out_tiled_layout = TileTensor(out_tiled, layout)
 
-            comptime kernel2 = matmul_idiomatic_tiled[layout, SIZE]
+            comptime kernel2 = matmul_idiomatic_tiled[SIZE]
             ctx.enqueue_function[kernel2, kernel2](
                 out_tiled_layout,
-                a_tensor,
-                b_tensor,
+                a_tile_tensor,
+                b_tile_tensor,
                 grid_dim=BLOCK_PER_GRID_TILED,
                 block_dim=THREADS_PER_BLOCK_TILED,
             )
diff --git a/solutions/p34/p34.mojo b/solutions/p34/p34.mojo
index e2a62a55..4aa02af4 100644
--- a/solutions/p34/p34.mojo
+++ b/solutions/p34/p34.mojo
@@ -8,7 +8,9 @@ from std.gpu.primitives.cluster import (
     elect_one_sync,
 )
 from std.gpu.memory import AddressSpace
-from layout import Layout, LayoutTensor
+from layout import TileTensor
+from layout.tile_layout import row_major
+from layout.tile_tensor import stack_allocation
 from std.sys import argv
 from std.testing import assert_equal, assert_almost_equal, assert_true
 
@@ -16,16 +18,20 @@ comptime SIZE = 1024
 comptime TPB = 256
 comptime CLUSTER_SIZE = 4
 comptime dtype = DType.float32
-comptime in_layout = Layout.row_major(SIZE)
-comptime out_layout = Layout.row_major(1)
+comptime in_layout = row_major[SIZE]()
+comptime out_layout = row_major[1]()
+comptime InLayout = type_of(in_layout)
+comptime OutLayout = type_of(out_layout)
+comptime cluster_layout = row_major[CLUSTER_SIZE]()
+comptime ClusterLayout = type_of(cluster_layout)
 
 
 # ANCHOR: cluster_coordination_basics_solution
 def cluster_coordination_basics[
-    in_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, ClusterLayout, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, InLayout, MutAnyOrigin],
     size: Int,
 ):
     """Real cluster coordination using SM90+ cluster APIs."""
@@ -36,12 +42,9 @@ def cluster_coordination_basics[
     var my_block_rank = Int(block_rank_in_cluster())
     var block_id = block_idx.x
 
-    var shared_data = LayoutTensor[
-        dtype,
-        Layout.row_major(tpb),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_data = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[tpb]())
 
     # FIX: Use block_idx.x for data distribution instead of cluster rank
     # Each block should process different portions of the data
@@ -77,13 +80,11 @@ def cluster_coordination_basics[
 
 # ANCHOR: cluster_collective_operations_solution
 def cluster_collective_operations[
-    in_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
-    temp_storage: LayoutTensor[
-        dtype, Layout.row_major(CLUSTER_SIZE), MutAnyOrigin
-    ],
+    output: TileTensor[mut=True, dtype, OutLayout, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, InLayout, MutAnyOrigin],
+    temp_storage: TileTensor[mut=True, dtype, ClusterLayout, MutAnyOrigin],
     size: Int,
 ):
     """Cluster-wide collective operations using real cluster APIs."""
@@ -98,12 +99,9 @@ def cluster_collective_operations[
         my_value = input[global_i][0]
 
     # Block-level reduction using shared memory
-    var shared_mem = LayoutTensor[
-        dtype,
-        Layout.row_major(tpb),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_mem = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[tpb]())
     shared_mem[local_i] = my_value
     barrier()
 
@@ -135,10 +133,10 @@ def cluster_collective_operations[
 
 # ANCHOR: advanced_cluster_patterns_solution
 def advanced_cluster_patterns[
-    in_layout: Layout, out_layout: Layout, tpb: Int
+    tpb: Int
 ](
-    output: LayoutTensor[dtype, out_layout, MutAnyOrigin],
-    input: LayoutTensor[dtype, in_layout, ImmutAnyOrigin],
+    output: TileTensor[mut=True, dtype, ClusterLayout, MutAnyOrigin],
+    input: TileTensor[mut=False, dtype, InLayout, MutAnyOrigin],
     size: Int,
 ):
     """Advanced cluster programming using cluster masks and relaxed synchronization.
@@ -148,12 +146,9 @@ def advanced_cluster_patterns[
     var my_block_rank = Int(block_rank_in_cluster())
     var block_id = block_idx.x
 
-    var shared_data = LayoutTensor[
-        dtype,
-        Layout.row_major(tpb),
-        MutAnyOrigin,
-        address_space=AddressSpace.SHARED,
-    ].stack_allocation()
+    var shared_data = stack_allocation[
+        dtype=dtype, address_space=AddressSpace.SHARED
+    ](row_major[tpb]())
 
     # Compute cluster mask for advanced coordination
     # base_mask = cluster_mask_base()  # Requires cluster_shape parameter
@@ -216,16 +211,14 @@ def main() raises:
                 for i in range(SIZE):
                     input_host[i] = Scalar[dtype](i % 10) * 0.1
 
-            input_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](
-                input_buf
+            input_tensor = TileTensor[mut=False, dtype, InLayout](
+                input_buf, in_layout
+            )
+            output_tensor = TileTensor[mut=True, dtype, ClusterLayout](
+                output_buf, cluster_layout
             )
-            output_tensor = LayoutTensor[
-                dtype, Layout.row_major(CLUSTER_SIZE), MutAnyOrigin
-            ](output_buf)
 
-            comptime kernel = cluster_coordination_basics[
-                in_layout, Layout.row_major(CLUSTER_SIZE), TPB
-            ]
+            comptime kernel = cluster_coordination_basics[TPB]
             ctx.enqueue_function[kernel, kernel](
                 output_tensor,
                 input_tensor,
@@ -280,19 +273,17 @@ def main() raises:
 
             print("Expected sum:", expected_sum)
 
-            input_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](
-                input_buf
+            input_tensor = TileTensor[mut=False, dtype, InLayout](
+                input_buf, in_layout
+            )
+            var output_tensor = TileTensor[mut=True, dtype, OutLayout](
+                output_buf, out_layout
             )
-            var output_tensor = LayoutTensor[dtype, out_layout, MutAnyOrigin](
-                output_buf
+            var temp_tensor = TileTensor[mut=True, dtype, ClusterLayout](
+                temp_buf, cluster_layout
             )
-            var temp_tensor = LayoutTensor[
-                dtype, Layout.row_major(CLUSTER_SIZE), MutAnyOrigin
-            ](temp_buf)
 
-            comptime kernel = cluster_collective_operations[
-                in_layout, out_layout, TPB
-            ]
+            comptime kernel = cluster_collective_operations[TPB]
             ctx.enqueue_function[kernel, kernel](
                 output_tensor,
                 input_tensor,
@@ -332,16 +323,14 @@ def main() raises:
                         Scalar[dtype](i % 50) * 0.02
                     )  # Pattern for testing
 
-            input_tensor = LayoutTensor[dtype, in_layout, ImmutAnyOrigin](
-                input_buf
+            input_tensor = TileTensor[mut=False, dtype, InLayout](
+                input_buf, in_layout
+            )
+            output_tensor = TileTensor[mut=True, dtype, ClusterLayout](
+                output_buf, cluster_layout
             )
-            output_tensor = LayoutTensor[
-                dtype, Layout.row_major(CLUSTER_SIZE), MutAnyOrigin
-            ](output_buf)
 
-            comptime kernel = advanced_cluster_patterns[
-                in_layout, Layout.row_major(CLUSTER_SIZE), TPB
-            ]
+            comptime kernel = advanced_cluster_patterns[TPB]
             ctx.enqueue_function[kernel, kernel](
                 output_tensor,
                 input_tensor,