Skip to content

Commit 065bfbb

Browse files
Corrections and fixes to last batch of mapper additions
1 parent fe147bc commit 065bfbb

6 files changed

Lines changed: 24 additions & 19 deletions

File tree

src/mappers_wip/mapper273.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -38,11 +38,11 @@ static SFORMAT StateRegs[] = {
3838
{ 0 }
3939
};
4040

41-
static void SetPRGBank_vrc2(uint16 A, uint16 V) {
41+
static void SetPRG(uint16 A, uint16 V) {
4242
setprg8(A, (V & 0x1F));
4343
}
4444

45-
static void SetCHRBank_vrc2(uint16 A, uint16 V) {
45+
static void SetCHR(uint16 A, uint16 V) {
4646
setchr1(A, (V & 0x1FF));
4747
}
4848

@@ -87,6 +87,8 @@ static void Power(void) {
8787

8888
void Mapper273_Init(CartInfo *info) {
8989
VRC24_Init(info, VRC24_VRC2, 0x04, 0x08, 0, 0);
90+
VRC24_pwrap = SetPRG;
91+
VRC24_cwrap = SetCHR;
9092
info->Power = Power;
9193
MapIRQHook = CPUCycle;
9294
AddExState(StateRegs, ~0, 0, 0);

src/mappers_wip/mapper474.c

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -20,7 +20,7 @@
2020

2121
/* NTDEC N625231*/
2222

23-
#include "mapinc.h"
23+
#include "mapinc.h"
2424
#include "mmc3.h"
2525

2626
static struct {
@@ -32,10 +32,6 @@ static SFORMAT StateRegs[] = {
3232
{ 0 }
3333
};
3434

35-
static void SetCHR(uint16 A, uint16 V) {
36-
setchr1(A, ((m474.reg << 7) & 0x100) | V);
37-
}
38-
3935
static void SyncPRG(void) {
4036
uint16 base = (m474.reg << 5) & 0x20;
4137
uint16 bank = base | (m474.reg >> 3) & 0x1F;
@@ -48,6 +44,10 @@ static void SyncPRG(void) {
4844
}
4945
}
5046

47+
static void SetCHR(uint16 A, uint16 V) {
48+
setchr1(A, ((m474.reg << 7) & 0x100) | V);
49+
}
50+
5151
static DECLFW(WriteExtra) {
5252
if (A & 0x100) {
5353
m474.reg = V;

src/mappers_wip/mapper476.c

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -90,8 +90,13 @@ static void Power(void) {
9090
SetWriteHandler(0x5000, 0x5FFF, writeReg);
9191
}
9292

93+
static void StateRestore(int version) {
94+
Sync();
95+
}
96+
9397
void Mapper476_Init(CartInfo *info) {
9498
info->Power = Power;
9599
info->Reset = Reset;
100+
GameStateRestore = StateRestore;
96101
AddExState(StateRegs, ~0, 0, NULL);
97102
}

src/mappers_wip/mapper477.c

Lines changed: 3 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -35,12 +35,11 @@ static DECLFW(WriteLatch) {
3535
/* Resistors placed on the first 128 KiB PRG ROM chip (banks 8-15) cause ROM
3636
* to always win D0..D3. Otherwise, normal AND-type bus conflicts. */
3737
if (latch.data & 0x08) {
38-
latch.data = ((CartBR(A) & 0x0F) | ((V & CartBR(A)) & ~0x0F));
39-
Sync();
38+
V = ((CartBR(A) & 0x0F) | ((V & CartBR(A)) & ~0x0F));
4039
} else {
41-
latch.data = (CartBR(A) & V);
42-
Sync();
40+
V = (CartBR(A) & V);
4341
}
42+
Latch_Write(A, V);
4443
}
4544

4645
static void Power(void) {

src/mappers_wip/mapper488.c

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -59,7 +59,6 @@ static void Power(void) {
5959
}
6060

6161
void Mapper488_Init(CartInfo *info) {
62-
m488.dipsw = 0;
6362
Latch_Init(info, Sync, Read, 0, 0);
6463
info->Power = Power;
6564
info->Reset = Reset;

src/mappers_wip/mapper490.c

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -32,13 +32,6 @@ static SFORMAT StateRegs[] = {
3232
{ 0 }
3333
};
3434

35-
static void SetCHR(uint16 A, uint16 V) {
36-
uint16 mask = 0xFF;
37-
uint16 base = (m490.reg << 4);
38-
39-
setchr1(A, ((base & ~mask) | (V & mask)));
40-
}
41-
4235
static void SyncPRG(void) {
4336
if (m490.reg & 0x20)
4437
setprg32(0x8000, m490.reg >> 1);
@@ -48,6 +41,13 @@ static void SyncPRG(void) {
4841
}
4942
}
5043

44+
static void SetCHR(uint16 A, uint16 V) {
45+
uint16 mask = 0xFF;
46+
uint16 base = (m490.reg << 4);
47+
48+
setchr1(A, ((base & ~mask) | (V & mask)));
49+
}
50+
5151
static DECLFR(ReadDIP) {
5252
if (m490.reg & 0x80) {
5353
A &= 0x0F;

0 commit comments

Comments
 (0)