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nevergiveupcppnevergiveupcpp
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fix(macro_assembler): replace insn_seq alias with instruction_sequence for Clang CTAD compatibility
1 parent 35c5ee8 commit 57f250d

2 files changed

Lines changed: 35 additions & 42 deletions

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‎.github/workflows/ci.yml‎

Lines changed: 8 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
name: ci
1+
name: CI
22

33
on:
44
push:
@@ -16,37 +16,37 @@ jobs:
1616

1717
matrix:
1818
include:
19-
- name: Windows (MSVC x64)
19+
- name: Windows x64 / MSVC
2020
os: windows-latest
2121
preset: msvc-x64
2222
vcpkg_triplet: x64-windows
2323

24-
- name: Windows (Clang x64)
24+
- name: Windows x64 / Clang
2525
os: windows-latest
2626
preset: llvm-x64
2727
vcpkg_triplet: x64-windows
2828

29-
- name: Windows ARM64 (MSVC)
29+
- name: Windows ARM64 / MSVC
3030
os: windows-11-arm
3131
preset: msvc-arm64
3232
vcpkg_triplet: arm64-windows
3333

34-
- name: Linux (GCC x64)
34+
- name: Linux x64 / GCC
3535
os: ubuntu-latest
3636
preset: gcc-linux-x64
3737
vcpkg_triplet: x64-linux-dynamic
3838

39-
- name: Linux (Clang x64)
39+
- name: Linux x64 / Clang
4040
os: ubuntu-latest
4141
preset: clang-linux-x64
4242
vcpkg_triplet: x64-linux-dynamic
4343

44-
- name: Linux ARM64 (GCC)
44+
- name: Linux ARM64 / GCC
4545
os: ubuntu-24.04-arm
4646
preset: gcc-linux-arm64
4747
vcpkg_triplet: arm64-linux
4848

49-
- name: macOS ARM64 (Clang)
49+
- name: macOS ARM64 / AppleClang
5050
os: macos-latest
5151
preset: apple-clang-macos-arm64
5252
vcpkg_triplet: arm64-osx
@@ -58,13 +58,6 @@ jobs:
5858
shell: bash
5959
run: echo "VCPKG_ROOT=$VCPKG_INSTALLATION_ROOT" >> $GITHUB_ENV
6060

61-
- name: Install Clang 18
62-
if: matrix.preset == 'clang-linux-x64'
63-
run: |
64-
sudo apt-get install -y clang-18
65-
sudo update-alternatives --install /usr/bin/clang clang /usr/bin/clang-18 100
66-
sudo update-alternatives --install /usr/bin/clang++ clang++ /usr/bin/clang++-18 100
67-
6861
- name: Install GTest
6962
run: vcpkg install gtest:${{ matrix.vcpkg_triplet }}
7063

‎include/pvm/codegen/macro_assembler.h‎

Lines changed: 27 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -45,30 +45,30 @@ namespace ngu::pvm {
4545

4646
// dst = 0
4747
consteval auto ZERO(const arch::reg dst) const {
48-
return detail::insn_seq{
48+
return detail::instruction_sequence{
4949
XOR(dst, operand(dst))
5050
};
5151
}
5252

5353
// dst = -dst (two's complement)
5454
consteval auto NEG(const arch::reg dst) const {
55-
return detail::insn_seq{
55+
return detail::instruction_sequence{
5656
NOT(dst),
5757
ADD(dst, operand(1u))
5858
};
5959
}
6060

6161
// dst = src (via xor+or)
6262
consteval auto MOVC(const arch::reg dst, const arch::reg src) const {
63-
return detail::insn_seq{
63+
return detail::instruction_sequence{
6464
XOR(dst, operand(dst)),
6565
OR(dst, operand(src))
6666
};
6767
}
6868

6969
// dst = (hi << 32) | lo
7070
consteval auto MOV64(const arch::reg dst, std::uint32_t hi, std::uint32_t lo) const {
71-
return detail::insn_seq{
71+
return detail::instruction_sequence{
7272
MOV(dst, operand(hi)),
7373
SHL(dst, operand(32u)),
7474
OR(dst, operand(lo))
@@ -77,7 +77,7 @@ namespace ngu::pvm {
7777

7878
// swap a, b without temp
7979
consteval auto SWAP(const arch::reg a, const arch::reg b) const {
80-
return detail::insn_seq{
80+
return detail::instruction_sequence{
8181
XOR(a, operand(b)),
8282
XOR(b, operand(a)),
8383
XOR(a, operand(b))
@@ -86,7 +86,7 @@ namespace ngu::pvm {
8686

8787
// dst = |dst| (signed). scratch is clobbered.
8888
consteval auto ABS(const arch::reg dst, const arch::reg scratch, std::uint32_t label_id) const {
89-
return detail::insn_seq{
89+
return detail::instruction_sequence{
9090
MOV(scratch, operand(dst)),
9191
SHR(scratch, operand(63u)), // scratch = 1 if negative, 0 if positive/zero
9292
CMP(scratch, operand(0u)),
@@ -99,7 +99,7 @@ namespace ngu::pvm {
9999

100100
// a = min(a, b) unsigned. scratch is clobbered.
101101
consteval auto MIN(const arch::reg a, const arch::reg b, const arch::reg scratch, std::uint32_t label_id) const {
102-
return detail::insn_seq{
102+
return detail::instruction_sequence{
103103
CMP(a, operand(b)), // bit0=EQ, bit1=LT(a<b unsigned)
104104
JEL(label_id), // if a == b, keep a
105105
MOV(scratch, operand(arch::reg::REG_FLAGS)), // save flags before they're clobbered
@@ -113,7 +113,7 @@ namespace ngu::pvm {
113113

114114
// a = max(a, b) unsigned. scratch is clobbered.
115115
consteval auto MAX(const arch::reg a, const arch::reg b, const arch::reg scratch, std::uint32_t label_id) const {
116-
return detail::insn_seq{
116+
return detail::instruction_sequence{
117117
CMP(a, operand(b)), // bit0=EQ, bit1=LT(a<b unsigned)
118118
JEL(label_id), // if a == b, keep a
119119
MOV(scratch, operand(arch::reg::REG_FLAGS)), // save flags before they're clobbered
@@ -127,21 +127,21 @@ namespace ngu::pvm {
127127

128128
// dst *= 2^n
129129
consteval auto MUL_POW2(const arch::reg dst, std::uint8_t n) const {
130-
return detail::insn_seq{
130+
return detail::instruction_sequence{
131131
SHL(dst, operand(n))
132132
};
133133
}
134134

135135
// dst /= 2^n (unsigned)
136136
consteval auto DIV_POW2(const arch::reg dst, std::uint8_t n) const {
137-
return detail::insn_seq{
137+
return detail::instruction_sequence{
138138
SHR(dst, operand(n))
139139
};
140140
}
141141

142142
// dst *= 3
143143
consteval auto MUL3(const arch::reg dst, const arch::reg scratch) const {
144-
return detail::insn_seq{
144+
return detail::instruction_sequence{
145145
MOV(scratch, operand(dst)),
146146
SHL(scratch, operand(1u)),
147147
ADD(dst, operand(scratch))
@@ -150,7 +150,7 @@ namespace ngu::pvm {
150150

151151
// dst *= 5
152152
consteval auto MUL5(const arch::reg dst, const arch::reg scratch) const {
153-
return detail::insn_seq{
153+
return detail::instruction_sequence{
154154
MOV(scratch, operand(dst)),
155155
SHL(scratch, operand(2u)),
156156
ADD(dst, operand(scratch))
@@ -159,7 +159,7 @@ namespace ngu::pvm {
159159

160160
// dst = (dst + align-1) & ~(align-1), align must be power of 2
161161
consteval auto ALIGN_UP(const arch::reg dst, std::uint32_t align) const {
162-
return detail::insn_seq{
162+
return detail::instruction_sequence{
163163
ADD(dst, operand(align - 1)),
164164
AND(dst, operand(~(align - 1)))
165165
};
@@ -168,7 +168,7 @@ namespace ngu::pvm {
168168
// (lo, hi) += 1 with carry
169169
consteval auto INC64(const arch::reg lo, const arch::reg hi,
170170
std::uint32_t label_id) const {
171-
return detail::insn_seq{
171+
return detail::instruction_sequence{
172172
ADD(lo, operand(1u)),
173173
CMP(lo, operand(0u)),
174174
JNEL(label_id),
@@ -181,7 +181,7 @@ namespace ngu::pvm {
181181
consteval auto ADD64(const arch::reg dst_lo, const arch::reg dst_hi,
182182
const arch::reg src_lo, const arch::reg src_hi,
183183
const arch::reg tmp, std::uint32_t label_id) const {
184-
return detail::insn_seq{
184+
return detail::instruction_sequence{
185185
MOV(tmp, operand(dst_lo)),
186186
ADD(dst_lo, operand(src_lo)),
187187
CMP(dst_lo, operand(tmp)),
@@ -194,7 +194,7 @@ namespace ngu::pvm {
194194

195195
// flags = (src >> bit) & 1 == 0
196196
consteval auto TEST_BIT(const arch::reg src, const arch::reg scratch, std::uint8_t bit) const {
197-
return detail::insn_seq{
197+
return detail::instruction_sequence{
198198
MOV(scratch, operand(1u)),
199199
SHL(scratch, operand(bit)),
200200
AND(scratch, operand(src)),
@@ -204,21 +204,21 @@ namespace ngu::pvm {
204204

205205
// dst &= (1 << n) - 1
206206
consteval auto MASK_LO(const arch::reg dst, std::uint8_t n) const {
207-
return detail::insn_seq{
207+
return detail::instruction_sequence{
208208
AND(dst, operand((1ull << n) - 1))
209209
};
210210
}
211211

212212
// dst &= ~((1 << n) - 1)
213213
consteval auto CLEAR_LO(const arch::reg dst, std::uint8_t n) const {
214-
return detail::insn_seq{
214+
return detail::instruction_sequence{
215215
AND(dst, operand(~((1ull << n) - 1)))
216216
};
217217
}
218218

219219
// scratch = (src >> idx*8) & 0xFF
220220
consteval auto EXTRACT_BYTE(const arch::reg src, const arch::reg scratch, std::uint8_t idx) const {
221-
return detail::insn_seq{
221+
return detail::instruction_sequence{
222222
MOV(scratch, operand(src)),
223223
SHR(scratch, operand(static_cast<std::uint8_t>(idx * 8u))),
224224
AND(scratch, operand(0xFFu))
@@ -227,7 +227,7 @@ namespace ngu::pvm {
227227

228228
// dst |= (scratch & 0xFF) << idx*8
229229
consteval auto INSERT_BYTE(const arch::reg dst, const arch::reg scratch, std::uint8_t idx) const {
230-
return detail::insn_seq{
230+
return detail::instruction_sequence{
231231
AND(scratch, operand(0xFFu)),
232232
SHL(scratch, operand(static_cast<std::uint8_t>(idx * 8u))),
233233
OR(dst, operand(scratch))
@@ -236,14 +236,14 @@ namespace ngu::pvm {
236236

237237
// dst = swap upper/lower 16 bits
238238
consteval auto ROT16(const arch::reg dst) const {
239-
return detail::insn_seq{
239+
return detail::instruction_sequence{
240240
ROL(dst, operand(16u))
241241
};
242242
}
243243

244244
// dst = byte-reverse dst
245245
consteval auto BSWAP32(const arch::reg dst, const arch::reg s1, const arch::reg s2) const {
246-
return detail::insn_seq{
246+
return detail::instruction_sequence{
247247
MOV(s1, operand(dst)),
248248
AND(s1, operand(0xFFu)),
249249
SHL(s1, operand(24u)),
@@ -266,7 +266,7 @@ namespace ngu::pvm {
266266
// a += b; c ^= a; c <<<= n
267267
consteval auto ARX(const arch::reg a, const arch::reg b,
268268
const arch::reg c, std::uint8_t rot) const {
269-
return detail::insn_seq{
269+
return detail::instruction_sequence{
270270
ADD(a, operand(b)),
271271
XOR(c, operand(a)),
272272
ROL(c, operand(rot))
@@ -275,15 +275,15 @@ namespace ngu::pvm {
275275

276276
// a ^= b; a <<<= n
277277
consteval auto XR(const arch::reg a, const arch::reg b, std::uint8_t rot) const {
278-
return detail::insn_seq{
278+
return detail::instruction_sequence{
279279
XOR(a, operand(b)),
280280
ROL(a, operand(rot))
281281
};
282282
}
283283

284284
// a += b; c ^= a
285285
consteval auto AX(const arch::reg a, const arch::reg b, const arch::reg c) const {
286-
return detail::insn_seq{
286+
return detail::instruction_sequence{
287287
ADD(a, operand(b)),
288288
XOR(c, operand(a))
289289
};
@@ -292,7 +292,7 @@ namespace ngu::pvm {
292292
// scratch = (v << left) ^ (v >> right)
293293
consteval auto XS(const arch::reg v, const arch::reg scratch,
294294
const arch::reg tmp, std::uint8_t left, std::uint8_t right) const {
295-
return detail::insn_seq{
295+
return detail::instruction_sequence{
296296
MOV(scratch, operand(v)),
297297
SHL(scratch, operand(left)),
298298
MOV(tmp, operand(v)),
@@ -303,7 +303,7 @@ namespace ngu::pvm {
303303

304304
// counter -= 1; jump to body_label if counter != 0
305305
consteval auto LOOP(const arch::reg counter, std::uint32_t body_label) const {
306-
return detail::insn_seq{
306+
return detail::instruction_sequence{
307307
SUB(counter, operand(1u)),
308308
CMP(counter, operand(0u)),
309309
JNEL(body_label)

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