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| 1 | +/* |
| 2 | +Copyright 2023 @ Nuphy <https://nuphy.com/> |
| 3 | +
|
| 4 | +This program is free software: you can redistribute it and/or modify |
| 5 | +it under the terms of the GNU General Public License as published by |
| 6 | +the Free Software Foundation, either version 2 of the License, or |
| 7 | +(at your option) any later version. |
| 8 | +
|
| 9 | +This program is distributed in the hope that it will be useful, |
| 10 | +but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 11 | +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 12 | +GNU General Public License for more details. |
| 13 | +
|
| 14 | +You should have received a copy of the GNU General Public License |
| 15 | +along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 16 | +*/ |
| 17 | + |
| 18 | +#pragma once |
| 19 | + |
| 20 | +#define TAP_CODE_DELAY 8 |
| 21 | +#define DYNAMIC_KEYMAP_MACRO_DELAY 8 |
| 22 | +#define EECONFIG_USER_DATA_SIZE 8 |
| 23 | + |
| 24 | +#define DEV_MODE_PIN C0 |
| 25 | +#define SYS_MODE_PIN C1 |
| 26 | +#define DC_BOOST_PIN C2 |
| 27 | +#define NRF_RESET_PIN B4 |
| 28 | +#define NRF_BOOT_PIN B5 |
| 29 | +#define NRF_WAKEUP_PIN C4 |
| 30 | +#define RGB_DRIVER_SDB1 C6 |
| 31 | +#define RGB_DRIVER_SDB2 C7 |
| 32 | + |
| 33 | +#define SERIAL_DRIVER SD1 |
| 34 | +#define SD1_TX_PIN B6 |
| 35 | +#define SD1_TX_PAL_MODE 0 |
| 36 | +#define SD1_RX_PIN B7 |
| 37 | +#define SD1_RX_PAL_MODE 0 |
| 38 | + |
| 39 | +// This is a 7-bit address, that gets left-shifted and bit 0 |
| 40 | +// set to 0 for write, 1 for read (as per I2C protocol) |
| 41 | +// The address will vary depending on your wiring: |
| 42 | +// 0b1110100 AD <-> GND |
| 43 | +// 0b1110111 AD <-> VCC |
| 44 | +// 0b1110101 AD <-> SCL |
| 45 | +// 0b1110110 AD <-> SDA |
| 46 | +#define DRIVER_ADDR_1 0b1010000 |
| 47 | +#define DRIVER_ADDR_2 0b1010011 |
| 48 | + |
| 49 | +#define ISSI_TIMEOUT 1 |
| 50 | + |
| 51 | +#define I2C_DRIVER I2CD1 |
| 52 | +#define I2C1_SCL_PIN B8 |
| 53 | +#define I2C1_SDA_PIN B9 |
| 54 | +#define I2C1_CLOCK_SPEED 1000000 |
| 55 | + |
| 56 | +#define I2C1_SCL_PAL_MODE 1 |
| 57 | +#define I2C1_SDA_PAL_MODE 1 |
| 58 | + |
| 59 | +#define I2C1_TIMINGR_PRESC 0U |
| 60 | +#define I2C1_TIMINGR_SCLDEL 0U |
| 61 | +#define I2C1_TIMINGR_SDADEL 0U |
| 62 | +#define I2C1_TIMINGR_SCLH 0U |
| 63 | +#define I2C1_TIMINGR_SCLL 0U |
| 64 | +#define I2C1_DUTY_CYCLE FAST_DUTY_CYCLE_16_9 |
| 65 | + |
| 66 | +#define DRIVER_COUNT 2 |
| 67 | +#define DRIVER_1_LED_TOTAL 58 |
| 68 | +#define DRIVER_2_LED_TOTAL (42 + 10) |
| 69 | +#define RGB_MATRIX_LED_COUNT (DRIVER_1_LED_TOTAL + DRIVER_2_LED_TOTAL) |
| 70 | + |
| 71 | +#define RGB_MATRIX_DEFAULT_MODE RGB_MATRIX_CYCLE_LEFT_RIGHT |
| 72 | + |
| 73 | + |
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