@@ -57,8 +57,8 @@ int StubAssembler::call_RT(Register oop_result1, Register metadata_result, addre
5757 // z_abi_160.gpr14 (e.g. InterpreterRuntime::_new()).
5858 // Therefore we load the PC into Z_R1_scratch and let set_last_Java_frame() save
5959 // it into the frame anchor.
60- address pc = get_PC (Z_R1_scratch) ;
61- int call_offset = ( int )(pc - addr_at ( 0 ) );
60+ Label resume ;
61+ z_larl (Z_R1_scratch, resume );
6262 set_last_Java_frame (Z_SP , Z_R1_scratch);
6363
6464 // ARG1 must hold thread address.
@@ -67,9 +67,12 @@ int StubAssembler::call_RT(Register oop_result1, Register metadata_result, addre
6767 address return_pc = nullptr ;
6868 align_call_far_patchable (this ->pc ());
6969 return_pc = call_c_opt (entry_point);
70+
71+ bind (resume);
72+ int call_offset = offset (); // (int)(return_pc - addr_at(0));
7073 assert (return_pc != nullptr , " const section overflow" );
7174
72- reset_last_Java_frame ();
75+ reset_last_Java_frame (/* check_last_java_sp= */ false );
7376
7477 // Check for pending exceptions.
7578 {
@@ -208,8 +211,37 @@ void Runtime1::initialize_pd() {
208211}
209212
210213uint Runtime1::runtime_blob_current_thread_offset (frame f) {
211- Unimplemented ();
212- return 0 ;
214+ CodeBlob* cb = f.cb ();
215+ assert (cb == Runtime1::blob_for (StubId::c1_monitorenter_id) ||
216+ cb == Runtime1::blob_for (StubId::c1_monitorenter_nofpu_id), " must be" );
217+ assert (cb != nullptr && cb->is_runtime_stub (), " invalid frame" );
218+
219+ // Calculate the offset of Z_thread (Z_R8) in the saved register area.
220+ // Both c1_monitorenter_id and c1_monitorenter_nofpu_id have the same frame layout:
221+ // - c1_monitorenter_id uses RegisterSaver::all_registers (saves FPU regs)
222+ // - c1_monitorenter_nofpu_id uses RegisterSaver::all_integer_registers (excludes FPU regs but reserves space)
223+ //
224+ // From RegisterSaver_LiveRegs and RegisterSaver_LiveIntRegs:
225+ // Both have 15 float register slots (F0, F2-F15, F1 is excluded as scratch)
226+ // Then integer registers: R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13
227+ // Z_thread is Z_R8, which is the 7th integer register (index 6 from R2)
228+ //
229+ // Stack layout from SP:
230+ // [0..159] : z_abi_160
231+ // [160..279] : 15 float register slots (15 * 8 = 120 bytes)
232+ // [280..327] : R2-R7 (6 * 8 = 48 bytes)
233+ // [328..335] : R8 (Z_thread) <- this is what we need
234+ //
235+ // Offset = 160 + 120 + 48 = 328 bytes from SP
236+ // Return value is in 64-bit words: 328 / 8 = 41
237+
238+ const int float_reg_slots = 15 ; // F0, F2-F15 (F1 is scratch, excluded)
239+ const int int_regs_before_r8 = 6 ; // R2, R3, R4, R5, R6, R7
240+ const int z_thread_offset = frame::z_abi_160_size +
241+ (float_reg_slots * 8 ) +
242+ (int_regs_before_r8 * 8 );
243+
244+ return z_thread_offset / 8 ; // Convert to 64-bit words
213245}
214246
215247OopMapSet* Runtime1::generate_exception_throw (StubAssembler* sasm, address target, bool has_argument) {
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