Commit 6fb19c9
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synth: blackbox SYNTH_BLACKBOXES modules before hierarchy check
Adds a checkpoint-based code path for SYNTH_BLACKBOXES to synth.tcl
and aligns the existing source-based path in synth_preamble.tcl so
both flows behave identically.
Use case: external orchestrators that drive parallel partition
synthesis. Each partition loads the same canonical RTLIL checkpoint
and blackboxes the modules that belong to other partitions, so it
only synthesises its own subhierarchy. The same SYNTH_BLACKBOXES
list is reused across partitions, so unknown names are skipped
silently with `catch { blackbox $m }` instead of erroring.
In synth_preamble.tcl the verilog-frontend path is reordered to
blackbox before `hierarchy -check -top` (matching the new synth.tcl
path) and to use `catch` (matching the slang and synth.tcl paths).
SYNTH_BLACKBOXES is already documented in variables.yaml.
No behaviour change when the env var is unset.
Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com>1 parent 523bbbb commit 6fb19c9
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