Add Catalyst N1: Open-source 128-core neuromorphic processor

[Mr-wabbit]

New Hardware Chip Submission

Chip name: Catalyst N1
Organization: Catalyst Neuromorphic Ltd
Year: 2026
Type: Digital, FPGA-validated

Specifications

Parameter	Value
Cores	128
Neurons per core	1,024
Total neurons	131,072
Neuron model	Leaky Integrate-and-Fire (16-bit fixed-point)
Synapse pool	131,072 entries per core
Learning	STDP, 14-opcode programmable learning ISA
Network-on-Chip	Configurable XY mesh with multicast
Management	RV32IM RISC-V cluster
Multi-chip	Chip link with routing table
License	Apache 2.0

Links

• GitHub (RTL + SDK): https://github.com/catalyst-neuromorphic/catalyst-n1
• HuggingFace: https://huggingface.co/Catalyst-Neuromorphic/catalyst-n1
• Website: https://catalyst-neuromorphic.com

FPGA Validation

Validated on AWS F2 (Xilinx VU47P) and Xilinx Kria K26 SOM. Full regression suite passes. Power measured at 0.378W on K26.

Notes

Fully open-source Verilog RTL under Apache 2.0. Includes Python SDK with CPU, GPU, and FPGA backends. Based on published Intel Loihi 1 architecture with original RTL implementation.