In the cr_xp10_decomp_htf_svt_writer module, the following assignment appears to use an incorrect width calculation:
bl = blt_padded[r_blt_index*$clog2(MAX_BLT_DEPTH+1) +: BL_PER_CYCLE*$clog2(MAX_BLT_DEPTH+1)];
The generated part-select width, combined with the base offset, can cause the selection to extend beyond the valid range of blt_padded in some scenarios. Simulators that follow the SystemVerilog LRM are returning X values when this occurs and causing a rippling effect, causing errors at the output.
MAX_BCT_DEPTH should be used instead of MAX_BLT_DEPTH, since it matches the encoding width of the data stored in blt_padded:
bl = blt_padded[r_blt_index*$clog2(MAX_BCT_DEPTH+1) +: BL_PER_CYCLE*$clog2(MAX_BCT_DEPTH+1)];
In the cr_xp10_decomp_htf_svt_writer module, the following assignment appears to use an incorrect width calculation:
bl = blt_padded[r_blt_index*$clog2(MAX_BLT_DEPTH+1) +: BL_PER_CYCLE*$clog2(MAX_BLT_DEPTH+1)];
The generated part-select width, combined with the base offset, can cause the selection to extend beyond the valid range of blt_padded in some scenarios. Simulators that follow the SystemVerilog LRM are returning X values when this occurs and causing a rippling effect, causing errors at the output.
MAX_BCT_DEPTH should be used instead of MAX_BLT_DEPTH, since it matches the encoding width of the data stored in blt_padded:
bl = blt_padded[r_blt_index*$clog2(MAX_BCT_DEPTH+1) +: BL_PER_CYCLE*$clog2(MAX_BCT_DEPTH+1)];