x60: vectorize M1 int8 GEMV kernel on RVV#5
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Replace the pure-scalar SQ8BitGemmM1Kernel_CompInt8_ScaleFp16_Impl (used for <=3 remainder rows and batch=1 token generation) with an RVV kernel that vectorizes across the 16 columns of each repacked-B group. Inner loop uses a stride-8 int8 gather (vlse8) over the IME1 tile layout, widening vwmacc accumulation, then a fused vfmacc that matches GCC's FMA-contraction of the scalar 'acc += a_scale*b_scale*isum' so results are bit-exact with the scalar path. Verified on X60 (SpaceMiT): - standalone skeleton: 9/9 cases bit-exact (max_abs 0.0), 9.36x faster - llama-bench tg64 on qwen2.5-0.5b-q8_0: 0.82 -> 5.29 t/s (6.45x) - llama-cli generation coherent (IME path, use_ime1=1)
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Summary
Replaces the pure-scalar
SQ8BitGemmM1Kernel_CompInt8_ScaleFp16_Impl(the i8i8 M1 path used for<=3remainder rows and batch=1 token generation) with an RVV-vectorized kernel.Approach
vlse8) over the IME1 tile layout → wideningvwmaccaccumulation.vfmaccthat matches GCC's FMA-contraction of the scalaracc += a_scale*b_scale*isum, so output is bit-exact with the scalar path (non-fused mul+add drifts ~1e-4).zfh) scratch to avoid azvfhbuild dependency.Verification (on X60 / SpaceMiT hardware)
qwen2.5-0.5b-q8_0: 0.82 → 5.29 t/s (6.45×).use_ime1=1).Risk
Behavior-preserving (bit-exact) hot-path optimization; no API/layout change. Diff is 29+/19-, single file.