UTILS/ARCH : Add FUJITSU-MONAKA CPU (#1257)

## What
    Adding support for FUJITSU-MONAKA CPU and FUJITSU-A64FX CPU.

Reference

  - FUJITSU-MONAKA specification (Ver. 1.0; Dec 26, 2024)

-
[.pdf](https://github.com/fujitsu/FUJITSU-MONAKA/blob/main/doc/FUJITSU-MONAKA_specification_v1.0.pdf)

    - 2 . Indetification registers description
      - 2.1. Main ID Register EL1 (MIDR\_EL1)

        | Name                | Value | Description               |
        | :---                |  ---: | :---                      |
        | Implementor         | 0x46  | Fujitsu Limited           |
        | Primary part number | 0x003 | FUJITSU-MONAKA processor  |

  - A64FX Identification Method (Ver. 1.1; Jan 20, 2023)

-
[.pdf](https://github.com/fujitsu/A64FX/blob/master/doc/A64FX_identification_method_v1.1_EN.pdf)

    - 2 . Identification Method
      - 2.1. Identifying by viewing /proc/cpuinfo

        | Name                | Value | Description               |
        | :---                |  ---: | :---                      |
        | Implementor         | 0x46  | Fujitsu Limited           |
        | Primary part number | 0x001 | FUJITSU A64FX processor   |

---------

Co-authored-by: Kento Hasegawa <hasegawa.kento@fujitsu.com>

Author: mentOS31

src/utils/arch/aarch64/cpu.h

@@ -1,10 +1,11 @@
 /**
-* Copyright (c) 2001-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
-* Copyright (C) ARM Ltd. 2016-2020.  ALL RIGHTS RESERVED.
-* Copyright (C) Stony Brook University. 2016-2020.  ALL RIGHTS RESERVED.
-*
-* See file LICENSE for terms.
-*/
+ * Copyright (c) 2001-2024, NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * Copyright (C) ARM Ltd. 2016-2020.  ALL RIGHTS RESERVED.
+ * Copyright (C) Stony Brook University. 2016-2020.  ALL RIGHTS RESERVED.
+ * Copyright (C) 2026,      Fujitsu Limited. ALL RIGHTS RESERVED.
+ *
+ * See file LICENSE for terms.
+ */
 
 #ifndef UCC_AARCH64_CPU_H_
 #define UCC_AARCH64_CPU_H_
@@ -73,6 +74,15 @@ static inline ucc_cpu_model_t ucc_arch_get_cpu_model()
         return UCC_CPU_MODEL_NVIDIA_GRACE;
     }
 
+    if (ucc_arch_get_cpu_vendor() == UCC_CPU_VENDOR_FUJITSU_ARM) {
+        if (cpuid.part == 0x001) {
+            return UCC_CPU_MODEL_FUJITSU_A64FX;
+        }
+        if (cpuid.part == 0x003) {
+            return UCC_CPU_MODEL_FUJITSU_MONAKA;
+        }
+    }
+
     return UCC_CPU_MODEL_ARM_AARCH64;
 }
 

src/utils/arch/cpu.h

@@ -1,11 +1,12 @@
 /**
-* Copyright (c) NVIDIA CORPORATION & AFFILIATES, 2001-2024. ALL RIGHTS RESERVED.
-* Copyright (C) ARM Ltd. 2016.  ALL RIGHTS RESERVED.
-* Copyright (C) Shanghai Zhaoxin Semiconductor Co., Ltd. 2020. ALL RIGHTS RESERVED.
-* Copyright (C) Rivos Inc. 2023
-*
-* See file LICENSE for terms.
-*/
+ * Copyright (c) NVIDIA CORPORATION & AFFILIATES, 2001-2024. ALL RIGHTS RESERVED.
+ * Copyright (C) ARM Ltd. 2016.  ALL RIGHTS RESERVED.
+ * Copyright (C) Shanghai Zhaoxin Semiconductor Co., Ltd. 2020. ALL RIGHTS RESERVED.
+ * Copyright (C) Rivos Inc. 2023
+ * Copyright (C) 2026,      Fujitsu Limited. ALL RIGHTS RESERVED.
+ *
+ * See file LICENSE for terms.
+ */
 
 #ifndef UCC_ARCH_CPU_H
 #define UCC_ARCH_CPU_H
@@ -36,6 +37,8 @@ typedef enum ucc_cpu_model {
     UCC_CPU_MODEL_ZHAOXIN_WUDAOKOU,
     UCC_CPU_MODEL_ZHAOXIN_LUJIAZUI,
     UCC_CPU_MODEL_NVIDIA_GRACE,
+    UCC_CPU_MODEL_FUJITSU_A64FX,
+    UCC_CPU_MODEL_FUJITSU_MONAKA,
     UCC_CPU_MODEL_LAST
 } ucc_cpu_model_t;
 
@@ -108,6 +111,10 @@ static inline ucc_cpu_model_t ucc_get_model_from_str(const char *m_name)
         return UCC_CPU_MODEL_ZHAOXIN_LUJIAZUI;
     if (strcasecmp(m_name, "grace") == 0)
         return UCC_CPU_MODEL_NVIDIA_GRACE;
+    if (strcasecmp(m_name, "a64fx") == 0)
+        return UCC_CPU_MODEL_FUJITSU_A64FX;
+    if (strcasecmp(m_name, "monaka") == 0)
+        return UCC_CPU_MODEL_FUJITSU_MONAKA;
     return UCC_CPU_MODEL_UNKNOWN;
 }