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Maxim-DoroninMaxim-Doronin
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UD2026.12.1 Content (#282)
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Lines changed: 1394 additions & 385 deletions

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‎cmake/add_native_exec_target.cmake‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
#
55

66
# For Android, we use the native tools from the prebuilt binaries.
7-
set(VPUX_DEFAULT_TOOL_DIR "${OUTPUT_ROOT}/bin/intel64/Release")
7+
set(VPUX_DEFAULT_TOOL_DIR "${OUTPUT_ROOT}/bin/intel64/${CMAKE_BUILD_TYPE}")
88

99
function(add_native_exec_target NATIVE_TARGET_NAME)
1010
# Parse optional arguments

‎cmake/compile_options.cmake‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -114,7 +114,7 @@ function(enable_warnings_as_errors TARGET_NAME)
114114
else()
115115
target_compile_options(${TARGET_NAME}
116116
PRIVATE
117-
-Wall -Wextra -Werror -Werror=suggest-override
117+
-Wall -Wextra
118118
)
119119
endif()
120120
endfunction()
@@ -161,7 +161,11 @@ macro(enable_asserts)
161161
endif()
162162
endif()
163163
add_compile_definitions(_GLIBCXX_ASSERTIONS)
164-
add_compile_definitions(_LIBCPP_ENABLE_ASSERTIONS)
164+
if (ANDROID_NDK_REVISION VERSION_GREATER_EQUAL "29")
165+
add_compile_definitions(_LIBCPP_HARDENING_MODE=_LIBCPP_HARDENING_MODE_EXTENSIVE)
166+
else()
167+
add_compile_definitions(_LIBCPP_ENABLE_ASSERTIONS)
168+
endif()
165169
endmacro()
166170

167171
macro(enable_color_diagnostics)

‎src/vpux_compiler/include/vpux/compiler/core/tiling.hpp‎

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -485,7 +485,7 @@ SmallVector<Strides> adaptStrides(ShapeRef origShape, StridesRef origStrides, Ar
485485
SmallVector<int64_t> getMinNumTiles(mlir::Operation* op);
486486

487487
SmallVector<int64_t> getMaxNumTiles(mlir::Operation* op, bool checkMinimalWidthAndHeight = false,
488-
bool checkWorkloadEfficiency = false);
488+
bool checkWorkloadEfficiency = false, ArrayRef<int64_t> maxTilesPerDim = {});
489489

490490
//
491491
// EltwiseOp
@@ -496,10 +496,8 @@ InputTiling backInferEltwiseTile(mlir::Operation* op, const vpux::TileInfo& outp
496496
// SWLayer
497497

498498
mlir::FailureOr<OutputTiling> getSWLayerTilingStrategyWithTileDimOrder(mlir::Operation* op, TilingMode& tilingMode,
499-
DimArrRef tileDimOrder, Logger log,
500-
ArrayRef<int64_t> maxTilesPerDim = {});
501-
mlir::FailureOr<OutputTiling> getSWLayerTilingStrategy(mlir::Operation* op, TilingMode tilingMode, Logger log,
502-
ArrayRef<int64_t> maxTilesPerDim = {});
499+
DimArrRef tileDimOrder, Logger log);
500+
mlir::FailureOr<OutputTiling> getSWLayerTilingStrategy(mlir::Operation* op, TilingMode tilingMode, Logger log);
503501

504502
InputTiling getSWLayerInputTiles(mlir::Operation* op, const vpux::TileInfo& outputTile);
505503
SmallVector<int64_t> getMaxNumTilesWithAxesExclusion(mlir::Operation* op, ArrayRef<int64_t> axes);

‎src/vpux_compiler/include/vpux/compiler/dialect/IE/utils/fake_quantize_utils.hpp‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -169,6 +169,10 @@ class WeightsDequantizeStructureInfo final {
169169
bool hasScale() const;
170170
bool hasShift() const;
171171
bool isKVcachedPattern() const;
172+
// Returns true when the WD-chain's last op has exactly one use and that use is a GatherOp with i4/ui4 weights.
173+
// The Gather accesses only a small subset of rows at inference time, so dequantizing the full table offline is
174+
// wasteful. The WD chain is instead routed to DynamicDequantize so that dequantization happens after Gather.
175+
bool isI4ConsumedByGather() const;
172176

173177
mlir::Type getInputElemType() const;
174178
mlir::Type getLowPrecisionElemType() const;

‎src/vpux_compiler/include/vpux/compiler/dialect/VPU/transforms/passes.hpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -521,8 +521,8 @@ std::unique_ptr<mlir::Pass> createVerticalFusionOutliningPass(const TilingOption
521521
Logger log = Logger::global());
522522
std::unique_ptr<mlir::Pass> createUnrollUnusedVerticalFusionRegionPass(Logger log = Logger::global());
523523
std::unique_ptr<mlir::Pass> createEnsureNCEOpsSizeRequirementsPass(
524-
bool enableOutputEnsurance = true, bool enableDequantWeightEnsuranceBeforeStrategy = true,
525-
bool skipNonConvOC = false, Logger log = Logger::global());
524+
bool enableOutputEnsurance = true, bool enableDequantWeightEnsuranceBeforeStrategy = true, bool skipOC = false,
525+
Logger log = Logger::global());
526526
std::unique_ptr<mlir::Pass> createConvolutionSplitOverInputChannelPass(Logger log = Logger::global());
527527
std::unique_ptr<mlir::Pass> createFuseClampPass(Logger log = Logger::global());
528528
std::unique_ptr<mlir::Pass> createFuseConvertPass(Logger log = Logger::global());

‎src/vpux_compiler/include/vpux/compiler/dialect/VPUIP/utils/sw_utils.hpp‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -119,6 +119,7 @@ const SmallVector<StringLiteral> SW_KERNELS_SUPPORTING_TILING = {"mvn1",
119119
"rms_norm",
120120
"rope",
121121
"rope_ilv",
122+
"rope_pairwise",
122123
"sdpa",
123124
"random_uniform",
124125
"grid_sample",

‎src/vpux_compiler/include/vpux/compiler/frontend/IE.hpp‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -336,6 +336,7 @@ class NGraphImporter final {
336336
IE::ProposalAttr importProposalAttrs(const ov::op::v0::Proposal::Attributes& val);
337337
IE::ReverseModeAttr importReverseMode(const ov::op::v1::Reverse::Mode mode);
338338
IE::OneHotModeAttr importOneHotMode(const ov::op::v16::OneHot::NegativeIndicesMode mode);
339+
IE::RoPEModeAttr importRoPEMode(const ov::op::internal::RoPE::Config& cfg);
339340
IE::InterpolateAttr importInterpolateAttrs(const ov::opset4::Interpolate::InterpolateAttrs& val);
340341
IE::DetectionOutputAttr importDetectionOutputAttrs(const ov::op::v0::DetectionOutput::Attributes& val);
341342
IE::ExperimentalDetectronROIFeatureExtractorAttr importExpDetectronROIFeatureExtractAttrs(

‎src/vpux_compiler/src/NPU37XX/dialect/IE/impl/weights_dequantize_to_fakequantize_strategy.cpp‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -117,6 +117,12 @@ class WeightsDequantizeToFakeQuantizeConstRewriter final : public mlir::OpRewrit
117117
_log.trace("Can't create FakeQuantize with dynamic scale");
118118
return mlir::failure();
119119
}
120+
// Constant WD chains feeding a Gather are routed to DynamicDequantize.
121+
// The Gather accesses a small subset of rows, so offline dequantization wastes blob size.
122+
if (wdInfo.isI4ConsumedByGather()) {
123+
_log.trace("WD chain feeds a Gather op with i4/ui4 weights; deferring to DynamicDequantize path.");
124+
return mlir::failure();
125+
}
120126
if (!wdInfo.isKVcachedPattern() && IE::getTrueElemType(origOp).isInteger(2)) {
121127
// Force to use DynamicDequantize for u2 WaC groupwise prefill model
122128
_log.trace("Got u2 weights-as-constant groupwise prefill pattern.");

‎src/vpux_compiler/src/NPU37XX/dialect/VPU/transforms/pipelines.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,7 @@ void vpux::VPU::arch37xx::buildDefaultHWPipeline(mlir::OpPassManager& pm,
8989

9090
pm.addPass(VPU::createEnsureNCEOpsSizeRequirementsPass(/*enableOutputEnsurance=*/true,
9191
/*enableDequantWeightEnsuranceBeforeStrategy=*/false,
92-
/*skipNonConvOC=*/false, log));
92+
/*skipOC=*/false, log));
9393
pm.addPass(VPU::createOptimizeConcatPass(/*optimizeOnlyOuterConcat*/ false,
9494
/*disablePassOnEntryFunctionForHostCompile=*/false, log));
9595
if (options.enableWeightsSparsity) {

‎src/vpux_compiler/src/NPU40XX/dialect/VPU/transforms/pipelines.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -33,7 +33,7 @@ void vpux::VPU::arch40xx::buildIncrementalPipeline(mlir::OpPassManager& pm, cons
3333

3434
pm.addPass(VPU::createEnsureNCEOpsSizeRequirementsPass(/*enableOutputEnsurance=*/true,
3535
/*enableDequantWeightEnsuranceBeforeStrategy=*/false,
36-
/*skipNonConvOC=*/false, log));
36+
/*skipOC=*/false, log));
3737
pm.addPass(VPU::createOptimizeConcatPass(/*optimizeOnlyOuterConcat*/ false,
3838
/*disablePassOnEntryFunctionForHostCompile=*/false, log));
3939

@@ -114,7 +114,7 @@ void vpux::VPU::arch40xx::buildDefaultHWPipeline(mlir::OpPassManager& pm,
114114

115115
pm.addPass(VPU::createEnsureNCEOpsSizeRequirementsPass(options.enableOutputEnsurance,
116116
options.enableDequantWeightEnsuranceBeforeStrategy,
117-
/*skipNonConvOC=*/false, log));
117+
/*skipOC=*/false, log));
118118
pm.addPass(VPU::createOptimizeConcatPass(/*optimizeOnlyOuterConcat*/ false,
119119
/*disablePassOnEntryFunctionForHostCompile=*/false, log));
120120
if (options.enableWeightsSparsity) {

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