sw64: add HUGE_VMAP support for c4

Enable HAVE_ARCH_HUGE_VMALLOC and HAVE_ARCH_HUGE_VMAP for the sw64
c4 architecture to allow ioremap() and vmalloc() to use huge pages.
This significantly reduces TLB pressure and page table memory overhead
when mapping large contiguous physical regions like PCIe BARs.

Signed-off-by: Jinyu Tang <tjytimi@163.com>
Signed-off-by: Gu Yuchen <guyuchen@wxiat.com>
Reviewed-by: He Sheng <hesheng@wxiat.com>
Signed-off-by: Gu Zitao <guzitao@wxiat.com>

Author: tjy-zhu

arch/sw_64/Kconfig

@@ -93,6 +93,8 @@ config SW64
 	select HAVE_ARCH_SECCOMP_FILTER
 	select HAVE_ARCH_TRACEHOOK
 	select HAVE_ARCH_TRANSPARENT_HUGEPAGE
+	select HAVE_ARCH_HUGE_VMALLOC if HAVE_ARCH_HUGE_VMAP
+	select HAVE_ARCH_HUGE_VMAP if SUBARCH_C4
 	select HAVE_ASM_MODVERSIONS
 	select HAVE_C_RECORDMCOUNT
 	select HAVE_DEBUG_BUGVERBOSE

arch/sw_64/include/asm/vmalloc.h

@@ -2,4 +2,23 @@
 #ifndef _ASM_SW64_VMALLOC_H
 #define _ASM_SW64_VMALLOC_H
 
+#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
+
+#include <asm/pgtable.h>
+
+#define IOREMAP_MAX_ORDER (PUD_SHIFT)
+
+#define arch_vmap_pud_supported arch_vmap_pud_supported
+static inline bool arch_vmap_pud_supported(pgprot_t prot)
+{
+	return true;
+}
+
+#define arch_vmap_pmd_supported arch_vmap_pmd_supported
+static inline bool arch_vmap_pmd_supported(pgprot_t prot)
+{
+	return true;
+}
+
+#endif /* CONFIG_HAVE_ARCH_HUGE_VMAP */
 #endif /* _ASM_SW64_VMALLOC_H */

arch/sw_64/mm/Makefile

@@ -5,7 +5,7 @@
 
 #ccflags-y := -Werror
 
-obj-y	:= init.o fault.o  physaddr.o mmap.o extable.o
+obj-y	:= init.o fault.o  physaddr.o mmap.o extable.o pgtable.o
 
 obj-$(CONFIG_SW64_KERNEL_PAGE_TABLE)   += pageattr.o
 obj-$(CONFIG_NUMA)	+= numa.o

arch/sw_64/mm/pgtable.c

@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/mm.h>
+#include <linux/vmalloc.h>
+#include <asm/pgtable.h>
+#include <asm/tlbflush.h>
+
+#ifdef CONFIG_HAVE_ARCH_HUGE_VMAP
+
+int pmd_set_huge(pmd_t *pmd, phys_addr_t phys, pgprot_t prot)
+{
+	pmd_t new_pmd = pfn_pmd(phys >> PAGE_SHIFT, prot);
+
+	new_pmd = __pmd(pmd_val(new_pmd) | _PAGE_LEAF);
+	set_pmd(pmd, new_pmd);
+
+	return 1;
+}
+
+int pmd_clear_huge(pmd_t *pmd)
+{
+	if (!(pmd_val(*pmd) & _PAGE_LEAF))
+		return 0;
+
+	pmd_clear(pmd);
+	return 1;
+}
+
+int pmd_free_pte_page(pmd_t *pmd, unsigned long addr)
+{
+	pte_t *pte;
+
+	if (pmd_val(*pmd) & _PAGE_LEAF)
+		return 0;
+
+	pte = (pte_t *)pmd_page_vaddr(*pmd);
+
+	pmd_clear(pmd);
+
+	flush_tlb_kernel_range(addr, addr + PMD_SIZE);
+
+	pte_free_kernel(NULL, pte);
+
+	return 1;
+}
+
+int pud_set_huge(pud_t *pud, phys_addr_t phys, pgprot_t prot)
+{
+	pud_t new_pud = pfn_pud(phys >> PAGE_SHIFT, prot);
+
+	new_pud = __pud(pud_val(new_pud) | _PAGE_LEAF);
+
+	set_pud(pud, new_pud);
+	return 1;
+}
+
+int pud_clear_huge(pud_t *pud)
+{
+	if (!(pud_val(*pud) & _PAGE_LEAF))
+		return 0;
+
+	pud_clear(pud);
+		return 1;
+}
+
+int pud_free_pmd_page(pud_t *pud, unsigned long addr)
+{
+	pmd_t *pmd;
+	int i;
+
+	if (pud_val(*pud) & _PAGE_LEAF)
+		return 0;
+
+	pmd = (pmd_t *)pud_page_vaddr(*pud);
+	pud_clear(pud);
+	flush_tlb_kernel_range(addr, addr + PUD_SIZE);
+
+	for (i = 0; i < PTRS_PER_PMD; i++) {
+		if (!pmd_none(pmd[i])) {
+			pte_t *pte = (pte_t *)pmd_page_vaddr(pmd[i]);
+
+			pte_free_kernel(NULL, pte);
+		}
+	}
+
+	pmd_free(NULL, pmd);
+
+	return 1;
+}
+#endif