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x86/CPU/AMD: Prevent improper isolation of shared resources in Zen2's op cache
commit c21b90f77687075115d989e53a8ec5e2bb427ab1 upstream. Make sure resources are not improperly shared in the op cache and cause instruction corruption this way. Signed-off-by: Prathyushi Nangia <prathyushi.nangia@amd.com> Co-developed-by: Borislav Petkov (AMD) <bp@alien8.de> Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de> Cc: stable@vger.kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> (cherry picked from commit ff6fc65b3bf73acc5ee71919154d830ad5431362) Signed-off-by: Wentao Guan <guanwentao@uniontech.com>
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arch/x86/include/asm/msr-index.h

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@@ -699,6 +699,7 @@
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/* Zen4 */
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#define MSR_ZEN4_BP_CFG 0xc001102e
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#define MSR_ZEN4_BP_CFG_SHARED_BTB_FIX_BIT 5
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#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT 33
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/* Zen 2 */
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#define MSR_ZEN2_SPECTRAL_CHICKEN 0xc00110e3

arch/x86/kernel/cpu/amd.c

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@@ -1114,6 +1114,9 @@ static void init_amd_zen2(struct cpuinfo_x86 *c)
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msr_clear_bit(MSR_AMD64_CPUID_FN_7, 18);
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pr_emerg("RDSEED is not reliable on this platform; disabling.\n");
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}
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if (!cpu_has(c, X86_FEATURE_HYPERVISOR))
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msr_set_bit(MSR_ZEN4_BP_CFG, MSR_ZEN2_BP_CFG_BUG_FIX_BIT);
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}
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static void init_amd_zen3(struct cpuinfo_x86 *c)

tools/arch/x86/include/asm/msr-index.h

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/* AMD Last Branch Record MSRs */
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#define MSR_AMD64_LBR_SELECT 0xc000010e
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#define MSR_ZEN4_BP_CFG 0xc001102e
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#define MSR_ZEN2_BP_CFG_BUG_FIX_BIT 33
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/* Fam 17h MSRs */
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#define MSR_F17H_IRPERF 0xc00000e9
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