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feat(native): port Verilog extractor to Rust #496

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feat(native): port Verilog extractor to Rust

feat(native): port Verilog extractor to Rust #496

Triggered via pull request May 11, 2026 20:59
@carlos-almcarlos-alm
opened #1107
feat/1071-verilog-rust-extractor
Status Success
Total duration 6m 10s
Artifacts 6

build-native.yml

on: pull_request
Matrix: build
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Build x86_64-pc-windows-msvc
NOTICE: windows-2025 requests are being redirected to windows-2025-vs2026 by May 12, 2026

Artifacts

Produced during runtime
Name Size Digest
native-darwin-arm64
8.42 MB
sha256:54179c8311328d241a96a8d56c874059f20d30d46a2af2ba2ef9d59a15f47e07
native-darwin-x64
8.14 MB
sha256:05eb6c35245d1addae239f311f3b43fb472331c007441807a7fe0de073fe47e0
native-linux-arm64
8.3 MB
sha256:1f07627f58d5d768946eac04ed1e366efb2e0d1e44c90cb71cf81b3fa4775faa
native-linux-x64
8.37 MB
sha256:143c77e160ef64fc4b79d4ceca7b18646fd02d185b39e9dca2a2507f616cbb3b
native-linux-x64-musl
8.43 MB
sha256:9bdc3ea3e915838b9f4292db7a429304d4ff5bdc9184ad8d12eae0a365b3b6ab
native-win32-x64
7.84 MB
sha256:540818b3b52b225047ae14dffa38d59ad38004f42b16873b5775f77e2981489c