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feat(native): port Verilog extractor to Rust #510

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feat(native): port Verilog extractor to Rust

feat(native): port Verilog extractor to Rust #510

Triggered via pull request May 12, 2026 05:47
@carlos-almcarlos-alm
synchronize #1107
feat/1071-verilog-rust-extractor
Status Success
Total duration 3m 43s
Artifacts 6

build-native.yml

on: pull_request
Matrix: build
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Build x86_64-pc-windows-msvc
NOTICE: windows-2025 requests are being redirected to windows-2025-vs2026 by May 12, 2026

Artifacts

Produced during runtime
Name Size Digest
native-darwin-arm64
8.44 MB
sha256:ccaa19afd261f95c1606ac9eb8d16867e1c1fc283c955c303c30892a9cf2c2cc
native-darwin-x64
8.17 MB
sha256:6a81ebf931bb3340f681ba8c6020ebce013279c2e56c4945b1f3b96828932e3a
native-linux-arm64
8.33 MB
sha256:8b68837f1173a78802b63e7c54463c0afb3798d47554502911f9377ae69c12c2
native-linux-x64
8.4 MB
sha256:b591c52a039bb18cc09c0f88b8065c183c261a23bcbc281b21cb120fd60d927c
native-linux-x64-musl
8.46 MB
sha256:a39f8caa799c84046c36480f133dd3799c7d088b3dc27c1f145aa062998cb173
native-win32-x64
7.86 MB
sha256:c70155d7b1137ce3cfb964503e5eccbd5abec8c36621be7d0614844ea945a796