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feat(native): port Verilog extractor to Rust #544

feat(native): port Verilog extractor to Rust

feat(native): port Verilog extractor to Rust #544

Triggered via pull request May 13, 2026 11:36
Status Failure
Total duration 3m 51s
Artifacts 5

build-native.yml

on: pull_request
Matrix: build
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1 error and 1 notice
Build x86_64-apple-darwin
Process completed with exit code 1.
Build x86_64-pc-windows-msvc
NOTICE: windows-2025 requests are being redirected to windows-2025-vs2026 by May 12, 2026

Artifacts

Produced during runtime
Name Size Digest
native-darwin-arm64
9.49 MB
sha256:0e25c1a9ef98096e7f8aec9d2da65c9d4ea685547d387d071ade8b385a79c85f
native-linux-arm64
9.3 MB
sha256:18d5d22b1586778dbad1c507a371f256daf9f5f25202e708ea4448c055fff7b2
native-linux-x64
9.38 MB
sha256:fc0275ac93900076a09cc26bdeaa99da908dd8346458b7c46d251d216cd296d7
native-linux-x64-musl
9.45 MB
sha256:ac7b60fe4663242ca4d4363981b626f60803e4750d64d70bf5c2ac1462427fa4
native-win32-x64
8.85 MB
sha256:db6fd52c5261a655a686e970ef9e9d03129d5382eaf063ab94947a44571b1aa8