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feat(native): port Verilog extractor to Rust #566

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feat(native): port Verilog extractor to Rust

feat(native): port Verilog extractor to Rust #566

Triggered via pull request May 14, 2026 08:12
@carlos-almcarlos-alm
synchronize #1107
feat/1071-verilog-rust-extractor
Status Success
Total duration 7m 2s
Artifacts 6

build-native.yml

on: pull_request
Matrix: build
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Build x86_64-pc-windows-msvc
NOTICE: windows-2025 requests are being redirected to windows-2025-vs2026 by May 12, 2026

Artifacts

Produced during runtime
Name Size Digest
native-darwin-arm64
10.1 MB
sha256:b64948e45c3e7e22b2670ce605cea07d5f2e397d9b0c4c1af5e9f136508b4dfb
native-darwin-x64
9.7 MB
sha256:8602f955853a9e5279a550d7f8f48941b3f81664ef413970613654777be79d11
native-linux-arm64
9.85 MB
sha256:17771503cce89fcd74c8b1e1fc5060ef68464ea3d50eeaa2f6d575dbc361c489
native-linux-x64
9.93 MB
sha256:2a099159b6cef32852a91d37e6037b7ac5c9a9b673f1c08578f9c02b18dee20d
native-linux-x64-musl
10 MB
sha256:0df5019573c083a05443763bf2e2de606ef234aa1383c0dadf17cad5cb929d8c
native-win32-x64
9.4 MB
sha256:71d7e6ed1d931c78fa228aeb0faf2e83862c8db0eaab38d5d73328bdb2956ba1