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feat(native): port Verilog extractor to Rust #568

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feat(native): port Verilog extractor to Rust

feat(native): port Verilog extractor to Rust #568

Triggered via pull request May 14, 2026 10:08
@carlos-almcarlos-alm
synchronize #1107
feat/1071-verilog-rust-extractor
Status Failure
Total duration 4m 35s
Artifacts 4

build-native.yml

on: pull_request
Matrix: build
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2 errors and 1 notice
Build x86_64-apple-darwin
Process completed with exit code 1.
Build aarch64-apple-darwin
Process completed with exit code 1.
Build x86_64-pc-windows-msvc
NOTICE: windows-2025 requests are being redirected to windows-2025-vs2026 by May 12, 2026

Artifacts

Produced during runtime
Name Size Digest
native-linux-arm64
10.7 MB
sha256:50e672da4ed93d5ca8935cb6a66c4a01ce2715e5a86c39a5584c056e984bf5d7
native-linux-x64
10.8 MB
sha256:f0922226aa50c83783680d3b697e4d9811ed42fc68ebd9bff04eae08f2536895
native-linux-x64-musl
10.9 MB
sha256:1dc0fa3b61a58ae6578941f83b3ea64c1d0d68dc5db0731ef994942c331adece
native-win32-x64
10.3 MB
sha256:38431fbae193c10d9b5c802e0490cedf2933ea3f06e77073332aeec54d2e8953